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878ddf1f | 1 | /** @file\r |
2 | I/O Library.\r | |
3 | \r | |
4 | Copyright (c) 2006, Intel Corporation<BR>\r | |
5 | All rights reserved. This program and the accompanying materials\r | |
6 | are licensed and made available under the terms and conditions of the BSD License\r | |
7 | which accompanies this distribution. The full text of the license may be found at\r | |
8 | http://opensource.org/licenses/bsd-license.php\r | |
9 | \r | |
10 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
11 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
12 | \r | |
13 | Module Name: IoLib.c\r | |
14 | \r | |
15 | **/\r | |
16 | \r | |
17 | static EFI_CPU_IO_PROTOCOL *gCpuIo;\r | |
18 | \r | |
19 | EFI_STATUS\r | |
20 | IoLibConstructor (\r | |
21 | IN EFI_HANDLE ImageHandle,\r | |
22 | IN EFI_SYSTEM_TABLE *SystemTable\r | |
23 | )\r | |
24 | {\r | |
25 | EFI_STATUS Status;\r | |
26 | \r | |
27 | Status = SystemTable->BootServices->LocateProtocol (\r | |
28 | &gEfiCpuIoProtocolGuid,\r | |
29 | NULL,\r | |
30 | (VOID**)&gCpuIo\r | |
31 | );\r | |
32 | ASSERT_EFI_ERROR (Status);\r | |
33 | return Status;\r | |
34 | }\r | |
35 | \r | |
36 | UINT64\r | |
37 | EFIAPI\r | |
38 | IoReadWorker (\r | |
39 | IN UINTN Port,\r | |
40 | IN EFI_CPU_IO_PROTOCOL_WIDTH Width\r | |
41 | )\r | |
42 | {\r | |
43 | UINT64 Data;\r | |
44 | \r | |
45 | gCpuIo->Io.Read (gCpuIo, Width, Port, 1, &Data);\r | |
46 | return Data;\r | |
47 | }\r | |
48 | \r | |
49 | UINT64\r | |
50 | EFIAPI\r | |
51 | IoWriteWorker (\r | |
52 | IN UINTN Port,\r | |
53 | IN EFI_CPU_IO_PROTOCOL_WIDTH Width,\r | |
54 | IN UINT64 Data\r | |
55 | )\r | |
56 | {\r | |
57 | gCpuIo->Io.Write (gCpuIo, Width, Port, 1, &Data);\r | |
58 | return Data;\r | |
59 | }\r | |
60 | \r | |
61 | UINT64\r | |
62 | EFIAPI\r | |
63 | MmioReadWorker (\r | |
64 | IN UINTN Address,\r | |
65 | IN EFI_CPU_IO_PROTOCOL_WIDTH Width\r | |
66 | )\r | |
67 | {\r | |
68 | UINT64 Data;\r | |
69 | \r | |
70 | gCpuIo->Mem.Read (gCpuIo, Width, Address, 1, &Data);\r | |
71 | return Data;\r | |
72 | }\r | |
73 | \r | |
74 | UINT64\r | |
75 | EFIAPI\r | |
76 | MmioWriteWorker (\r | |
77 | IN UINTN Address,\r | |
78 | IN EFI_CPU_IO_PROTOCOL_WIDTH Width,\r | |
79 | IN UINT64 Data\r | |
80 | )\r | |
81 | {\r | |
82 | gCpuIo->Mem.Write (gCpuIo, Width, Address, 1, &Data);\r | |
83 | return Data;\r | |
84 | }\r | |
85 | \r | |
86 | /**\r | |
87 | Reads an 8-bit I/O port.\r | |
88 | \r | |
89 | Reads the 8-bit I/O port specified by Port. The 8-bit read value is returned.\r | |
90 | This function must guarantee that all I/O read and write operations are\r | |
91 | serialized.\r | |
92 | \r | |
93 | If 8-bit I/O port operations are not supported, then ASSERT().\r | |
94 | \r | |
95 | @param Port The I/O port to read.\r | |
96 | \r | |
97 | @return The value read.\r | |
98 | \r | |
99 | **/\r | |
100 | UINT8\r | |
101 | EFIAPI\r | |
102 | IoRead8 (\r | |
103 | IN UINTN Port\r | |
104 | )\r | |
105 | {\r | |
106 | return (UINT8)IoReadWorker (Port, EfiCpuIoWidthUint8);\r | |
107 | }\r | |
108 | \r | |
109 | /**\r | |
110 | Writes an 8-bit I/O port.\r | |
111 | \r | |
112 | Writes the 8-bit I/O port specified by Port with the value specified by Value\r | |
113 | and returns Value. This function must guarantee that all I/O read and write\r | |
114 | operations are serialized.\r | |
115 | \r | |
116 | If 8-bit I/O port operations are not supported, then ASSERT().\r | |
117 | \r | |
118 | @param Port The I/O port to write.\r | |
119 | @param Value The value to write to the I/O port.\r | |
120 | \r | |
121 | @return The value written the I/O port.\r | |
122 | \r | |
123 | **/\r | |
124 | UINT8\r | |
125 | EFIAPI\r | |
126 | IoWrite8 (\r | |
127 | IN UINTN Port,\r | |
128 | IN UINT8 Value\r | |
129 | )\r | |
130 | {\r | |
131 | return (UINT8)IoWriteWorker (Port, EfiCpuIoWidthUint8, Value);\r | |
132 | }\r | |
133 | \r | |
134 | /**\r | |
135 | Reads a 16-bit I/O port.\r | |
136 | \r | |
137 | Reads the 16-bit I/O port specified by Port. The 16-bit read value is returned.\r | |
138 | This function must guarantee that all I/O read and write operations are\r | |
139 | serialized.\r | |
140 | \r | |
141 | If 16-bit I/O port operations are not supported, then ASSERT().\r | |
142 | \r | |
143 | @param Port The I/O port to read.\r | |
144 | \r | |
145 | @return The value read.\r | |
146 | \r | |
147 | **/\r | |
148 | UINT16\r | |
149 | EFIAPI\r | |
150 | IoRead16 (\r | |
151 | IN UINTN Port\r | |
152 | )\r | |
153 | {\r | |
154 | return (UINT16)IoReadWorker (Port, EfiCpuIoWidthUint16);\r | |
155 | }\r | |
156 | \r | |
157 | /**\r | |
158 | Writes a 16-bit I/O port.\r | |
159 | \r | |
160 | Writes the 16-bit I/O port specified by Port with the value specified by Value\r | |
161 | and returns Value. This function must guarantee that all I/O read and write\r | |
162 | operations are serialized.\r | |
163 | \r | |
164 | If 16-bit I/O port operations are not supported, then ASSERT().\r | |
165 | \r | |
166 | @param Port The I/O port to write.\r | |
167 | @param Value The value to write to the I/O port.\r | |
168 | \r | |
169 | @return The value written the I/O port.\r | |
170 | \r | |
171 | **/\r | |
172 | UINT16\r | |
173 | EFIAPI\r | |
174 | IoWrite16 (\r | |
175 | IN UINTN Port,\r | |
176 | IN UINT16 Value\r | |
177 | )\r | |
178 | {\r | |
179 | return (UINT16)IoWriteWorker (Port, EfiCpuIoWidthUint16, Value);\r | |
180 | }\r | |
181 | \r | |
182 | /**\r | |
183 | Reads a 32-bit I/O port.\r | |
184 | \r | |
185 | Reads the 32-bit I/O port specified by Port. The 32-bit read value is returned.\r | |
186 | This function must guarantee that all I/O read and write operations are\r | |
187 | serialized.\r | |
188 | \r | |
189 | If 32-bit I/O port operations are not supported, then ASSERT().\r | |
190 | \r | |
191 | @param Port The I/O port to read.\r | |
192 | \r | |
193 | @return The value read.\r | |
194 | \r | |
195 | **/\r | |
196 | UINT32\r | |
197 | EFIAPI\r | |
198 | IoRead32 (\r | |
199 | IN UINTN Port\r | |
200 | )\r | |
201 | {\r | |
202 | return (UINT32)IoReadWorker (Port, EfiCpuIoWidthUint32);\r | |
203 | }\r | |
204 | \r | |
205 | /**\r | |
206 | Writes a 32-bit I/O port.\r | |
207 | \r | |
208 | Writes the 32-bit I/O port specified by Port with the value specified by Value\r | |
209 | and returns Value. This function must guarantee that all I/O read and write\r | |
210 | operations are serialized.\r | |
211 | \r | |
212 | If 32-bit I/O port operations are not supported, then ASSERT().\r | |
213 | \r | |
214 | @param Port The I/O port to write.\r | |
215 | @param Value The value to write to the I/O port.\r | |
216 | \r | |
217 | @return The value written the I/O port.\r | |
218 | \r | |
219 | **/\r | |
220 | UINT32\r | |
221 | EFIAPI\r | |
222 | IoWrite32 (\r | |
223 | IN UINTN Port,\r | |
224 | IN UINT32 Value\r | |
225 | )\r | |
226 | {\r | |
227 | return (UINT32)IoWriteWorker (Port, EfiCpuIoWidthUint32, Value);\r | |
228 | }\r | |
229 | \r | |
230 | /**\r | |
231 | Reads a 64-bit I/O port.\r | |
232 | \r | |
233 | Reads the 64-bit I/O port specified by Port. The 64-bit read value is returned.\r | |
234 | This function must guarantee that all I/O read and write operations are\r | |
235 | serialized.\r | |
236 | \r | |
237 | If 64-bit I/O port operations are not supported, then ASSERT().\r | |
238 | \r | |
239 | @param Port The I/O port to read.\r | |
240 | \r | |
241 | @return The value read.\r | |
242 | \r | |
243 | **/\r | |
244 | UINT64\r | |
245 | EFIAPI\r | |
246 | IoRead64 (\r | |
247 | IN UINTN Port\r | |
248 | )\r | |
249 | {\r | |
250 | return IoReadWorker (Port, EfiCpuIoWidthUint64);\r | |
251 | }\r | |
252 | \r | |
253 | /**\r | |
254 | Writes a 64-bit I/O port.\r | |
255 | \r | |
256 | Writes the 64-bit I/O port specified by Port with the value specified by Value\r | |
257 | and returns Value. This function must guarantee that all I/O read and write\r | |
258 | operations are serialized.\r | |
259 | \r | |
260 | If 64-bit I/O port operations are not supported, then ASSERT().\r | |
261 | \r | |
262 | @param Port The I/O port to write.\r | |
263 | @param Value The value to write to the I/O port.\r | |
264 | \r | |
265 | @return The value written the I/O port.\r | |
266 | \r | |
267 | **/\r | |
268 | UINT64\r | |
269 | EFIAPI\r | |
270 | IoWrite64 (\r | |
271 | IN UINTN Port,\r | |
272 | IN UINT64 Value\r | |
273 | )\r | |
274 | {\r | |
275 | return IoWriteWorker (Port, EfiCpuIoWidthUint64, Value);\r | |
276 | }\r | |
277 | \r | |
278 | /**\r | |
279 | Reads an 8-bit MMIO register.\r | |
280 | \r | |
281 | Reads the 8-bit MMIO register specified by Address. The 8-bit read value is\r | |
282 | returned. This function must guarantee that all MMIO read and write\r | |
283 | operations are serialized.\r | |
284 | \r | |
285 | If 8-bit MMIO register operations are not supported, then ASSERT().\r | |
286 | \r | |
287 | @param Address The MMIO register to read.\r | |
288 | \r | |
289 | @return The value read.\r | |
290 | \r | |
291 | **/\r | |
292 | UINT8\r | |
293 | EFIAPI\r | |
294 | MmioRead8 (\r | |
295 | IN UINTN Address\r | |
296 | )\r | |
297 | {\r | |
298 | return (UINT8)MmioReadWorker (Address, EfiCpuIoWidthUint8);\r | |
299 | }\r | |
300 | \r | |
301 | /**\r | |
302 | Writes an 8-bit MMIO register.\r | |
303 | \r | |
304 | Writes the 8-bit MMIO register specified by Address with the value specified\r | |
305 | by Value and returns Value. This function must guarantee that all MMIO read\r | |
306 | and write operations are serialized.\r | |
307 | \r | |
308 | If 8-bit MMIO register operations are not supported, then ASSERT().\r | |
309 | \r | |
310 | @param Address The MMIO register to write.\r | |
311 | @param Value The value to write to the MMIO register.\r | |
312 | \r | |
313 | **/\r | |
314 | UINT8\r | |
315 | EFIAPI\r | |
316 | MmioWrite8 (\r | |
317 | IN UINTN Address,\r | |
318 | IN UINT8 Value\r | |
319 | )\r | |
320 | {\r | |
321 | return (UINT8)MmioWriteWorker (Address, EfiCpuIoWidthUint8, Value);\r | |
322 | }\r | |
323 | \r | |
324 | /**\r | |
325 | Reads a 16-bit MMIO register.\r | |
326 | \r | |
327 | Reads the 16-bit MMIO register specified by Address. The 16-bit read value is\r | |
328 | returned. This function must guarantee that all MMIO read and write\r | |
329 | operations are serialized.\r | |
330 | \r | |
331 | If 16-bit MMIO register operations are not supported, then ASSERT().\r | |
332 | \r | |
333 | @param Address The MMIO register to read.\r | |
334 | \r | |
335 | @return The value read.\r | |
336 | \r | |
337 | **/\r | |
338 | UINT16\r | |
339 | EFIAPI\r | |
340 | MmioRead16 (\r | |
341 | IN UINTN Address\r | |
342 | )\r | |
343 | {\r | |
344 | return (UINT16)MmioReadWorker (Address, EfiCpuIoWidthUint16);\r | |
345 | }\r | |
346 | \r | |
347 | /**\r | |
348 | Writes a 16-bit MMIO register.\r | |
349 | \r | |
350 | Writes the 16-bit MMIO register specified by Address with the value specified\r | |
351 | by Value and returns Value. This function must guarantee that all MMIO read\r | |
352 | and write operations are serialized.\r | |
353 | \r | |
354 | If 16-bit MMIO register operations are not supported, then ASSERT().\r | |
355 | \r | |
356 | @param Address The MMIO register to write.\r | |
357 | @param Value The value to write to the MMIO register.\r | |
358 | \r | |
359 | **/\r | |
360 | UINT16\r | |
361 | EFIAPI\r | |
362 | MmioWrite16 (\r | |
363 | IN UINTN Address,\r | |
364 | IN UINT16 Value\r | |
365 | )\r | |
366 | {\r | |
367 | return (UINT16)MmioWriteWorker (Address, EfiCpuIoWidthUint16, Value);\r | |
368 | }\r | |
369 | \r | |
370 | /**\r | |
371 | Reads a 32-bit MMIO register.\r | |
372 | \r | |
373 | Reads the 32-bit MMIO register specified by Address. The 32-bit read value is\r | |
374 | returned. This function must guarantee that all MMIO read and write\r | |
375 | operations are serialized.\r | |
376 | \r | |
377 | If 32-bit MMIO register operations are not supported, then ASSERT().\r | |
378 | \r | |
379 | @param Address The MMIO register to read.\r | |
380 | \r | |
381 | @return The value read.\r | |
382 | \r | |
383 | **/\r | |
384 | UINT32\r | |
385 | EFIAPI\r | |
386 | MmioRead32 (\r | |
387 | IN UINTN Address\r | |
388 | )\r | |
389 | {\r | |
390 | return (UINT32)MmioReadWorker (Address, EfiCpuIoWidthUint32);\r | |
391 | }\r | |
392 | \r | |
393 | /**\r | |
394 | Writes a 32-bit MMIO register.\r | |
395 | \r | |
396 | Writes the 32-bit MMIO register specified by Address with the value specified\r | |
397 | by Value and returns Value. This function must guarantee that all MMIO read\r | |
398 | and write operations are serialized.\r | |
399 | \r | |
400 | If 32-bit MMIO register operations are not supported, then ASSERT().\r | |
401 | \r | |
402 | @param Address The MMIO register to write.\r | |
403 | @param Value The value to write to the MMIO register.\r | |
404 | \r | |
405 | **/\r | |
406 | UINT32\r | |
407 | EFIAPI\r | |
408 | MmioWrite32 (\r | |
409 | IN UINTN Address,\r | |
410 | IN UINT32 Value\r | |
411 | )\r | |
412 | {\r | |
413 | return (UINT32)MmioWriteWorker (Address, EfiCpuIoWidthUint32, Value);\r | |
414 | }\r | |
415 | \r | |
416 | /**\r | |
417 | Reads a 64-bit MMIO register.\r | |
418 | \r | |
419 | Reads the 64-bit MMIO register specified by Address. The 64-bit read value is\r | |
420 | returned. This function must guarantee that all MMIO read and write\r | |
421 | operations are serialized.\r | |
422 | \r | |
423 | If 64-bit MMIO register operations are not supported, then ASSERT().\r | |
424 | \r | |
425 | @param Address The MMIO register to read.\r | |
426 | \r | |
427 | @return The value read.\r | |
428 | \r | |
429 | **/\r | |
430 | UINT64\r | |
431 | EFIAPI\r | |
432 | MmioRead64 (\r | |
433 | IN UINTN Address\r | |
434 | )\r | |
435 | {\r | |
436 | return (UINT64)MmioReadWorker (Address, EfiCpuIoWidthUint64);\r | |
437 | }\r | |
438 | \r | |
439 | /**\r | |
440 | Writes a 64-bit MMIO register.\r | |
441 | \r | |
442 | Writes the 64-bit MMIO register specified by Address with the value specified\r | |
443 | by Value and returns Value. This function must guarantee that all MMIO read\r | |
444 | and write operations are serialized.\r | |
445 | \r | |
446 | If 64-bit MMIO register operations are not supported, then ASSERT().\r | |
447 | \r | |
448 | @param Address The MMIO register to write.\r | |
449 | @param Value The value to write to the MMIO register.\r | |
450 | \r | |
451 | **/\r | |
452 | UINT64\r | |
453 | EFIAPI\r | |
454 | MmioWrite64 (\r | |
455 | IN UINTN Address,\r | |
456 | IN UINT64 Value\r | |
457 | )\r | |
458 | {\r | |
459 | return (UINT64)MmioWriteWorker (Address, EfiCpuIoWidthUint64, Value);\r | |
460 | }\r |