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878ddf1f | 1 | /** @file\r |
2 | I/O Library.\r | |
3 | \r | |
4 | Copyright (c) 2006, Intel Corporation<BR>\r | |
5 | All rights reserved. This program and the accompanying materials\r | |
6 | are licensed and made available under the terms and conditions of the BSD License\r | |
7 | which accompanies this distribution. The full text of the license may be found at\r | |
8 | http://opensource.org/licenses/bsd-license.php\r | |
9 | \r | |
10 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
11 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
12 | \r | |
13 | Module Name: IoLib.c\r | |
14 | \r | |
15 | **/\r | |
16 | \r | |
19b362e8 | 17 | //\r |
18 | // Globle varible to cache pointer to CpuIo protocol.\r | |
19 | //\r | |
20 | STATIC EFI_CPU_IO_PROTOCOL *mCpuIo = NULL;\r | |
878ddf1f | 21 | \r |
19b362e8 | 22 | /**\r |
23 | The constructor function caches the pointer to CpuIo protocol.\r | |
24 | \r | |
25 | The constructor function locates CpuIo protocol from protocol database.\r | |
26 | It will ASSERT() if that operation fails and it will always return EFI_SUCCESS. \r | |
27 | \r | |
28 | @param ImageHandle The firmware allocated handle for the EFI image.\r | |
29 | @param SystemTable A pointer to the EFI System Table.\r | |
30 | \r | |
31 | @retval EFI_SUCCESS The constructor always returns EFI_SUCCESS.\r | |
32 | \r | |
33 | **/\r | |
878ddf1f | 34 | EFI_STATUS\r |
35 | IoLibConstructor (\r | |
36 | IN EFI_HANDLE ImageHandle,\r | |
37 | IN EFI_SYSTEM_TABLE *SystemTable\r | |
38 | )\r | |
39 | {\r | |
40 | EFI_STATUS Status;\r | |
41 | \r | |
19b362e8 | 42 | Status = gBS->LocateProtocol (&gEfiCpuIoProtocolGuid, NULL, (VOID**) &mCpuIo);\r |
878ddf1f | 43 | ASSERT_EFI_ERROR (Status);\r |
19b362e8 | 44 | \r |
878ddf1f | 45 | return Status;\r |
46 | }\r | |
47 | \r | |
19b362e8 | 48 | /**\r |
49 | Reads registers in the EFI CPU I/O space.\r | |
50 | \r | |
51 | Reads the I/O port specified by Port with registers width specified by Width.\r | |
52 | The read value is returned. If such operations are not supported, then ASSERT().\r | |
53 | This function must guarantee that all I/O read and write operations are serialized.\r | |
54 | \r | |
55 | @param Port The base address of the I/O operation.\r | |
56 | The caller is responsible for aligning the Address if required. \r | |
57 | @param Width The width of the I/O operation.\r | |
58 | \r | |
59 | @return Data read from registers in the EFI CPU I/O space.\r | |
60 | \r | |
61 | **/\r | |
878ddf1f | 62 | UINT64\r |
63 | EFIAPI\r | |
64 | IoReadWorker (\r | |
65 | IN UINTN Port,\r | |
66 | IN EFI_CPU_IO_PROTOCOL_WIDTH Width\r | |
67 | )\r | |
68 | {\r | |
19b362e8 | 69 | EFI_STATUS Status;\r |
878ddf1f | 70 | UINT64 Data;\r |
71 | \r | |
19b362e8 | 72 | Status = mCpuIo->Io.Read (mCpuIo, Width, Port, 1, &Data);\r |
73 | ASSERT_EFI_ERROR (Status);\r | |
74 | \r | |
878ddf1f | 75 | return Data;\r |
76 | }\r | |
77 | \r | |
19b362e8 | 78 | /**\r |
79 | Writes registers in the EFI CPU I/O space.\r | |
80 | \r | |
81 | Writes the I/O port specified by Port with registers width and value specified by Width\r | |
82 | and Data respectively. Data is returned. If such operations are not supported, then ASSERT().\r | |
83 | This function must guarantee that all I/O read and write operations are serialized.\r | |
84 | \r | |
85 | @param Port The base address of the I/O operation.\r | |
86 | The caller is responsible for aligning the Address if required. \r | |
87 | @param Width The width of the I/O operation.\r | |
88 | @param Data The value to write to the I/O port.\r | |
89 | \r | |
90 | @return The paramter of Data.\r | |
91 | \r | |
92 | **/\r | |
878ddf1f | 93 | UINT64\r |
94 | EFIAPI\r | |
95 | IoWriteWorker (\r | |
96 | IN UINTN Port,\r | |
97 | IN EFI_CPU_IO_PROTOCOL_WIDTH Width,\r | |
98 | IN UINT64 Data\r | |
99 | )\r | |
100 | {\r | |
19b362e8 | 101 | EFI_STATUS Status;\r |
102 | \r | |
103 | Status = mCpuIo->Io.Write (mCpuIo, Width, Port, 1, &Data);\r | |
104 | ASSERT_EFI_ERROR (Status);\r | |
105 | \r | |
878ddf1f | 106 | return Data;\r |
107 | }\r | |
108 | \r | |
19b362e8 | 109 | /**\r |
110 | Reads memory-mapped registers in the EFI system memory space. \r | |
111 | \r | |
112 | Reads the MMIO registers specified by Address with registers width specified by Width.\r | |
113 | The read value is returned. If such operations are not supported, then ASSERT().\r | |
114 | This function must guarantee that all MMIO read and write operations are serialized.\r | |
115 | \r | |
116 | @param Address The MMIO register to read.\r | |
117 | The caller is responsible for aligning the Address if required. \r | |
118 | @param Width The width of the I/O operation.\r | |
119 | \r | |
120 | @return Data read from registers in the EFI system memory space.\r | |
121 | \r | |
122 | **/\r | |
878ddf1f | 123 | UINT64\r |
124 | EFIAPI\r | |
125 | MmioReadWorker (\r | |
126 | IN UINTN Address,\r | |
127 | IN EFI_CPU_IO_PROTOCOL_WIDTH Width\r | |
128 | )\r | |
129 | {\r | |
19b362e8 | 130 | EFI_STATUS Status;\r |
878ddf1f | 131 | UINT64 Data;\r |
132 | \r | |
19b362e8 | 133 | Status = mCpuIo->Mem.Read (mCpuIo, Width, Address, 1, &Data);\r |
134 | ASSERT_EFI_ERROR (Status);\r | |
135 | \r | |
878ddf1f | 136 | return Data;\r |
137 | }\r | |
138 | \r | |
19b362e8 | 139 | /**\r |
140 | Writes memory-mapped registers in the EFI system memory space. \r | |
141 | \r | |
142 | Writes the MMIO registers specified by Address with registers width and value specified by Width\r | |
143 | and Data respectively. Data is returned. If such operations are not supported, then ASSERT().\r | |
144 | This function must guarantee that all MMIO read and write operations are serialized.\r | |
145 | \r | |
146 | @param Address The MMIO register to read.\r | |
147 | The caller is responsible for aligning the Address if required. \r | |
148 | @param Width The width of the I/O operation.\r | |
149 | \r | |
150 | @return Data read from registers in the EFI system memory space.\r | |
151 | \r | |
152 | **/\r | |
878ddf1f | 153 | UINT64\r |
154 | EFIAPI\r | |
155 | MmioWriteWorker (\r | |
156 | IN UINTN Address,\r | |
157 | IN EFI_CPU_IO_PROTOCOL_WIDTH Width,\r | |
158 | IN UINT64 Data\r | |
159 | )\r | |
160 | {\r | |
19b362e8 | 161 | EFI_STATUS Status;\r |
162 | \r | |
163 | Status = mCpuIo->Mem.Write (mCpuIo, Width, Address, 1, &Data);\r | |
164 | ASSERT_EFI_ERROR (Status);\r | |
165 | \r | |
878ddf1f | 166 | return Data;\r |
167 | }\r | |
168 | \r | |
169 | /**\r | |
170 | Reads an 8-bit I/O port.\r | |
171 | \r | |
172 | Reads the 8-bit I/O port specified by Port. The 8-bit read value is returned.\r | |
173 | This function must guarantee that all I/O read and write operations are\r | |
174 | serialized.\r | |
175 | \r | |
176 | If 8-bit I/O port operations are not supported, then ASSERT().\r | |
177 | \r | |
178 | @param Port The I/O port to read.\r | |
179 | \r | |
180 | @return The value read.\r | |
181 | \r | |
182 | **/\r | |
183 | UINT8\r | |
184 | EFIAPI\r | |
185 | IoRead8 (\r | |
186 | IN UINTN Port\r | |
187 | )\r | |
188 | {\r | |
189 | return (UINT8)IoReadWorker (Port, EfiCpuIoWidthUint8);\r | |
190 | }\r | |
191 | \r | |
192 | /**\r | |
193 | Writes an 8-bit I/O port.\r | |
194 | \r | |
195 | Writes the 8-bit I/O port specified by Port with the value specified by Value\r | |
196 | and returns Value. This function must guarantee that all I/O read and write\r | |
197 | operations are serialized.\r | |
198 | \r | |
199 | If 8-bit I/O port operations are not supported, then ASSERT().\r | |
200 | \r | |
201 | @param Port The I/O port to write.\r | |
202 | @param Value The value to write to the I/O port.\r | |
203 | \r | |
204 | @return The value written the I/O port.\r | |
205 | \r | |
206 | **/\r | |
207 | UINT8\r | |
208 | EFIAPI\r | |
209 | IoWrite8 (\r | |
210 | IN UINTN Port,\r | |
211 | IN UINT8 Value\r | |
212 | )\r | |
213 | {\r | |
214 | return (UINT8)IoWriteWorker (Port, EfiCpuIoWidthUint8, Value);\r | |
215 | }\r | |
216 | \r | |
217 | /**\r | |
218 | Reads a 16-bit I/O port.\r | |
219 | \r | |
220 | Reads the 16-bit I/O port specified by Port. The 16-bit read value is returned.\r | |
221 | This function must guarantee that all I/O read and write operations are\r | |
222 | serialized.\r | |
223 | \r | |
224 | If 16-bit I/O port operations are not supported, then ASSERT().\r | |
225 | \r | |
226 | @param Port The I/O port to read.\r | |
227 | \r | |
228 | @return The value read.\r | |
229 | \r | |
230 | **/\r | |
231 | UINT16\r | |
232 | EFIAPI\r | |
233 | IoRead16 (\r | |
234 | IN UINTN Port\r | |
235 | )\r | |
236 | {\r | |
19b362e8 | 237 | //\r |
238 | // Make sure Port is aligned on a 16-bit boundary.\r | |
239 | //\r | |
240 | ASSERT ((Port & 1) == 0);\r | |
878ddf1f | 241 | return (UINT16)IoReadWorker (Port, EfiCpuIoWidthUint16);\r |
242 | }\r | |
243 | \r | |
244 | /**\r | |
245 | Writes a 16-bit I/O port.\r | |
246 | \r | |
247 | Writes the 16-bit I/O port specified by Port with the value specified by Value\r | |
248 | and returns Value. This function must guarantee that all I/O read and write\r | |
249 | operations are serialized.\r | |
250 | \r | |
251 | If 16-bit I/O port operations are not supported, then ASSERT().\r | |
252 | \r | |
253 | @param Port The I/O port to write.\r | |
254 | @param Value The value to write to the I/O port.\r | |
255 | \r | |
256 | @return The value written the I/O port.\r | |
257 | \r | |
258 | **/\r | |
259 | UINT16\r | |
260 | EFIAPI\r | |
261 | IoWrite16 (\r | |
262 | IN UINTN Port,\r | |
263 | IN UINT16 Value\r | |
264 | )\r | |
265 | {\r | |
19b362e8 | 266 | //\r |
267 | // Make sure Port is aligned on a 16-bit boundary.\r | |
268 | //\r | |
269 | ASSERT ((Port & 1) == 0);\r | |
878ddf1f | 270 | return (UINT16)IoWriteWorker (Port, EfiCpuIoWidthUint16, Value);\r |
271 | }\r | |
272 | \r | |
273 | /**\r | |
274 | Reads a 32-bit I/O port.\r | |
275 | \r | |
276 | Reads the 32-bit I/O port specified by Port. The 32-bit read value is returned.\r | |
277 | This function must guarantee that all I/O read and write operations are\r | |
278 | serialized.\r | |
279 | \r | |
280 | If 32-bit I/O port operations are not supported, then ASSERT().\r | |
281 | \r | |
282 | @param Port The I/O port to read.\r | |
283 | \r | |
284 | @return The value read.\r | |
285 | \r | |
286 | **/\r | |
287 | UINT32\r | |
288 | EFIAPI\r | |
289 | IoRead32 (\r | |
290 | IN UINTN Port\r | |
291 | )\r | |
292 | {\r | |
19b362e8 | 293 | //\r |
294 | // Make sure Port is aligned on a 32-bit boundary.\r | |
295 | //\r | |
296 | ASSERT ((Port & 3) == 0);\r | |
878ddf1f | 297 | return (UINT32)IoReadWorker (Port, EfiCpuIoWidthUint32);\r |
298 | }\r | |
299 | \r | |
300 | /**\r | |
301 | Writes a 32-bit I/O port.\r | |
302 | \r | |
303 | Writes the 32-bit I/O port specified by Port with the value specified by Value\r | |
304 | and returns Value. This function must guarantee that all I/O read and write\r | |
305 | operations are serialized.\r | |
306 | \r | |
307 | If 32-bit I/O port operations are not supported, then ASSERT().\r | |
308 | \r | |
309 | @param Port The I/O port to write.\r | |
310 | @param Value The value to write to the I/O port.\r | |
311 | \r | |
312 | @return The value written the I/O port.\r | |
313 | \r | |
314 | **/\r | |
315 | UINT32\r | |
316 | EFIAPI\r | |
317 | IoWrite32 (\r | |
318 | IN UINTN Port,\r | |
319 | IN UINT32 Value\r | |
320 | )\r | |
321 | {\r | |
19b362e8 | 322 | //\r |
323 | // Make sure Port is aligned on a 32-bit boundary.\r | |
324 | //\r | |
325 | ASSERT ((Port & 3) == 0);\r | |
878ddf1f | 326 | return (UINT32)IoWriteWorker (Port, EfiCpuIoWidthUint32, Value);\r |
327 | }\r | |
328 | \r | |
329 | /**\r | |
330 | Reads a 64-bit I/O port.\r | |
331 | \r | |
332 | Reads the 64-bit I/O port specified by Port. The 64-bit read value is returned.\r | |
333 | This function must guarantee that all I/O read and write operations are\r | |
334 | serialized.\r | |
335 | \r | |
336 | If 64-bit I/O port operations are not supported, then ASSERT().\r | |
337 | \r | |
338 | @param Port The I/O port to read.\r | |
339 | \r | |
340 | @return The value read.\r | |
341 | \r | |
342 | **/\r | |
343 | UINT64\r | |
344 | EFIAPI\r | |
345 | IoRead64 (\r | |
346 | IN UINTN Port\r | |
347 | )\r | |
348 | {\r | |
19b362e8 | 349 | //\r |
350 | // Make sure Port is aligned on a 64-bit boundary.\r | |
351 | //\r | |
352 | ASSERT ((Port & 7) == 0);\r | |
878ddf1f | 353 | return IoReadWorker (Port, EfiCpuIoWidthUint64);\r |
354 | }\r | |
355 | \r | |
356 | /**\r | |
357 | Writes a 64-bit I/O port.\r | |
358 | \r | |
359 | Writes the 64-bit I/O port specified by Port with the value specified by Value\r | |
360 | and returns Value. This function must guarantee that all I/O read and write\r | |
361 | operations are serialized.\r | |
362 | \r | |
363 | If 64-bit I/O port operations are not supported, then ASSERT().\r | |
364 | \r | |
365 | @param Port The I/O port to write.\r | |
366 | @param Value The value to write to the I/O port.\r | |
367 | \r | |
368 | @return The value written the I/O port.\r | |
369 | \r | |
370 | **/\r | |
371 | UINT64\r | |
372 | EFIAPI\r | |
373 | IoWrite64 (\r | |
374 | IN UINTN Port,\r | |
375 | IN UINT64 Value\r | |
376 | )\r | |
377 | {\r | |
19b362e8 | 378 | //\r |
379 | // Make sure Port is aligned on a 64-bit boundary.\r | |
380 | //\r | |
381 | ASSERT ((Port & 7) == 0);\r | |
878ddf1f | 382 | return IoWriteWorker (Port, EfiCpuIoWidthUint64, Value);\r |
383 | }\r | |
384 | \r | |
385 | /**\r | |
386 | Reads an 8-bit MMIO register.\r | |
387 | \r | |
388 | Reads the 8-bit MMIO register specified by Address. The 8-bit read value is\r | |
389 | returned. This function must guarantee that all MMIO read and write\r | |
390 | operations are serialized.\r | |
391 | \r | |
392 | If 8-bit MMIO register operations are not supported, then ASSERT().\r | |
393 | \r | |
394 | @param Address The MMIO register to read.\r | |
395 | \r | |
396 | @return The value read.\r | |
397 | \r | |
398 | **/\r | |
399 | UINT8\r | |
400 | EFIAPI\r | |
401 | MmioRead8 (\r | |
402 | IN UINTN Address\r | |
403 | )\r | |
404 | {\r | |
405 | return (UINT8)MmioReadWorker (Address, EfiCpuIoWidthUint8);\r | |
406 | }\r | |
407 | \r | |
408 | /**\r | |
409 | Writes an 8-bit MMIO register.\r | |
410 | \r | |
411 | Writes the 8-bit MMIO register specified by Address with the value specified\r | |
412 | by Value and returns Value. This function must guarantee that all MMIO read\r | |
413 | and write operations are serialized.\r | |
414 | \r | |
415 | If 8-bit MMIO register operations are not supported, then ASSERT().\r | |
416 | \r | |
417 | @param Address The MMIO register to write.\r | |
418 | @param Value The value to write to the MMIO register.\r | |
419 | \r | |
420 | **/\r | |
421 | UINT8\r | |
422 | EFIAPI\r | |
423 | MmioWrite8 (\r | |
424 | IN UINTN Address,\r | |
425 | IN UINT8 Value\r | |
426 | )\r | |
427 | {\r | |
428 | return (UINT8)MmioWriteWorker (Address, EfiCpuIoWidthUint8, Value);\r | |
429 | }\r | |
430 | \r | |
431 | /**\r | |
432 | Reads a 16-bit MMIO register.\r | |
433 | \r | |
434 | Reads the 16-bit MMIO register specified by Address. The 16-bit read value is\r | |
435 | returned. This function must guarantee that all MMIO read and write\r | |
436 | operations are serialized.\r | |
437 | \r | |
438 | If 16-bit MMIO register operations are not supported, then ASSERT().\r | |
439 | \r | |
440 | @param Address The MMIO register to read.\r | |
441 | \r | |
442 | @return The value read.\r | |
443 | \r | |
444 | **/\r | |
445 | UINT16\r | |
446 | EFIAPI\r | |
447 | MmioRead16 (\r | |
448 | IN UINTN Address\r | |
449 | )\r | |
450 | {\r | |
19b362e8 | 451 | //\r |
452 | // Make sure Address is aligned on a 16-bit boundary.\r | |
453 | //\r | |
454 | ASSERT ((Address & 1) == 0);\r | |
878ddf1f | 455 | return (UINT16)MmioReadWorker (Address, EfiCpuIoWidthUint16);\r |
456 | }\r | |
457 | \r | |
458 | /**\r | |
459 | Writes a 16-bit MMIO register.\r | |
460 | \r | |
461 | Writes the 16-bit MMIO register specified by Address with the value specified\r | |
462 | by Value and returns Value. This function must guarantee that all MMIO read\r | |
463 | and write operations are serialized.\r | |
464 | \r | |
465 | If 16-bit MMIO register operations are not supported, then ASSERT().\r | |
466 | \r | |
467 | @param Address The MMIO register to write.\r | |
468 | @param Value The value to write to the MMIO register.\r | |
469 | \r | |
470 | **/\r | |
471 | UINT16\r | |
472 | EFIAPI\r | |
473 | MmioWrite16 (\r | |
474 | IN UINTN Address,\r | |
475 | IN UINT16 Value\r | |
476 | )\r | |
477 | {\r | |
19b362e8 | 478 | //\r |
479 | // Make sure Address is aligned on a 16-bit boundary.\r | |
480 | //\r | |
481 | ASSERT ((Address & 1) == 0);\r | |
878ddf1f | 482 | return (UINT16)MmioWriteWorker (Address, EfiCpuIoWidthUint16, Value);\r |
483 | }\r | |
484 | \r | |
485 | /**\r | |
486 | Reads a 32-bit MMIO register.\r | |
487 | \r | |
488 | Reads the 32-bit MMIO register specified by Address. The 32-bit read value is\r | |
489 | returned. This function must guarantee that all MMIO read and write\r | |
490 | operations are serialized.\r | |
491 | \r | |
492 | If 32-bit MMIO register operations are not supported, then ASSERT().\r | |
493 | \r | |
494 | @param Address The MMIO register to read.\r | |
495 | \r | |
496 | @return The value read.\r | |
497 | \r | |
498 | **/\r | |
499 | UINT32\r | |
500 | EFIAPI\r | |
501 | MmioRead32 (\r | |
502 | IN UINTN Address\r | |
503 | )\r | |
504 | {\r | |
19b362e8 | 505 | //\r |
506 | // Make sure Address is aligned on a 32-bit boundary.\r | |
507 | //\r | |
508 | ASSERT ((Address & 3) == 0);\r | |
878ddf1f | 509 | return (UINT32)MmioReadWorker (Address, EfiCpuIoWidthUint32);\r |
510 | }\r | |
511 | \r | |
512 | /**\r | |
513 | Writes a 32-bit MMIO register.\r | |
514 | \r | |
515 | Writes the 32-bit MMIO register specified by Address with the value specified\r | |
516 | by Value and returns Value. This function must guarantee that all MMIO read\r | |
517 | and write operations are serialized.\r | |
518 | \r | |
519 | If 32-bit MMIO register operations are not supported, then ASSERT().\r | |
520 | \r | |
521 | @param Address The MMIO register to write.\r | |
522 | @param Value The value to write to the MMIO register.\r | |
523 | \r | |
524 | **/\r | |
525 | UINT32\r | |
526 | EFIAPI\r | |
527 | MmioWrite32 (\r | |
528 | IN UINTN Address,\r | |
529 | IN UINT32 Value\r | |
530 | )\r | |
531 | {\r | |
19b362e8 | 532 | //\r |
533 | // Make sure Address is aligned on a 32-bit boundary.\r | |
534 | //\r | |
535 | ASSERT ((Address & 3) == 0);\r | |
878ddf1f | 536 | return (UINT32)MmioWriteWorker (Address, EfiCpuIoWidthUint32, Value);\r |
537 | }\r | |
538 | \r | |
539 | /**\r | |
540 | Reads a 64-bit MMIO register.\r | |
541 | \r | |
542 | Reads the 64-bit MMIO register specified by Address. The 64-bit read value is\r | |
543 | returned. This function must guarantee that all MMIO read and write\r | |
544 | operations are serialized.\r | |
545 | \r | |
546 | If 64-bit MMIO register operations are not supported, then ASSERT().\r | |
547 | \r | |
548 | @param Address The MMIO register to read.\r | |
549 | \r | |
550 | @return The value read.\r | |
551 | \r | |
552 | **/\r | |
553 | UINT64\r | |
554 | EFIAPI\r | |
555 | MmioRead64 (\r | |
556 | IN UINTN Address\r | |
557 | )\r | |
558 | {\r | |
19b362e8 | 559 | //\r |
560 | // Make sure Address is aligned on a 64-bit boundary.\r | |
561 | //\r | |
562 | ASSERT ((Address & 7) == 0);\r | |
878ddf1f | 563 | return (UINT64)MmioReadWorker (Address, EfiCpuIoWidthUint64);\r |
564 | }\r | |
565 | \r | |
566 | /**\r | |
567 | Writes a 64-bit MMIO register.\r | |
568 | \r | |
569 | Writes the 64-bit MMIO register specified by Address with the value specified\r | |
570 | by Value and returns Value. This function must guarantee that all MMIO read\r | |
571 | and write operations are serialized.\r | |
572 | \r | |
573 | If 64-bit MMIO register operations are not supported, then ASSERT().\r | |
574 | \r | |
575 | @param Address The MMIO register to write.\r | |
576 | @param Value The value to write to the MMIO register.\r | |
577 | \r | |
578 | **/\r | |
579 | UINT64\r | |
580 | EFIAPI\r | |
581 | MmioWrite64 (\r | |
582 | IN UINTN Address,\r | |
583 | IN UINT64 Value\r | |
584 | )\r | |
585 | {\r | |
19b362e8 | 586 | //\r |
587 | // Make sure Address is aligned on a 64-bit boundary.\r | |
588 | //\r | |
589 | ASSERT ((Address & 7) == 0);\r | |
878ddf1f | 590 | return (UINT64)MmioWriteWorker (Address, EfiCpuIoWidthUint64, Value);\r |
591 | }\r |