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dd51a993 | 1 | /** @file\r |
484c7785 | 2 | Implementation of SmBusLib class library for DXE phase.\r |
dd51a993 | 3 | \r |
4 | Copyright (c) 2006, Intel Corporation<BR>\r | |
bad46384 | 5 | All rights reserved. This program and the accompanying materials\r |
6 | are licensed and made available under the terms and conditions of the BSD License\r | |
7 | which accompanies this distribution. The full text of the license may be found at\r | |
8 | http://opensource.org/licenses/bsd-license.php\r | |
9 | \r | |
10 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
11 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
dd51a993 | 12 | \r |
13 | \r | |
dd51a993 | 14 | **/\r |
15 | \r | |
16 | #include "InternalSmbusLib.h"\r | |
17 | \r | |
18 | /**\r | |
19 | Executes an SMBUS quick read command.\r | |
20 | \r | |
21 | Executes an SMBUS quick read command on the SMBUS device specified by SmBusAddress.\r | |
22 | Only the SMBUS slave address field of SmBusAddress is required.\r | |
23 | If Status is not NULL, then the status of the executed command is returned in Status.\r | |
24 | If PEC is set in SmBusAddress, then ASSERT().\r | |
25 | If Command in SmBusAddress is not zero, then ASSERT().\r | |
26 | If Length in SmBusAddress is not zero, then ASSERT().\r | |
27 | If any reserved bits of SmBusAddress are set, then ASSERT().\r | |
28 | \r | |
71871514 | 29 | @param SmBusAddress Address that encodes the SMBUS Slave Address,\r |
30 | SMBUS Command, SMBUS Data Length, and PEC.\r | |
31 | @param Status Return status for the executed command.\r | |
32 | This is an optional parameter and may be NULL.\r | |
33 | RETURN_SUCCESS The SMBUS command was executed.\r | |
34 | RETURN_TIMEOUT A timeout occurred while executing the SMBUS command.\r | |
35 | RETURN_DEVICE_ERROR The request was not completed because a failure\r | |
36 | reflected in the Host Status Register bit. Device errors are a result\r | |
37 | of a transaction collision, illegal command field, unclaimed cycle\r | |
38 | (host initiated), or bus errors (collisions).\r | |
39 | RETURN_UNSUPPORTED The SMBus operation is not supported.\r | |
dd51a993 | 40 | \r |
41 | **/\r | |
42 | VOID\r | |
43 | EFIAPI\r | |
44 | SmBusQuickRead (\r | |
45 | IN UINTN SmBusAddress,\r | |
46 | OUT RETURN_STATUS *Status OPTIONAL\r | |
47 | )\r | |
48 | {\r | |
49 | ASSERT (!SMBUS_LIB_PEC (SmBusAddress));\r | |
50 | ASSERT (SMBUS_LIB_COMMAND (SmBusAddress) == 0);\r | |
51 | ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);\r | |
2d8debe7 | 52 | ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);\r |
dd51a993 | 53 | \r |
54 | InternalSmBusExec (EfiSmbusQuickRead, SmBusAddress, 0, NULL, Status);\r | |
55 | }\r | |
56 | \r | |
57 | /**\r | |
58 | Executes an SMBUS quick write command.\r | |
59 | \r | |
60 | Executes an SMBUS quick write command on the SMBUS device specified by SmBusAddress.\r | |
61 | Only the SMBUS slave address field of SmBusAddress is required.\r | |
62 | If Status is not NULL, then the status of the executed command is returned in Status.\r | |
63 | If PEC is set in SmBusAddress, then ASSERT().\r | |
64 | If Command in SmBusAddress is not zero, then ASSERT().\r | |
65 | If Length in SmBusAddress is not zero, then ASSERT().\r | |
66 | If any reserved bits of SmBusAddress are set, then ASSERT().\r | |
67 | \r | |
71871514 | 68 | @param SmBusAddress Address that encodes the SMBUS Slave Address,\r |
69 | SMBUS Command, SMBUS Data Length, and PEC.\r | |
70 | @param Status Return status for the executed command.\r | |
71 | This is an optional parameter and may be NULL.\r | |
72 | RETURN_SUCCESS The SMBUS command was executed.\r | |
73 | RETURN_TIMEOUT A timeout occurred while executing the SMBUS command.\r | |
74 | RETURN_DEVICE_ERROR The request was not completed because a failure\r | |
75 | reflected in the Host Status Register bit. Device errors are a result\r | |
76 | of a transaction collision, illegal command field, unclaimed cycle\r | |
77 | (host initiated), or bus errors (collisions).\r | |
78 | RETURN_UNSUPPORTED The SMBus operation is not supported.\r | |
dd51a993 | 79 | \r |
80 | **/\r | |
81 | VOID\r | |
82 | EFIAPI\r | |
83 | SmBusQuickWrite (\r | |
84 | IN UINTN SmBusAddress,\r | |
85 | OUT RETURN_STATUS *Status OPTIONAL\r | |
86 | )\r | |
87 | {\r | |
88 | ASSERT (!SMBUS_LIB_PEC (SmBusAddress));\r | |
89 | ASSERT (SMBUS_LIB_COMMAND (SmBusAddress) == 0);\r | |
90 | ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);\r | |
2d8debe7 | 91 | ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);\r |
dd51a993 | 92 | \r |
93 | InternalSmBusExec (EfiSmbusQuickWrite, SmBusAddress, 0, NULL, Status);\r | |
94 | }\r | |
95 | \r | |
96 | /**\r | |
97 | Executes an SMBUS receive byte command.\r | |
98 | \r | |
99 | Executes an SMBUS receive byte command on the SMBUS device specified by SmBusAddress.\r | |
100 | Only the SMBUS slave address field of SmBusAddress is required.\r | |
101 | The byte received from the SMBUS is returned.\r | |
102 | If Status is not NULL, then the status of the executed command is returned in Status.\r | |
103 | If Command in SmBusAddress is not zero, then ASSERT().\r | |
104 | If Length in SmBusAddress is not zero, then ASSERT().\r | |
105 | If any reserved bits of SmBusAddress are set, then ASSERT().\r | |
106 | \r | |
71871514 | 107 | @param SmBusAddress Address that encodes the SMBUS Slave Address,\r |
108 | SMBUS Command, SMBUS Data Length, and PEC.\r | |
109 | @param Status Return status for the executed command.\r | |
110 | This is an optional parameter and may be NULL.\r | |
111 | RETURN_SUCCESS The SMBUS command was executed.\r | |
112 | RETURN_TIMEOUT A timeout occurred while executing the SMBUS command.\r | |
113 | RETURN_DEVICE_ERROR The request was not completed because a failure\r | |
114 | reflected in the Host Status Register bit. Device errors are a result\r | |
115 | of a transaction collision, illegal command field, unclaimed cycle\r | |
116 | (host initiated), or bus errors (collisions).\r | |
117 | RETURN_CRC_ERROR The checksum is not correct (PEC is incorrect)\r | |
118 | RETURN_UNSUPPORTED The SMBus operation is not supported.\r | |
dd51a993 | 119 | \r |
120 | @return The byte received from the SMBUS.\r | |
121 | \r | |
122 | **/\r | |
123 | UINT8\r | |
124 | EFIAPI\r | |
125 | SmBusReceiveByte (\r | |
126 | IN UINTN SmBusAddress,\r | |
127 | OUT RETURN_STATUS *Status OPTIONAL\r | |
128 | )\r | |
129 | {\r | |
130 | UINT8 Byte;\r | |
131 | \r | |
132 | ASSERT (SMBUS_LIB_COMMAND (SmBusAddress) == 0);\r | |
133 | ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);\r | |
2d8debe7 | 134 | ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);\r |
dd51a993 | 135 | \r |
136 | InternalSmBusExec (EfiSmbusReceiveByte, SmBusAddress, 1, &Byte, Status);\r | |
137 | \r | |
138 | return Byte;\r | |
139 | }\r | |
140 | \r | |
141 | /**\r | |
142 | Executes an SMBUS send byte command.\r | |
143 | \r | |
144 | Executes an SMBUS send byte command on the SMBUS device specified by SmBusAddress.\r | |
145 | The byte specified by Value is sent.\r | |
146 | Only the SMBUS slave address field of SmBusAddress is required. Value is returned.\r | |
147 | If Status is not NULL, then the status of the executed command is returned in Status.\r | |
148 | If Command in SmBusAddress is not zero, then ASSERT().\r | |
149 | If Length in SmBusAddress is not zero, then ASSERT().\r | |
150 | If any reserved bits of SmBusAddress are set, then ASSERT().\r | |
151 | \r | |
71871514 | 152 | @param SmBusAddress Address that encodes the SMBUS Slave Address,\r |
153 | SMBUS Command, SMBUS Data Length, and PEC.\r | |
154 | @param Value The 8-bit value to send.\r | |
155 | @param Status Return status for the executed command.\r | |
156 | This is an optional parameter and may be NULL.\r | |
157 | RETURN_SUCCESS The SMBUS command was executed.\r | |
158 | RETURN_TIMEOUT A timeout occurred while executing the SMBUS command.\r | |
159 | RETURN_DEVICE_ERROR The request was not completed because a failure\r | |
160 | reflected in the Host Status Register bit. Device errors are a result\r | |
161 | of a transaction collision, illegal command field, unclaimed cycle\r | |
162 | (host initiated), or bus errors (collisions).\r | |
163 | RETURN_CRC_ERROR The checksum is not correct (PEC is incorrect)\r | |
164 | RETURN_UNSUPPORTED The SMBus operation is not supported.\r | |
dd51a993 | 165 | \r |
166 | @return The parameter of Value.\r | |
167 | \r | |
168 | **/\r | |
169 | UINT8\r | |
170 | EFIAPI\r | |
171 | SmBusSendByte (\r | |
172 | IN UINTN SmBusAddress,\r | |
173 | IN UINT8 Value,\r | |
174 | OUT RETURN_STATUS *Status OPTIONAL\r | |
175 | )\r | |
176 | {\r | |
177 | UINT8 Byte;\r | |
178 | \r | |
179 | ASSERT (SMBUS_LIB_COMMAND (SmBusAddress) == 0);\r | |
180 | ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);\r | |
2d8debe7 | 181 | ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);\r |
dd51a993 | 182 | \r |
183 | Byte = Value;\r | |
184 | InternalSmBusExec (EfiSmbusSendByte, SmBusAddress, 1, &Byte, Status);\r | |
185 | \r | |
186 | return Value;\r | |
187 | }\r | |
188 | \r | |
189 | /**\r | |
190 | Executes an SMBUS read data byte command.\r | |
191 | \r | |
192 | Executes an SMBUS read data byte command on the SMBUS device specified by SmBusAddress.\r | |
193 | Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.\r | |
194 | The 8-bit value read from the SMBUS is returned.\r | |
195 | If Status is not NULL, then the status of the executed command is returned in Status.\r | |
196 | If Length in SmBusAddress is not zero, then ASSERT().\r | |
197 | If any reserved bits of SmBusAddress are set, then ASSERT().\r | |
198 | \r | |
199 | @param SmBusAddress Address that encodes the SMBUS Slave Address,\r | |
200 | SMBUS Command, SMBUS Data Length, and PEC.\r | |
71871514 | 201 | @param Status Return status for the executed command.\r |
202 | This is an optional parameter and may be NULL.\r | |
203 | RETURN_SUCCESS The SMBUS command was executed.\r | |
204 | RETURN_TIMEOUT A timeout occurred while executing the SMBUS command.\r | |
205 | RETURN_DEVICE_ERROR The request was not completed because a failure\r | |
206 | reflected in the Host Status Register bit. Device errors are a result\r | |
207 | of a transaction collision, illegal command field, unclaimed cycle\r | |
208 | (host initiated), or bus errors (collisions).\r | |
209 | RETURN_CRC_ERROR The checksum is not correct (PEC is incorrect)\r | |
210 | RETURN_UNSUPPORTED The SMBus operation is not supported.\r | |
dd51a993 | 211 | \r |
212 | @return The byte read from the SMBUS.\r | |
213 | \r | |
214 | **/\r | |
215 | UINT8\r | |
216 | EFIAPI\r | |
217 | SmBusReadDataByte (\r | |
218 | IN UINTN SmBusAddress,\r | |
219 | OUT RETURN_STATUS *Status OPTIONAL\r | |
220 | )\r | |
221 | {\r | |
222 | UINT8 Byte;\r | |
223 | \r | |
224 | ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);\r | |
2d8debe7 | 225 | ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);\r |
dd51a993 | 226 | \r |
227 | InternalSmBusExec (EfiSmbusReadByte, SmBusAddress, 1, &Byte, Status);\r | |
bad46384 | 228 | \r |
dd51a993 | 229 | return Byte;\r |
230 | }\r | |
231 | \r | |
232 | /**\r | |
233 | Executes an SMBUS write data byte command.\r | |
234 | \r | |
235 | Executes an SMBUS write data byte command on the SMBUS device specified by SmBusAddress.\r | |
236 | The 8-bit value specified by Value is written.\r | |
237 | Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.\r | |
238 | Value is returned.\r | |
239 | If Status is not NULL, then the status of the executed command is returned in Status.\r | |
240 | If Length in SmBusAddress is not zero, then ASSERT().\r | |
241 | If any reserved bits of SmBusAddress are set, then ASSERT().\r | |
242 | \r | |
71871514 | 243 | @param SmBusAddress Address that encodes the SMBUS Slave Address,\r |
244 | SMBUS Command, SMBUS Data Length, and PEC.\r | |
245 | @param Value The 8-bit value to write.\r | |
246 | @param Status Return status for the executed command.\r | |
247 | This is an optional parameter and may be NULL.\r | |
248 | RETURN_SUCCESS The SMBUS command was executed.\r | |
249 | RETURN_TIMEOUT A timeout occurred while executing the SMBUS command.\r | |
250 | RETURN_DEVICE_ERROR The request was not completed because a failure\r | |
251 | reflected in the Host Status Register bit. Device errors are a result\r | |
252 | of a transaction collision, illegal command field, unclaimed cycle\r | |
253 | (host initiated), or bus errors (collisions).\r | |
254 | RETURN_CRC_ERROR The checksum is not correct (PEC is incorrect)\r | |
255 | RETURN_UNSUPPORTED The SMBus operation is not supported.\r | |
dd51a993 | 256 | \r |
257 | @return The parameter of Value.\r | |
258 | \r | |
259 | **/\r | |
260 | UINT8\r | |
261 | EFIAPI\r | |
262 | SmBusWriteDataByte (\r | |
263 | IN UINTN SmBusAddress,\r | |
264 | IN UINT8 Value,\r | |
265 | OUT RETURN_STATUS *Status OPTIONAL\r | |
266 | )\r | |
267 | {\r | |
268 | UINT8 Byte;\r | |
269 | \r | |
270 | ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);\r | |
2d8debe7 | 271 | ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);\r |
dd51a993 | 272 | \r |
273 | Byte = Value;\r | |
274 | InternalSmBusExec (EfiSmbusWriteByte, SmBusAddress, 1, &Byte, Status);\r | |
bad46384 | 275 | \r |
dd51a993 | 276 | return Value;\r |
277 | }\r | |
278 | \r | |
279 | /**\r | |
280 | Executes an SMBUS read data word command.\r | |
281 | \r | |
282 | Executes an SMBUS read data word command on the SMBUS device specified by SmBusAddress.\r | |
283 | Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.\r | |
284 | The 16-bit value read from the SMBUS is returned.\r | |
285 | If Status is not NULL, then the status of the executed command is returned in Status.\r | |
286 | If Length in SmBusAddress is not zero, then ASSERT().\r | |
287 | If any reserved bits of SmBusAddress are set, then ASSERT().\r | |
71871514 | 288 | \r |
289 | @param SmBusAddress Address that encodes the SMBUS Slave Address,\r | |
290 | SMBUS Command, SMBUS Data Length, and PEC.\r | |
291 | @param Status Return status for the executed command.\r | |
292 | This is an optional parameter and may be NULL.\r | |
293 | RETURN_SUCCESS The SMBUS command was executed.\r | |
294 | RETURN_TIMEOUT A timeout occurred while executing the SMBUS command.\r | |
295 | RETURN_DEVICE_ERROR The request was not completed because a failure\r | |
296 | reflected in the Host Status Register bit. Device errors are a result\r | |
297 | of a transaction collision, illegal command field, unclaimed cycle\r | |
298 | (host initiated), or bus errors (collisions).\r | |
299 | RETURN_CRC_ERROR The checksum is not correct (PEC is incorrect)\r | |
300 | RETURN_UNSUPPORTED The SMBus operation is not supported.\r | |
dd51a993 | 301 | \r |
302 | @return The byte read from the SMBUS.\r | |
303 | \r | |
304 | **/\r | |
305 | UINT16\r | |
306 | EFIAPI\r | |
307 | SmBusReadDataWord (\r | |
308 | IN UINTN SmBusAddress,\r | |
309 | OUT RETURN_STATUS *Status OPTIONAL\r | |
310 | )\r | |
311 | {\r | |
312 | UINT16 Word;\r | |
313 | \r | |
314 | ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);\r | |
2d8debe7 | 315 | ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);\r |
dd51a993 | 316 | \r |
317 | InternalSmBusExec (EfiSmbusReadWord, SmBusAddress, 2, &Word, Status);\r | |
bad46384 | 318 | \r |
dd51a993 | 319 | return Word;\r |
320 | }\r | |
321 | \r | |
322 | /**\r | |
323 | Executes an SMBUS write data word command.\r | |
324 | \r | |
325 | Executes an SMBUS write data word command on the SMBUS device specified by SmBusAddress.\r | |
326 | The 16-bit value specified by Value is written.\r | |
327 | Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.\r | |
328 | Value is returned.\r | |
329 | If Status is not NULL, then the status of the executed command is returned in Status.\r | |
330 | If Length in SmBusAddress is not zero, then ASSERT().\r | |
331 | If any reserved bits of SmBusAddress are set, then ASSERT().\r | |
332 | \r | |
71871514 | 333 | @param SmBusAddress Address that encodes the SMBUS Slave Address,\r |
334 | SMBUS Command, SMBUS Data Length, and PEC.\r | |
335 | @param Value The 16-bit value to write.\r | |
336 | @param Status Return status for the executed command.\r | |
337 | This is an optional parameter and may be NULL.\r | |
338 | RETURN_SUCCESS The SMBUS command was executed.\r | |
339 | RETURN_TIMEOUT A timeout occurred while executing the SMBUS command.\r | |
340 | RETURN_DEVICE_ERROR The request was not completed because a failure\r | |
341 | reflected in the Host Status Register bit. Device errors are a result\r | |
342 | of a transaction collision, illegal command field, unclaimed cycle\r | |
343 | (host initiated), or bus errors (collisions).\r | |
344 | RETURN_CRC_ERROR The checksum is not correct (PEC is incorrect)\r | |
345 | RETURN_UNSUPPORTED The SMBus operation is not supported.\r | |
dd51a993 | 346 | \r |
347 | @return The parameter of Value.\r | |
348 | \r | |
349 | **/\r | |
350 | UINT16\r | |
351 | EFIAPI\r | |
352 | SmBusWriteDataWord (\r | |
353 | IN UINTN SmBusAddress,\r | |
354 | IN UINT16 Value,\r | |
355 | OUT RETURN_STATUS *Status OPTIONAL\r | |
356 | )\r | |
357 | {\r | |
358 | UINT16 Word;\r | |
359 | \r | |
360 | ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);\r | |
2d8debe7 | 361 | ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);\r |
dd51a993 | 362 | \r |
363 | Word = Value;\r | |
364 | InternalSmBusExec (EfiSmbusWriteWord, SmBusAddress, 2, &Word, Status);\r | |
365 | \r | |
366 | return Value;\r | |
367 | }\r | |
368 | \r | |
369 | /**\r | |
370 | Executes an SMBUS process call command.\r | |
371 | \r | |
372 | Executes an SMBUS process call command on the SMBUS device specified by SmBusAddress.\r | |
373 | The 16-bit value specified by Value is written.\r | |
374 | Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.\r | |
375 | The 16-bit value returned by the process call command is returned.\r | |
376 | If Status is not NULL, then the status of the executed command is returned in Status.\r | |
377 | If Length in SmBusAddress is not zero, then ASSERT().\r | |
378 | If any reserved bits of SmBusAddress are set, then ASSERT().\r | |
379 | \r | |
71871514 | 380 | @param SmBusAddress Address that encodes the SMBUS Slave Address,\r |
381 | SMBUS Command, SMBUS Data Length, and PEC.\r | |
382 | @param Value The 16-bit value to write.\r | |
383 | @param Status Return status for the executed command.\r | |
384 | This is an optional parameter and may be NULL.\r | |
385 | RETURN_SUCCESS The SMBUS command was executed.\r | |
386 | RETURN_TIMEOUT A timeout occurred while executing the SMBUS command.\r | |
387 | RETURN_DEVICE_ERROR The request was not completed because a failure\r | |
388 | reflected in the Host Status Register bit. Device errors are a result\r | |
389 | of a transaction collision, illegal command field, unclaimed cycle\r | |
390 | (host initiated), or bus errors (collisions).\r | |
391 | RETURN_CRC_ERROR The checksum is not correct (PEC is incorrect)\r | |
392 | RETURN_UNSUPPORTED The SMBus operation is not supported.\r | |
dd51a993 | 393 | \r |
394 | @return The 16-bit value returned by the process call command.\r | |
395 | \r | |
396 | **/\r | |
397 | UINT16\r | |
398 | EFIAPI\r | |
399 | SmBusProcessCall (\r | |
400 | IN UINTN SmBusAddress,\r | |
401 | IN UINT16 Value,\r | |
402 | OUT RETURN_STATUS *Status OPTIONAL\r | |
403 | )\r | |
404 | {\r | |
405 | ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);\r | |
2d8debe7 | 406 | ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);\r |
dd51a993 | 407 | \r |
408 | InternalSmBusExec (EfiSmbusProcessCall, SmBusAddress, 2, &Value, Status);\r | |
bad46384 | 409 | \r |
dd51a993 | 410 | return Value;\r |
411 | }\r | |
412 | \r | |
413 | /**\r | |
414 | Executes an SMBUS read block command.\r | |
415 | \r | |
416 | Executes an SMBUS read block command on the SMBUS device specified by SmBusAddress.\r | |
417 | Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.\r | |
418 | Bytes are read from the SMBUS and stored in Buffer.\r | |
419 | The number of bytes read is returned, and will never return a value larger than 32-bytes.\r | |
420 | If Status is not NULL, then the status of the executed command is returned in Status.\r | |
421 | It is the caller's responsibility to make sure Buffer is large enough for the total number of bytes read.\r | |
422 | SMBUS supports a maximum transfer size of 32 bytes, so Buffer does not need to be any larger than 32 bytes.\r | |
423 | If Length in SmBusAddress is not zero, then ASSERT().\r | |
424 | If Buffer is NULL, then ASSERT().\r | |
425 | If any reserved bits of SmBusAddress are set, then ASSERT().\r | |
426 | \r | |
71871514 | 427 | @param SmBusAddress Address that encodes the SMBUS Slave Address,\r |
428 | SMBUS Command, SMBUS Data Length, and PEC.\r | |
429 | @param Buffer Pointer to the buffer to store the bytes read from the SMBUS.\r | |
430 | @param Status Return status for the executed command.\r | |
431 | This is an optional parameter and may be NULL.\r | |
432 | RETURN_SUCCESS The SMBUS command was executed.\r | |
433 | RETURN_TIMEOUT A timeout occurred while executing the SMBUS command.\r | |
434 | RETURN_DEVICE_ERROR The request was not completed because a failure\r | |
435 | reflected in the Host Status Register bit. Device errors are a result\r | |
436 | of a transaction collision, illegal command field, unclaimed cycle\r | |
437 | (host initiated), or bus errors (collisions).\r | |
438 | RETURN_CRC_ERROR The checksum is not correct (PEC is incorrect)\r | |
439 | RETURN_UNSUPPORTED The SMBus operation is not supported.\r | |
dd51a993 | 440 | \r |
441 | @return The number of bytes read.\r | |
442 | \r | |
443 | **/\r | |
444 | UINTN\r | |
445 | EFIAPI\r | |
446 | SmBusReadBlock (\r | |
447 | IN UINTN SmBusAddress,\r | |
448 | OUT VOID *Buffer,\r | |
449 | OUT RETURN_STATUS *Status OPTIONAL\r | |
450 | )\r | |
451 | {\r | |
452 | ASSERT (Buffer != NULL);\r | |
453 | ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);\r | |
2d8debe7 | 454 | ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);\r |
dd51a993 | 455 | \r |
456 | return InternalSmBusExec (EfiSmbusReadBlock, SmBusAddress, 0x20, Buffer, Status);\r | |
457 | }\r | |
458 | \r | |
459 | /**\r | |
460 | Executes an SMBUS write block command.\r | |
461 | \r | |
462 | Executes an SMBUS write block command on the SMBUS device specified by SmBusAddress.\r | |
463 | The SMBUS slave address, SMBUS command, and SMBUS length fields of SmBusAddress are required.\r | |
464 | Bytes are written to the SMBUS from Buffer.\r | |
465 | The number of bytes written is returned, and will never return a value larger than 32-bytes.\r | |
71871514 | 466 | If Status is not NULL, then the status of the executed command is returned in Status. \r |
dd51a993 | 467 | If Length in SmBusAddress is zero or greater than 32, then ASSERT().\r |
468 | If Buffer is NULL, then ASSERT().\r | |
469 | If any reserved bits of SmBusAddress are set, then ASSERT().\r | |
470 | \r | |
71871514 | 471 | @param SmBusAddress Address that encodes the SMBUS Slave Address,\r |
472 | MBUS Command, SMBUS Data Length, and PEC.\r | |
473 | @param Buffer Pointer to the buffer to store the bytes read from the SMBUS.\r | |
474 | @param Status Return status for the executed command.\r | |
475 | This is an optional parameter and may be NULL.\r | |
476 | RETURN_TIMEOUT A timeout occurred while executing the SMBUS command.\r | |
477 | RETURN_DEVICE_ERROR The request was not completed because a failure\r | |
478 | reflected in the Host Status Register bit. Device errors are a result\r | |
479 | of a transaction collision, illegal command field, unclaimed cycle\r | |
480 | (host initiated), or bus errors (collisions).\r | |
481 | RETURN_CRC_ERROR The checksum is not correct (PEC is incorrect)\r | |
482 | RETURN_UNSUPPORTED The SMBus operation is not supported.\r | |
dd51a993 | 483 | \r |
484 | @return The number of bytes written.\r | |
485 | \r | |
486 | **/\r | |
487 | UINTN\r | |
488 | EFIAPI\r | |
489 | SmBusWriteBlock (\r | |
490 | IN UINTN SmBusAddress,\r | |
491 | OUT VOID *Buffer,\r | |
492 | OUT RETURN_STATUS *Status OPTIONAL\r | |
493 | )\r | |
494 | {\r | |
495 | UINTN Length;\r | |
496 | \r | |
497 | ASSERT (Buffer != NULL);\r | |
498 | ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) >= 1);\r | |
499 | ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) <= 32);\r | |
2d8debe7 | 500 | ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);\r |
dd51a993 | 501 | \r |
502 | Length = SMBUS_LIB_LENGTH (SmBusAddress);\r | |
503 | return InternalSmBusExec (EfiSmbusWriteBlock, SmBusAddress, Length, Buffer, Status);\r | |
504 | }\r | |
505 | \r | |
506 | /**\r | |
507 | Executes an SMBUS block process call command.\r | |
508 | \r | |
509 | Executes an SMBUS block process call command on the SMBUS device specified by SmBusAddress.\r | |
510 | The SMBUS slave address, SMBUS command, and SMBUS length fields of SmBusAddress are required.\r | |
511 | Bytes are written to the SMBUS from WriteBuffer. Bytes are then read from the SMBUS into ReadBuffer.\r | |
512 | If Status is not NULL, then the status of the executed command is returned in Status.\r | |
513 | It is the caller's responsibility to make sure ReadBuffer is large enough for the total number of bytes read.\r | |
514 | SMBUS supports a maximum transfer size of 32 bytes, so Buffer does not need to be any larger than 32 bytes.\r | |
515 | If Length in SmBusAddress is zero or greater than 32, then ASSERT().\r | |
516 | If WriteBuffer is NULL, then ASSERT().\r | |
517 | If ReadBuffer is NULL, then ASSERT().\r | |
518 | If any reserved bits of SmBusAddress are set, then ASSERT().\r | |
519 | \r | |
71871514 | 520 | @param SmBusAddress Address that encodes the SMBUS Slave Address,\r |
521 | SMBUS Command, SMBUS Data Length, and PEC.\r | |
522 | @param WriteBuffer Pointer to the buffer of bytes to write to the SMBUS.\r | |
523 | @param ReadBuffer Pointer to the buffer of bytes to read from the SMBUS.\r | |
524 | @param Status Return status for the executed command.\r | |
525 | This is an optional parameter and may be NULL.\r | |
526 | RETURN_TIMEOUT A timeout occurred while executing the SMBUS command.\r | |
527 | RETURN_DEVICE_ERROR The request was not completed because a failure\r | |
528 | reflected in the Host Status Register bit. Device errors are a result\r | |
529 | of a transaction collision, illegal command field, unclaimed cycle\r | |
530 | (host initiated), or bus errors (collisions).\r | |
531 | RETURN_CRC_ERROR The checksum is not correct (PEC is incorrect)\r | |
532 | RETURN_UNSUPPORTED The SMBus operation is not supported.\r | |
dd51a993 | 533 | \r |
534 | @return The number of bytes written.\r | |
535 | \r | |
536 | **/\r | |
537 | UINTN\r | |
538 | EFIAPI\r | |
539 | SmBusBlockProcessCall (\r | |
540 | IN UINTN SmBusAddress,\r | |
541 | IN VOID *WriteBuffer,\r | |
542 | OUT VOID *ReadBuffer,\r | |
543 | OUT RETURN_STATUS *Status OPTIONAL\r | |
544 | )\r | |
545 | {\r | |
546 | UINTN Length;\r | |
547 | \r | |
548 | ASSERT (WriteBuffer != NULL);\r | |
549 | ASSERT (ReadBuffer != NULL);\r | |
550 | ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) >= 1);\r | |
551 | ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) <= 32);\r | |
2d8debe7 | 552 | ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);\r |
dd51a993 | 553 | \r |
554 | Length = SMBUS_LIB_LENGTH (SmBusAddress);\r | |
555 | //\r | |
556 | // Assuming that ReadBuffer is large enough to save another memory copy.\r | |
557 | //\r | |
558 | ReadBuffer = CopyMem (ReadBuffer, WriteBuffer, Length);\r | |
559 | return InternalSmBusExec (EfiSmbusBWBRProcessCall, SmBusAddress, Length, ReadBuffer, Status);\r | |
560 | }\r |