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bf231ea6 | 1 | /** @file\r |
030cd1a2 | 2 | PEI Services Table Pointer Library for IA-32 and x64.\r |
bf231ea6 | 3 | \r |
ce02b0b9 | 4 | According to PI specification, the peiservice pointer is stored prior at IDT\r |
5 | table in IA32 and x64 architecture.\r | |
6 | \r | |
ffdb421c | 7 | Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>\r |
19388d29 | 8 | This program and the accompanying materials \r |
bf231ea6 A |
9 | are licensed and made available under the terms and conditions of the BSD License \r |
10 | which accompanies this distribution. The full text of the license may be found at \r | |
2fc59a00 | 11 | http://opensource.org/licenses/bsd-license.php. \r |
bf231ea6 A |
12 | \r |
13 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r | |
14 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r | |
15 | \r | |
16 | **/\r | |
c7d265a9 | 17 | \r |
5dd39dc6 | 18 | #include <PiPei.h>\r |
19 | \r | |
20 | #include <Library/BaseLib.h>\r | |
21 | #include <Library/PeiServicesTablePointerLib.h>\r | |
22 | #include <Library/DebugLib.h>\r | |
fcfd5fb0 | 23 | #include <Library/BaseMemoryLib.h>\r |
c7d265a9 | 24 | \r |
25 | /**\r | |
4b8157f9 | 26 | Retrieves the cached value of the PEI Services Table pointer.\r |
f38fdc74 | 27 | \r |
4b8157f9 | 28 | Returns the cached value of the PEI Services Table pointer in a CPU specific manner \r |
29 | as specified in the CPU binding section of the Platform Initialization Pre-EFI \r | |
30 | Initialization Core Interface Specification.\r | |
31 | \r | |
32 | If the cached PEI Services Table pointer is NULL, then ASSERT().\r | |
f38fdc74 | 33 | \r |
4b8157f9 | 34 | @return The pointer to PeiServices.\r |
c7d265a9 | 35 | \r |
36 | **/\r | |
5240b97c | 37 | CONST EFI_PEI_SERVICES **\r |
c7d265a9 | 38 | EFIAPI\r |
39 | GetPeiServicesTablePointer (\r | |
40 | VOID\r | |
41 | )\r | |
42 | {\r | |
5240b97c | 43 | CONST EFI_PEI_SERVICES **PeiServices;\r |
81c7803c | 44 | IA32_DESCRIPTOR Idtr;\r |
45 | \r | |
46 | AsmReadIdtr (&Idtr);\r | |
5240b97c | 47 | PeiServices = (CONST EFI_PEI_SERVICES **) (*(UINTN*)(Idtr.Base - sizeof (UINTN)));\r |
c7d265a9 | 48 | ASSERT (PeiServices != NULL);\r |
49 | return PeiServices;\r | |
50 | }\r | |
51 | \r | |
81c7803c | 52 | /**\r |
4b8157f9 | 53 | Caches a pointer PEI Services Table. \r |
54 | \r | |
55 | Caches the pointer to the PEI Services Table specified by PeiServicesTablePointer \r | |
56 | in a CPU specific manner as specified in the CPU binding section of the Platform Initialization \r | |
57 | Pre-EFI Initialization Core Interface Specification. \r | |
f38fdc74 | 58 | The function set the pointer of PEI services immediately preceding the IDT table\r |
59 | according to PI specification.\r | |
81c7803c | 60 | \r |
4b8157f9 | 61 | If PeiServicesTablePointer is NULL, then ASSERT().\r |
62 | \r | |
f38fdc74 | 63 | @param PeiServicesTablePointer The address of PeiServices pointer.\r |
81c7803c | 64 | **/\r |
65 | VOID\r | |
66 | EFIAPI\r | |
67 | SetPeiServicesTablePointer (\r | |
a86fda43 | 68 | IN CONST EFI_PEI_SERVICES ** PeiServicesTablePointer\r |
81c7803c | 69 | )\r |
70 | {\r | |
fcfd5fb0 | 71 | IA32_DESCRIPTOR Idtr;\r |
81c7803c | 72 | \r |
4b8157f9 | 73 | ASSERT (PeiServicesTablePointer != NULL);\r |
81c7803c | 74 | AsmReadIdtr (&Idtr);\r |
ffdb421c LG |
75 | (*(UINTN*)(Idtr.Base - sizeof (UINTN))) = (UINTN)PeiServicesTablePointer;\r |
76 | }\r | |
77 | \r | |
78 | /**\r | |
79 | Perform CPU specific actions required to migrate the PEI Services Table \r | |
80 | pointer from temporary RAM to permanent RAM.\r | |
81 | \r | |
82 | For IA32 CPUs, the PEI Services Table pointer is stored in the 4 bytes \r | |
83 | immediately preceding the Interrupt Descriptor Table (IDT) in memory.\r | |
84 | For X64 CPUs, the PEI Services Table pointer is stored in the 8 bytes \r | |
85 | immediately preceding the Interrupt Descriptor Table (IDT) in memory.\r | |
86 | For Itanium and ARM CPUs, a the PEI Services Table Pointer is stored in\r | |
87 | a dedicated CPU register. This means that there is no memory storage \r | |
88 | associated with storing the PEI Services Table pointer, so no additional \r | |
89 | migration actions are required for Itanium or ARM CPUs.\r | |
90 | \r | |
91 | If The cached PEI Services Table pointer is NULL, then ASSERT().\r | |
92 | If the permanent memory is allocated failed, then ASSERT().\r | |
93 | **/\r | |
94 | VOID\r | |
95 | EFIAPI\r | |
96 | MigratePeiServicesTablePointer (\r | |
8a835340 | 97 | VOID\r |
ffdb421c LG |
98 | )\r |
99 | {\r | |
100 | EFI_STATUS Status;\r | |
101 | IA32_DESCRIPTOR Idtr;\r | |
102 | EFI_PHYSICAL_ADDRESS IdtBase;\r | |
103 | CONST EFI_PEI_SERVICES **PeiServices;\r | |
104 | \r | |
105 | //\r | |
106 | // Get PEI Services Table pointer\r | |
107 | //\r | |
108 | AsmReadIdtr (&Idtr);\r | |
109 | PeiServices = (CONST EFI_PEI_SERVICES **) (*(UINTN*)(Idtr.Base - sizeof (UINTN)));\r | |
110 | ASSERT (PeiServices != NULL);\r | |
111 | //\r | |
112 | // Allocate the permanent memory.\r | |
113 | //\r | |
114 | Status = (*PeiServices)->AllocatePages (\r | |
115 | PeiServices, \r | |
116 | EfiBootServicesCode,\r | |
117 | EFI_SIZE_TO_PAGES(Idtr.Limit + 1 + sizeof (UINTN)),\r | |
118 | &IdtBase\r | |
119 | );\r | |
120 | ASSERT_EFI_ERROR (Status);\r | |
121 | //\r | |
122 | // Idt table needs to be migrated into memory.\r | |
123 | //\r | |
124 | CopyMem ((VOID *) (UINTN) IdtBase, (VOID *) (Idtr.Base - sizeof (UINTN)), Idtr.Limit + 1 + sizeof (UINTN));\r | |
125 | Idtr.Base = (UINTN) IdtBase + sizeof (UINTN);\r | |
126 | AsmWriteIdtr (&Idtr);\r | |
127 | \r | |
128 | return;\r | |
81c7803c | 129 | }\r |
130 | \r | |
81c7803c | 131 | \r |