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b7c5912a | 1 | /** @file\r |
2 | High-level Io/Mmio functions.\r | |
3 | \r | |
4 | All assertions for bit field operations are handled bit field functions in the\r | |
5 | Base Library.\r | |
6 | \r | |
94952554 | 7 | Copyright (c) 2009 - 2012, Intel Corporation. All rights reserved.<BR>\r |
9344f092 | 8 | SPDX-License-Identifier: BSD-2-Clause-Patent\r |
b7c5912a | 9 | \r |
b7c5912a | 10 | The following IoLib instances share the same version of this file:\r |
11 | \r | |
12 | BaseIoLibIntrinsic\r | |
13 | DxeIoLibCpuIo\r | |
14 | PeiIoLibCpuIo\r | |
15 | SmmIoLibCpuIo\r | |
16 | **/\r | |
17 | \r | |
b7c5912a | 18 | #include "SmmCpuIoLibInternal.h"\r |
19 | \r | |
20 | /**\r | |
21 | Reads an 8-bit I/O port, performs a bitwise OR, and writes the\r | |
22 | result back to the 8-bit I/O port.\r | |
23 | \r | |
24 | Reads the 8-bit I/O port specified by Port, performs a bitwise OR\r | |
25 | between the read result and the value specified by OrData, and writes the\r | |
26 | result to the 8-bit I/O port specified by Port. The value written to the I/O\r | |
27 | port is returned. This function must guarantee that all I/O read and write\r | |
28 | operations are serialized.\r | |
29 | \r | |
30 | If 8-bit I/O port operations are not supported, then ASSERT().\r | |
31 | \r | |
32 | @param Port The I/O port to write.\r | |
33 | @param OrData The value to OR with the read value from the I/O port.\r | |
34 | \r | |
35 | @return The value written back to the I/O port.\r | |
36 | \r | |
37 | **/\r | |
38 | UINT8\r | |
39 | EFIAPI\r | |
40 | IoOr8 (\r | |
2f88bd3a MK |
41 | IN UINTN Port,\r |
42 | IN UINT8 OrData\r | |
b7c5912a | 43 | )\r |
44 | {\r | |
2f88bd3a | 45 | return IoWrite8 (Port, (UINT8)(IoRead8 (Port) | OrData));\r |
b7c5912a | 46 | }\r |
47 | \r | |
48 | /**\r | |
49 | Reads an 8-bit I/O port, performs a bitwise AND, and writes the result back\r | |
50 | to the 8-bit I/O port.\r | |
51 | \r | |
52 | Reads the 8-bit I/O port specified by Port, performs a bitwise AND between\r | |
53 | the read result and the value specified by AndData, and writes the result to\r | |
54 | the 8-bit I/O port specified by Port. The value written to the I/O port is\r | |
55 | returned. This function must guarantee that all I/O read and write operations\r | |
56 | are serialized.\r | |
57 | \r | |
58 | If 8-bit I/O port operations are not supported, then ASSERT().\r | |
59 | \r | |
60 | @param Port The I/O port to write.\r | |
61 | @param AndData The value to AND with the read value from the I/O port.\r | |
62 | \r | |
63 | @return The value written back to the I/O port.\r | |
64 | \r | |
65 | **/\r | |
66 | UINT8\r | |
67 | EFIAPI\r | |
68 | IoAnd8 (\r | |
2f88bd3a MK |
69 | IN UINTN Port,\r |
70 | IN UINT8 AndData\r | |
b7c5912a | 71 | )\r |
72 | {\r | |
2f88bd3a | 73 | return IoWrite8 (Port, (UINT8)(IoRead8 (Port) & AndData));\r |
b7c5912a | 74 | }\r |
75 | \r | |
76 | /**\r | |
77 | Reads an 8-bit I/O port, performs a bitwise AND followed by a bitwise\r | |
78 | inclusive OR, and writes the result back to the 8-bit I/O port.\r | |
79 | \r | |
80 | Reads the 8-bit I/O port specified by Port, performs a bitwise AND between\r | |
81 | the read result and the value specified by AndData, performs a bitwise OR\r | |
82 | between the result of the AND operation and the value specified by OrData,\r | |
83 | and writes the result to the 8-bit I/O port specified by Port. The value\r | |
84 | written to the I/O port is returned. This function must guarantee that all\r | |
85 | I/O read and write operations are serialized.\r | |
86 | \r | |
87 | If 8-bit I/O port operations are not supported, then ASSERT().\r | |
88 | \r | |
89 | @param Port The I/O port to write.\r | |
90 | @param AndData The value to AND with the read value from the I/O port.\r | |
91 | @param OrData The value to OR with the result of the AND operation.\r | |
92 | \r | |
93 | @return The value written back to the I/O port.\r | |
94 | \r | |
95 | **/\r | |
96 | UINT8\r | |
97 | EFIAPI\r | |
98 | IoAndThenOr8 (\r | |
2f88bd3a MK |
99 | IN UINTN Port,\r |
100 | IN UINT8 AndData,\r | |
101 | IN UINT8 OrData\r | |
b7c5912a | 102 | )\r |
103 | {\r | |
2f88bd3a | 104 | return IoWrite8 (Port, (UINT8)((IoRead8 (Port) & AndData) | OrData));\r |
b7c5912a | 105 | }\r |
106 | \r | |
107 | /**\r | |
108 | Reads a bit field of an I/O register.\r | |
109 | \r | |
110 | Reads the bit field in an 8-bit I/O register. The bit field is specified by\r | |
111 | the StartBit and the EndBit. The value of the bit field is returned.\r | |
112 | \r | |
113 | If 8-bit I/O port operations are not supported, then ASSERT().\r | |
114 | If StartBit is greater than 7, then ASSERT().\r | |
115 | If EndBit is greater than 7, then ASSERT().\r | |
116 | If EndBit is less than StartBit, then ASSERT().\r | |
117 | \r | |
118 | @param Port The I/O port to read.\r | |
119 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
120 | Range 0..7.\r | |
121 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
122 | Range 0..7.\r | |
123 | \r | |
124 | @return The value read.\r | |
125 | \r | |
126 | **/\r | |
127 | UINT8\r | |
128 | EFIAPI\r | |
129 | IoBitFieldRead8 (\r | |
2f88bd3a MK |
130 | IN UINTN Port,\r |
131 | IN UINTN StartBit,\r | |
132 | IN UINTN EndBit\r | |
b7c5912a | 133 | )\r |
134 | {\r | |
135 | return BitFieldRead8 (IoRead8 (Port), StartBit, EndBit);\r | |
136 | }\r | |
137 | \r | |
138 | /**\r | |
139 | Writes a bit field to an I/O register.\r | |
140 | \r | |
141 | Writes Value to the bit field of the I/O register. The bit field is specified\r | |
142 | by the StartBit and the EndBit. All other bits in the destination I/O\r | |
143 | register are preserved. The value written to the I/O port is returned. Extra\r | |
144 | left bits in Value are stripped.\r | |
145 | \r | |
146 | If 8-bit I/O port operations are not supported, then ASSERT().\r | |
147 | If StartBit is greater than 7, then ASSERT().\r | |
148 | If EndBit is greater than 7, then ASSERT().\r | |
149 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 | 150 | If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
b7c5912a | 151 | \r |
152 | @param Port The I/O port to write.\r | |
153 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
154 | Range 0..7.\r | |
155 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
156 | Range 0..7.\r | |
2fc59a00 | 157 | @param Value The new value of the bit field.\r |
b7c5912a | 158 | \r |
159 | @return The value written back to the I/O port.\r | |
160 | \r | |
161 | **/\r | |
162 | UINT8\r | |
163 | EFIAPI\r | |
164 | IoBitFieldWrite8 (\r | |
2f88bd3a MK |
165 | IN UINTN Port,\r |
166 | IN UINTN StartBit,\r | |
167 | IN UINTN EndBit,\r | |
168 | IN UINT8 Value\r | |
b7c5912a | 169 | )\r |
170 | {\r | |
171 | return IoWrite8 (\r | |
172 | Port,\r | |
173 | BitFieldWrite8 (IoRead8 (Port), StartBit, EndBit, Value)\r | |
174 | );\r | |
175 | }\r | |
176 | \r | |
177 | /**\r | |
178 | Reads a bit field in an 8-bit port, performs a bitwise OR, and writes the\r | |
179 | result back to the bit field in the 8-bit port.\r | |
180 | \r | |
181 | Reads the 8-bit I/O port specified by Port, performs a bitwise OR\r | |
182 | between the read result and the value specified by OrData, and writes the\r | |
183 | result to the 8-bit I/O port specified by Port. The value written to the I/O\r | |
184 | port is returned. This function must guarantee that all I/O read and write\r | |
185 | operations are serialized. Extra left bits in OrData are stripped.\r | |
186 | \r | |
187 | If 8-bit I/O port operations are not supported, then ASSERT().\r | |
188 | If StartBit is greater than 7, then ASSERT().\r | |
189 | If EndBit is greater than 7, then ASSERT().\r | |
190 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 | 191 | If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
b7c5912a | 192 | \r |
193 | @param Port The I/O port to write.\r | |
194 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
195 | Range 0..7.\r | |
196 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
197 | Range 0..7.\r | |
198 | @param OrData The value to OR with the read value from the I/O port.\r | |
199 | \r | |
200 | @return The value written back to the I/O port.\r | |
201 | \r | |
202 | **/\r | |
203 | UINT8\r | |
204 | EFIAPI\r | |
205 | IoBitFieldOr8 (\r | |
2f88bd3a MK |
206 | IN UINTN Port,\r |
207 | IN UINTN StartBit,\r | |
208 | IN UINTN EndBit,\r | |
209 | IN UINT8 OrData\r | |
b7c5912a | 210 | )\r |
211 | {\r | |
212 | return IoWrite8 (\r | |
213 | Port,\r | |
214 | BitFieldOr8 (IoRead8 (Port), StartBit, EndBit, OrData)\r | |
215 | );\r | |
216 | }\r | |
217 | \r | |
218 | /**\r | |
219 | Reads a bit field in an 8-bit port, performs a bitwise AND, and writes the\r | |
220 | result back to the bit field in the 8-bit port.\r | |
221 | \r | |
222 | Reads the 8-bit I/O port specified by Port, performs a bitwise AND between\r | |
223 | the read result and the value specified by AndData, and writes the result to\r | |
224 | the 8-bit I/O port specified by Port. The value written to the I/O port is\r | |
225 | returned. This function must guarantee that all I/O read and write operations\r | |
226 | are serialized. Extra left bits in AndData are stripped.\r | |
227 | \r | |
228 | If 8-bit I/O port operations are not supported, then ASSERT().\r | |
229 | If StartBit is greater than 7, then ASSERT().\r | |
230 | If EndBit is greater than 7, then ASSERT().\r | |
231 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 | 232 | If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
b7c5912a | 233 | \r |
234 | @param Port The I/O port to write.\r | |
235 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
236 | Range 0..7.\r | |
237 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
238 | Range 0..7.\r | |
239 | @param AndData The value to AND with the read value from the I/O port.\r | |
240 | \r | |
241 | @return The value written back to the I/O port.\r | |
242 | \r | |
243 | **/\r | |
244 | UINT8\r | |
245 | EFIAPI\r | |
246 | IoBitFieldAnd8 (\r | |
2f88bd3a MK |
247 | IN UINTN Port,\r |
248 | IN UINTN StartBit,\r | |
249 | IN UINTN EndBit,\r | |
250 | IN UINT8 AndData\r | |
b7c5912a | 251 | )\r |
252 | {\r | |
253 | return IoWrite8 (\r | |
254 | Port,\r | |
255 | BitFieldAnd8 (IoRead8 (Port), StartBit, EndBit, AndData)\r | |
256 | );\r | |
257 | }\r | |
258 | \r | |
259 | /**\r | |
260 | Reads a bit field in an 8-bit port, performs a bitwise AND followed by a\r | |
261 | bitwise OR, and writes the result back to the bit field in the\r | |
262 | 8-bit port.\r | |
263 | \r | |
264 | Reads the 8-bit I/O port specified by Port, performs a bitwise AND followed\r | |
265 | by a bitwise OR between the read result and the value specified by\r | |
266 | AndData, and writes the result to the 8-bit I/O port specified by Port. The\r | |
267 | value written to the I/O port is returned. This function must guarantee that\r | |
268 | all I/O read and write operations are serialized. Extra left bits in both\r | |
269 | AndData and OrData are stripped.\r | |
270 | \r | |
271 | If 8-bit I/O port operations are not supported, then ASSERT().\r | |
272 | If StartBit is greater than 7, then ASSERT().\r | |
273 | If EndBit is greater than 7, then ASSERT().\r | |
274 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 LG |
275 | If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
276 | If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r | |
b7c5912a | 277 | \r |
278 | @param Port The I/O port to write.\r | |
279 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
280 | Range 0..7.\r | |
281 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
282 | Range 0..7.\r | |
283 | @param AndData The value to AND with the read value from the I/O port.\r | |
284 | @param OrData The value to OR with the result of the AND operation.\r | |
285 | \r | |
286 | @return The value written back to the I/O port.\r | |
287 | \r | |
288 | **/\r | |
289 | UINT8\r | |
290 | EFIAPI\r | |
291 | IoBitFieldAndThenOr8 (\r | |
2f88bd3a MK |
292 | IN UINTN Port,\r |
293 | IN UINTN StartBit,\r | |
294 | IN UINTN EndBit,\r | |
295 | IN UINT8 AndData,\r | |
296 | IN UINT8 OrData\r | |
b7c5912a | 297 | )\r |
298 | {\r | |
299 | return IoWrite8 (\r | |
300 | Port,\r | |
301 | BitFieldAndThenOr8 (IoRead8 (Port), StartBit, EndBit, AndData, OrData)\r | |
302 | );\r | |
303 | }\r | |
304 | \r | |
305 | /**\r | |
306 | Reads a 16-bit I/O port, performs a bitwise OR, and writes the\r | |
307 | result back to the 16-bit I/O port.\r | |
308 | \r | |
309 | Reads the 16-bit I/O port specified by Port, performs a bitwise OR\r | |
310 | between the read result and the value specified by OrData, and writes the\r | |
311 | result to the 16-bit I/O port specified by Port. The value written to the I/O\r | |
312 | port is returned. This function must guarantee that all I/O read and write\r | |
313 | operations are serialized.\r | |
314 | \r | |
315 | If 16-bit I/O port operations are not supported, then ASSERT().\r | |
316 | \r | |
317 | @param Port The I/O port to write.\r | |
318 | @param OrData The value to OR with the read value from the I/O port.\r | |
319 | \r | |
320 | @return The value written back to the I/O port.\r | |
321 | \r | |
322 | **/\r | |
323 | UINT16\r | |
324 | EFIAPI\r | |
325 | IoOr16 (\r | |
2f88bd3a MK |
326 | IN UINTN Port,\r |
327 | IN UINT16 OrData\r | |
b7c5912a | 328 | )\r |
329 | {\r | |
2f88bd3a | 330 | return IoWrite16 (Port, (UINT16)(IoRead16 (Port) | OrData));\r |
b7c5912a | 331 | }\r |
332 | \r | |
333 | /**\r | |
334 | Reads a 16-bit I/O port, performs a bitwise AND, and writes the result back\r | |
335 | to the 16-bit I/O port.\r | |
336 | \r | |
337 | Reads the 16-bit I/O port specified by Port, performs a bitwise AND between\r | |
338 | the read result and the value specified by AndData, and writes the result to\r | |
339 | the 16-bit I/O port specified by Port. The value written to the I/O port is\r | |
340 | returned. This function must guarantee that all I/O read and write operations\r | |
341 | are serialized.\r | |
342 | \r | |
343 | If 16-bit I/O port operations are not supported, then ASSERT().\r | |
344 | \r | |
345 | @param Port The I/O port to write.\r | |
346 | @param AndData The value to AND with the read value from the I/O port.\r | |
347 | \r | |
348 | @return The value written back to the I/O port.\r | |
349 | \r | |
350 | **/\r | |
351 | UINT16\r | |
352 | EFIAPI\r | |
353 | IoAnd16 (\r | |
2f88bd3a MK |
354 | IN UINTN Port,\r |
355 | IN UINT16 AndData\r | |
b7c5912a | 356 | )\r |
357 | {\r | |
2f88bd3a | 358 | return IoWrite16 (Port, (UINT16)(IoRead16 (Port) & AndData));\r |
b7c5912a | 359 | }\r |
360 | \r | |
361 | /**\r | |
362 | Reads a 16-bit I/O port, performs a bitwise AND followed by a bitwise\r | |
363 | inclusive OR, and writes the result back to the 16-bit I/O port.\r | |
364 | \r | |
365 | Reads the 16-bit I/O port specified by Port, performs a bitwise AND between\r | |
366 | the read result and the value specified by AndData, performs a bitwise OR\r | |
367 | between the result of the AND operation and the value specified by OrData,\r | |
368 | and writes the result to the 16-bit I/O port specified by Port. The value\r | |
369 | written to the I/O port is returned. This function must guarantee that all\r | |
370 | I/O read and write operations are serialized.\r | |
371 | \r | |
372 | If 16-bit I/O port operations are not supported, then ASSERT().\r | |
373 | \r | |
374 | @param Port The I/O port to write.\r | |
375 | @param AndData The value to AND with the read value from the I/O port.\r | |
376 | @param OrData The value to OR with the result of the AND operation.\r | |
377 | \r | |
378 | @return The value written back to the I/O port.\r | |
379 | \r | |
380 | **/\r | |
381 | UINT16\r | |
382 | EFIAPI\r | |
383 | IoAndThenOr16 (\r | |
2f88bd3a MK |
384 | IN UINTN Port,\r |
385 | IN UINT16 AndData,\r | |
386 | IN UINT16 OrData\r | |
b7c5912a | 387 | )\r |
388 | {\r | |
2f88bd3a | 389 | return IoWrite16 (Port, (UINT16)((IoRead16 (Port) & AndData) | OrData));\r |
b7c5912a | 390 | }\r |
391 | \r | |
392 | /**\r | |
393 | Reads a bit field of an I/O register.\r | |
394 | \r | |
395 | Reads the bit field in a 16-bit I/O register. The bit field is specified by\r | |
396 | the StartBit and the EndBit. The value of the bit field is returned.\r | |
397 | \r | |
398 | If 16-bit I/O port operations are not supported, then ASSERT().\r | |
399 | If StartBit is greater than 15, then ASSERT().\r | |
400 | If EndBit is greater than 15, then ASSERT().\r | |
401 | If EndBit is less than StartBit, then ASSERT().\r | |
402 | \r | |
403 | @param Port The I/O port to read.\r | |
404 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
405 | Range 0..15.\r | |
406 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
407 | Range 0..15.\r | |
408 | \r | |
409 | @return The value read.\r | |
410 | \r | |
411 | **/\r | |
412 | UINT16\r | |
413 | EFIAPI\r | |
414 | IoBitFieldRead16 (\r | |
2f88bd3a MK |
415 | IN UINTN Port,\r |
416 | IN UINTN StartBit,\r | |
417 | IN UINTN EndBit\r | |
b7c5912a | 418 | )\r |
419 | {\r | |
420 | return BitFieldRead16 (IoRead16 (Port), StartBit, EndBit);\r | |
421 | }\r | |
422 | \r | |
423 | /**\r | |
424 | Writes a bit field to an I/O register.\r | |
425 | \r | |
426 | Writes Value to the bit field of the I/O register. The bit field is specified\r | |
427 | by the StartBit and the EndBit. All other bits in the destination I/O\r | |
428 | register are preserved. The value written to the I/O port is returned. Extra\r | |
429 | left bits in Value are stripped.\r | |
430 | \r | |
431 | If 16-bit I/O port operations are not supported, then ASSERT().\r | |
432 | If StartBit is greater than 15, then ASSERT().\r | |
433 | If EndBit is greater than 15, then ASSERT().\r | |
434 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 | 435 | If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
b7c5912a | 436 | \r |
437 | @param Port The I/O port to write.\r | |
438 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
439 | Range 0..15.\r | |
440 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
441 | Range 0..15.\r | |
2fc59a00 | 442 | @param Value The new value of the bit field.\r |
b7c5912a | 443 | \r |
444 | @return The value written back to the I/O port.\r | |
445 | \r | |
446 | **/\r | |
447 | UINT16\r | |
448 | EFIAPI\r | |
449 | IoBitFieldWrite16 (\r | |
2f88bd3a MK |
450 | IN UINTN Port,\r |
451 | IN UINTN StartBit,\r | |
452 | IN UINTN EndBit,\r | |
453 | IN UINT16 Value\r | |
b7c5912a | 454 | )\r |
455 | {\r | |
456 | return IoWrite16 (\r | |
457 | Port,\r | |
458 | BitFieldWrite16 (IoRead16 (Port), StartBit, EndBit, Value)\r | |
459 | );\r | |
460 | }\r | |
461 | \r | |
462 | /**\r | |
463 | Reads a bit field in a 16-bit port, performs a bitwise OR, and writes the\r | |
464 | result back to the bit field in the 16-bit port.\r | |
465 | \r | |
466 | Reads the 16-bit I/O port specified by Port, performs a bitwise OR\r | |
467 | between the read result and the value specified by OrData, and writes the\r | |
468 | result to the 16-bit I/O port specified by Port. The value written to the I/O\r | |
469 | port is returned. This function must guarantee that all I/O read and write\r | |
470 | operations are serialized. Extra left bits in OrData are stripped.\r | |
471 | \r | |
472 | If 16-bit I/O port operations are not supported, then ASSERT().\r | |
473 | If StartBit is greater than 15, then ASSERT().\r | |
474 | If EndBit is greater than 15, then ASSERT().\r | |
475 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 | 476 | If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
b7c5912a | 477 | \r |
478 | @param Port The I/O port to write.\r | |
479 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
480 | Range 0..15.\r | |
481 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
482 | Range 0..15.\r | |
483 | @param OrData The value to OR with the read value from the I/O port.\r | |
484 | \r | |
485 | @return The value written back to the I/O port.\r | |
486 | \r | |
487 | **/\r | |
488 | UINT16\r | |
489 | EFIAPI\r | |
490 | IoBitFieldOr16 (\r | |
2f88bd3a MK |
491 | IN UINTN Port,\r |
492 | IN UINTN StartBit,\r | |
493 | IN UINTN EndBit,\r | |
494 | IN UINT16 OrData\r | |
b7c5912a | 495 | )\r |
496 | {\r | |
497 | return IoWrite16 (\r | |
498 | Port,\r | |
499 | BitFieldOr16 (IoRead16 (Port), StartBit, EndBit, OrData)\r | |
500 | );\r | |
501 | }\r | |
502 | \r | |
503 | /**\r | |
504 | Reads a bit field in a 16-bit port, performs a bitwise AND, and writes the\r | |
505 | result back to the bit field in the 16-bit port.\r | |
506 | \r | |
507 | Reads the 16-bit I/O port specified by Port, performs a bitwise AND between\r | |
508 | the read result and the value specified by AndData, and writes the result to\r | |
509 | the 16-bit I/O port specified by Port. The value written to the I/O port is\r | |
510 | returned. This function must guarantee that all I/O read and write operations\r | |
511 | are serialized. Extra left bits in AndData are stripped.\r | |
512 | \r | |
513 | If 16-bit I/O port operations are not supported, then ASSERT().\r | |
514 | If StartBit is greater than 15, then ASSERT().\r | |
515 | If EndBit is greater than 15, then ASSERT().\r | |
516 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 | 517 | If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
b7c5912a | 518 | \r |
519 | @param Port The I/O port to write.\r | |
520 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
521 | Range 0..15.\r | |
522 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
523 | Range 0..15.\r | |
524 | @param AndData The value to AND with the read value from the I/O port.\r | |
525 | \r | |
526 | @return The value written back to the I/O port.\r | |
527 | \r | |
528 | **/\r | |
529 | UINT16\r | |
530 | EFIAPI\r | |
531 | IoBitFieldAnd16 (\r | |
2f88bd3a MK |
532 | IN UINTN Port,\r |
533 | IN UINTN StartBit,\r | |
534 | IN UINTN EndBit,\r | |
535 | IN UINT16 AndData\r | |
b7c5912a | 536 | )\r |
537 | {\r | |
538 | return IoWrite16 (\r | |
539 | Port,\r | |
540 | BitFieldAnd16 (IoRead16 (Port), StartBit, EndBit, AndData)\r | |
541 | );\r | |
542 | }\r | |
543 | \r | |
544 | /**\r | |
545 | Reads a bit field in a 16-bit port, performs a bitwise AND followed by a\r | |
546 | bitwise OR, and writes the result back to the bit field in the\r | |
547 | 16-bit port.\r | |
548 | \r | |
549 | Reads the 16-bit I/O port specified by Port, performs a bitwise AND followed\r | |
550 | by a bitwise OR between the read result and the value specified by\r | |
551 | AndData, and writes the result to the 16-bit I/O port specified by Port. The\r | |
552 | value written to the I/O port is returned. This function must guarantee that\r | |
553 | all I/O read and write operations are serialized. Extra left bits in both\r | |
554 | AndData and OrData are stripped.\r | |
555 | \r | |
556 | If 16-bit I/O port operations are not supported, then ASSERT().\r | |
557 | If StartBit is greater than 15, then ASSERT().\r | |
558 | If EndBit is greater than 15, then ASSERT().\r | |
559 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 LG |
560 | If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
561 | If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r | |
b7c5912a | 562 | \r |
563 | @param Port The I/O port to write.\r | |
564 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
565 | Range 0..15.\r | |
566 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
567 | Range 0..15.\r | |
568 | @param AndData The value to AND with the read value from the I/O port.\r | |
569 | @param OrData The value to OR with the result of the AND operation.\r | |
570 | \r | |
571 | @return The value written back to the I/O port.\r | |
572 | \r | |
573 | **/\r | |
574 | UINT16\r | |
575 | EFIAPI\r | |
576 | IoBitFieldAndThenOr16 (\r | |
2f88bd3a MK |
577 | IN UINTN Port,\r |
578 | IN UINTN StartBit,\r | |
579 | IN UINTN EndBit,\r | |
580 | IN UINT16 AndData,\r | |
581 | IN UINT16 OrData\r | |
b7c5912a | 582 | )\r |
583 | {\r | |
584 | return IoWrite16 (\r | |
585 | Port,\r | |
586 | BitFieldAndThenOr16 (IoRead16 (Port), StartBit, EndBit, AndData, OrData)\r | |
587 | );\r | |
588 | }\r | |
589 | \r | |
590 | /**\r | |
591 | Reads a 32-bit I/O port, performs a bitwise OR, and writes the\r | |
592 | result back to the 32-bit I/O port.\r | |
593 | \r | |
594 | Reads the 32-bit I/O port specified by Port, performs a bitwise OR\r | |
595 | between the read result and the value specified by OrData, and writes the\r | |
596 | result to the 32-bit I/O port specified by Port. The value written to the I/O\r | |
597 | port is returned. This function must guarantee that all I/O read and write\r | |
598 | operations are serialized.\r | |
599 | \r | |
600 | If 32-bit I/O port operations are not supported, then ASSERT().\r | |
601 | \r | |
602 | @param Port The I/O port to write.\r | |
603 | @param OrData The value to OR with the read value from the I/O port.\r | |
604 | \r | |
605 | @return The value written back to the I/O port.\r | |
606 | \r | |
607 | **/\r | |
608 | UINT32\r | |
609 | EFIAPI\r | |
610 | IoOr32 (\r | |
2f88bd3a MK |
611 | IN UINTN Port,\r |
612 | IN UINT32 OrData\r | |
b7c5912a | 613 | )\r |
614 | {\r | |
615 | return IoWrite32 (Port, IoRead32 (Port) | OrData);\r | |
616 | }\r | |
617 | \r | |
618 | /**\r | |
619 | Reads a 32-bit I/O port, performs a bitwise AND, and writes the result back\r | |
620 | to the 32-bit I/O port.\r | |
621 | \r | |
622 | Reads the 32-bit I/O port specified by Port, performs a bitwise AND between\r | |
623 | the read result and the value specified by AndData, and writes the result to\r | |
624 | the 32-bit I/O port specified by Port. The value written to the I/O port is\r | |
625 | returned. This function must guarantee that all I/O read and write operations\r | |
626 | are serialized.\r | |
627 | \r | |
628 | If 32-bit I/O port operations are not supported, then ASSERT().\r | |
629 | \r | |
630 | @param Port The I/O port to write.\r | |
631 | @param AndData The value to AND with the read value from the I/O port.\r | |
632 | \r | |
633 | @return The value written back to the I/O port.\r | |
634 | \r | |
635 | **/\r | |
636 | UINT32\r | |
637 | EFIAPI\r | |
638 | IoAnd32 (\r | |
2f88bd3a MK |
639 | IN UINTN Port,\r |
640 | IN UINT32 AndData\r | |
b7c5912a | 641 | )\r |
642 | {\r | |
643 | return IoWrite32 (Port, IoRead32 (Port) & AndData);\r | |
644 | }\r | |
645 | \r | |
646 | /**\r | |
647 | Reads a 32-bit I/O port, performs a bitwise AND followed by a bitwise\r | |
648 | inclusive OR, and writes the result back to the 32-bit I/O port.\r | |
649 | \r | |
650 | Reads the 32-bit I/O port specified by Port, performs a bitwise AND between\r | |
651 | the read result and the value specified by AndData, performs a bitwise OR\r | |
652 | between the result of the AND operation and the value specified by OrData,\r | |
653 | and writes the result to the 32-bit I/O port specified by Port. The value\r | |
654 | written to the I/O port is returned. This function must guarantee that all\r | |
655 | I/O read and write operations are serialized.\r | |
656 | \r | |
657 | If 32-bit I/O port operations are not supported, then ASSERT().\r | |
658 | \r | |
659 | @param Port The I/O port to write.\r | |
660 | @param AndData The value to AND with the read value from the I/O port.\r | |
661 | @param OrData The value to OR with the result of the AND operation.\r | |
662 | \r | |
663 | @return The value written back to the I/O port.\r | |
664 | \r | |
665 | **/\r | |
666 | UINT32\r | |
667 | EFIAPI\r | |
668 | IoAndThenOr32 (\r | |
2f88bd3a MK |
669 | IN UINTN Port,\r |
670 | IN UINT32 AndData,\r | |
671 | IN UINT32 OrData\r | |
b7c5912a | 672 | )\r |
673 | {\r | |
674 | return IoWrite32 (Port, (IoRead32 (Port) & AndData) | OrData);\r | |
675 | }\r | |
676 | \r | |
677 | /**\r | |
678 | Reads a bit field of an I/O register.\r | |
679 | \r | |
680 | Reads the bit field in a 32-bit I/O register. The bit field is specified by\r | |
681 | the StartBit and the EndBit. The value of the bit field is returned.\r | |
682 | \r | |
683 | If 32-bit I/O port operations are not supported, then ASSERT().\r | |
684 | If StartBit is greater than 31, then ASSERT().\r | |
685 | If EndBit is greater than 31, then ASSERT().\r | |
686 | If EndBit is less than StartBit, then ASSERT().\r | |
687 | \r | |
688 | @param Port The I/O port to read.\r | |
689 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
690 | Range 0..31.\r | |
691 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
692 | Range 0..31.\r | |
693 | \r | |
694 | @return The value read.\r | |
695 | \r | |
696 | **/\r | |
697 | UINT32\r | |
698 | EFIAPI\r | |
699 | IoBitFieldRead32 (\r | |
2f88bd3a MK |
700 | IN UINTN Port,\r |
701 | IN UINTN StartBit,\r | |
702 | IN UINTN EndBit\r | |
b7c5912a | 703 | )\r |
704 | {\r | |
705 | return BitFieldRead32 (IoRead32 (Port), StartBit, EndBit);\r | |
706 | }\r | |
707 | \r | |
708 | /**\r | |
709 | Writes a bit field to an I/O register.\r | |
710 | \r | |
711 | Writes Value to the bit field of the I/O register. The bit field is specified\r | |
712 | by the StartBit and the EndBit. All other bits in the destination I/O\r | |
713 | register are preserved. The value written to the I/O port is returned. Extra\r | |
714 | left bits in Value are stripped.\r | |
715 | \r | |
716 | If 32-bit I/O port operations are not supported, then ASSERT().\r | |
717 | If StartBit is greater than 31, then ASSERT().\r | |
718 | If EndBit is greater than 31, then ASSERT().\r | |
719 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 | 720 | If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
b7c5912a | 721 | \r |
722 | @param Port The I/O port to write.\r | |
723 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
724 | Range 0..31.\r | |
725 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
726 | Range 0..31.\r | |
2fc59a00 | 727 | @param Value The new value of the bit field.\r |
b7c5912a | 728 | \r |
729 | @return The value written back to the I/O port.\r | |
730 | \r | |
731 | **/\r | |
732 | UINT32\r | |
733 | EFIAPI\r | |
734 | IoBitFieldWrite32 (\r | |
2f88bd3a MK |
735 | IN UINTN Port,\r |
736 | IN UINTN StartBit,\r | |
737 | IN UINTN EndBit,\r | |
738 | IN UINT32 Value\r | |
b7c5912a | 739 | )\r |
740 | {\r | |
741 | return IoWrite32 (\r | |
742 | Port,\r | |
743 | BitFieldWrite32 (IoRead32 (Port), StartBit, EndBit, Value)\r | |
744 | );\r | |
745 | }\r | |
746 | \r | |
747 | /**\r | |
748 | Reads a bit field in a 32-bit port, performs a bitwise OR, and writes the\r | |
749 | result back to the bit field in the 32-bit port.\r | |
750 | \r | |
751 | Reads the 32-bit I/O port specified by Port, performs a bitwise OR\r | |
752 | between the read result and the value specified by OrData, and writes the\r | |
753 | result to the 32-bit I/O port specified by Port. The value written to the I/O\r | |
754 | port is returned. This function must guarantee that all I/O read and write\r | |
755 | operations are serialized. Extra left bits in OrData are stripped.\r | |
756 | \r | |
757 | If 32-bit I/O port operations are not supported, then ASSERT().\r | |
758 | If StartBit is greater than 31, then ASSERT().\r | |
759 | If EndBit is greater than 31, then ASSERT().\r | |
760 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 | 761 | If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
b7c5912a | 762 | \r |
763 | @param Port The I/O port to write.\r | |
764 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
765 | Range 0..31.\r | |
766 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
767 | Range 0..31.\r | |
768 | @param OrData The value to OR with the read value from the I/O port.\r | |
769 | \r | |
770 | @return The value written back to the I/O port.\r | |
771 | \r | |
772 | **/\r | |
773 | UINT32\r | |
774 | EFIAPI\r | |
775 | IoBitFieldOr32 (\r | |
2f88bd3a MK |
776 | IN UINTN Port,\r |
777 | IN UINTN StartBit,\r | |
778 | IN UINTN EndBit,\r | |
779 | IN UINT32 OrData\r | |
b7c5912a | 780 | )\r |
781 | {\r | |
782 | return IoWrite32 (\r | |
783 | Port,\r | |
784 | BitFieldOr32 (IoRead32 (Port), StartBit, EndBit, OrData)\r | |
785 | );\r | |
786 | }\r | |
787 | \r | |
788 | /**\r | |
789 | Reads a bit field in a 32-bit port, performs a bitwise AND, and writes the\r | |
790 | result back to the bit field in the 32-bit port.\r | |
791 | \r | |
792 | Reads the 32-bit I/O port specified by Port, performs a bitwise AND between\r | |
793 | the read result and the value specified by AndData, and writes the result to\r | |
794 | the 32-bit I/O port specified by Port. The value written to the I/O port is\r | |
795 | returned. This function must guarantee that all I/O read and write operations\r | |
796 | are serialized. Extra left bits in AndData are stripped.\r | |
797 | \r | |
798 | If 32-bit I/O port operations are not supported, then ASSERT().\r | |
799 | If StartBit is greater than 31, then ASSERT().\r | |
800 | If EndBit is greater than 31, then ASSERT().\r | |
801 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 | 802 | If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
b7c5912a | 803 | \r |
804 | @param Port The I/O port to write.\r | |
805 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
806 | Range 0..31.\r | |
807 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
808 | Range 0..31.\r | |
809 | @param AndData The value to AND with the read value from the I/O port.\r | |
810 | \r | |
811 | @return The value written back to the I/O port.\r | |
812 | \r | |
813 | **/\r | |
814 | UINT32\r | |
815 | EFIAPI\r | |
816 | IoBitFieldAnd32 (\r | |
2f88bd3a MK |
817 | IN UINTN Port,\r |
818 | IN UINTN StartBit,\r | |
819 | IN UINTN EndBit,\r | |
820 | IN UINT32 AndData\r | |
b7c5912a | 821 | )\r |
822 | {\r | |
823 | return IoWrite32 (\r | |
824 | Port,\r | |
825 | BitFieldAnd32 (IoRead32 (Port), StartBit, EndBit, AndData)\r | |
826 | );\r | |
827 | }\r | |
828 | \r | |
829 | /**\r | |
830 | Reads a bit field in a 32-bit port, performs a bitwise AND followed by a\r | |
831 | bitwise OR, and writes the result back to the bit field in the\r | |
832 | 32-bit port.\r | |
833 | \r | |
834 | Reads the 32-bit I/O port specified by Port, performs a bitwise AND followed\r | |
835 | by a bitwise OR between the read result and the value specified by\r | |
836 | AndData, and writes the result to the 32-bit I/O port specified by Port. The\r | |
837 | value written to the I/O port is returned. This function must guarantee that\r | |
838 | all I/O read and write operations are serialized. Extra left bits in both\r | |
839 | AndData and OrData are stripped.\r | |
840 | \r | |
841 | If 32-bit I/O port operations are not supported, then ASSERT().\r | |
842 | If StartBit is greater than 31, then ASSERT().\r | |
843 | If EndBit is greater than 31, then ASSERT().\r | |
844 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 LG |
845 | If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
846 | If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r | |
b7c5912a | 847 | \r |
848 | @param Port The I/O port to write.\r | |
849 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
850 | Range 0..31.\r | |
851 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
852 | Range 0..31.\r | |
853 | @param AndData The value to AND with the read value from the I/O port.\r | |
854 | @param OrData The value to OR with the result of the AND operation.\r | |
855 | \r | |
856 | @return The value written back to the I/O port.\r | |
857 | \r | |
858 | **/\r | |
859 | UINT32\r | |
860 | EFIAPI\r | |
861 | IoBitFieldAndThenOr32 (\r | |
2f88bd3a MK |
862 | IN UINTN Port,\r |
863 | IN UINTN StartBit,\r | |
864 | IN UINTN EndBit,\r | |
865 | IN UINT32 AndData,\r | |
866 | IN UINT32 OrData\r | |
b7c5912a | 867 | )\r |
868 | {\r | |
869 | return IoWrite32 (\r | |
870 | Port,\r | |
871 | BitFieldAndThenOr32 (IoRead32 (Port), StartBit, EndBit, AndData, OrData)\r | |
872 | );\r | |
873 | }\r | |
874 | \r | |
875 | /**\r | |
876 | Reads a 64-bit I/O port, performs a bitwise OR, and writes the\r | |
877 | result back to the 64-bit I/O port.\r | |
878 | \r | |
879 | Reads the 64-bit I/O port specified by Port, performs a bitwise OR\r | |
880 | between the read result and the value specified by OrData, and writes the\r | |
881 | result to the 64-bit I/O port specified by Port. The value written to the I/O\r | |
882 | port is returned. This function must guarantee that all I/O read and write\r | |
883 | operations are serialized.\r | |
884 | \r | |
885 | If 64-bit I/O port operations are not supported, then ASSERT().\r | |
886 | \r | |
887 | @param Port The I/O port to write.\r | |
888 | @param OrData The value to OR with the read value from the I/O port.\r | |
889 | \r | |
890 | @return The value written back to the I/O port.\r | |
891 | \r | |
892 | **/\r | |
893 | UINT64\r | |
894 | EFIAPI\r | |
895 | IoOr64 (\r | |
2f88bd3a MK |
896 | IN UINTN Port,\r |
897 | IN UINT64 OrData\r | |
b7c5912a | 898 | )\r |
899 | {\r | |
900 | return IoWrite64 (Port, IoRead64 (Port) | OrData);\r | |
901 | }\r | |
902 | \r | |
903 | /**\r | |
904 | Reads a 64-bit I/O port, performs a bitwise AND, and writes the result back\r | |
905 | to the 64-bit I/O port.\r | |
906 | \r | |
907 | Reads the 64-bit I/O port specified by Port, performs a bitwise AND between\r | |
908 | the read result and the value specified by AndData, and writes the result to\r | |
909 | the 64-bit I/O port specified by Port. The value written to the I/O port is\r | |
910 | returned. This function must guarantee that all I/O read and write operations\r | |
911 | are serialized.\r | |
912 | \r | |
913 | If 64-bit I/O port operations are not supported, then ASSERT().\r | |
914 | \r | |
915 | @param Port The I/O port to write.\r | |
916 | @param AndData The value to AND with the read value from the I/O port.\r | |
917 | \r | |
918 | @return The value written back to the I/O port.\r | |
919 | \r | |
920 | **/\r | |
921 | UINT64\r | |
922 | EFIAPI\r | |
923 | IoAnd64 (\r | |
2f88bd3a MK |
924 | IN UINTN Port,\r |
925 | IN UINT64 AndData\r | |
b7c5912a | 926 | )\r |
927 | {\r | |
928 | return IoWrite64 (Port, IoRead64 (Port) & AndData);\r | |
929 | }\r | |
930 | \r | |
931 | /**\r | |
932 | Reads a 64-bit I/O port, performs a bitwise AND followed by a bitwise\r | |
933 | inclusive OR, and writes the result back to the 64-bit I/O port.\r | |
934 | \r | |
935 | Reads the 64-bit I/O port specified by Port, performs a bitwise AND between\r | |
936 | the read result and the value specified by AndData, performs a bitwise OR\r | |
937 | between the result of the AND operation and the value specified by OrData,\r | |
938 | and writes the result to the 64-bit I/O port specified by Port. The value\r | |
939 | written to the I/O port is returned. This function must guarantee that all\r | |
940 | I/O read and write operations are serialized.\r | |
941 | \r | |
942 | If 64-bit I/O port operations are not supported, then ASSERT().\r | |
943 | \r | |
944 | @param Port The I/O port to write.\r | |
945 | @param AndData The value to AND with the read value from the I/O port.\r | |
946 | @param OrData The value to OR with the result of the AND operation.\r | |
947 | \r | |
948 | @return The value written back to the I/O port.\r | |
949 | \r | |
950 | **/\r | |
951 | UINT64\r | |
952 | EFIAPI\r | |
953 | IoAndThenOr64 (\r | |
2f88bd3a MK |
954 | IN UINTN Port,\r |
955 | IN UINT64 AndData,\r | |
956 | IN UINT64 OrData\r | |
b7c5912a | 957 | )\r |
958 | {\r | |
959 | return IoWrite64 (Port, (IoRead64 (Port) & AndData) | OrData);\r | |
960 | }\r | |
961 | \r | |
962 | /**\r | |
963 | Reads a bit field of an I/O register.\r | |
964 | \r | |
965 | Reads the bit field in a 64-bit I/O register. The bit field is specified by\r | |
966 | the StartBit and the EndBit. The value of the bit field is returned.\r | |
967 | \r | |
968 | If 64-bit I/O port operations are not supported, then ASSERT().\r | |
969 | If StartBit is greater than 63, then ASSERT().\r | |
970 | If EndBit is greater than 63, then ASSERT().\r | |
971 | If EndBit is less than StartBit, then ASSERT().\r | |
972 | \r | |
973 | @param Port The I/O port to read.\r | |
974 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
975 | Range 0..63.\r | |
976 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
977 | Range 0..63.\r | |
978 | \r | |
979 | @return The value read.\r | |
980 | \r | |
981 | **/\r | |
982 | UINT64\r | |
983 | EFIAPI\r | |
984 | IoBitFieldRead64 (\r | |
2f88bd3a MK |
985 | IN UINTN Port,\r |
986 | IN UINTN StartBit,\r | |
987 | IN UINTN EndBit\r | |
b7c5912a | 988 | )\r |
989 | {\r | |
990 | return BitFieldRead64 (IoRead64 (Port), StartBit, EndBit);\r | |
991 | }\r | |
992 | \r | |
993 | /**\r | |
994 | Writes a bit field to an I/O register.\r | |
995 | \r | |
996 | Writes Value to the bit field of the I/O register. The bit field is specified\r | |
997 | by the StartBit and the EndBit. All other bits in the destination I/O\r | |
998 | register are preserved. The value written to the I/O port is returned. Extra\r | |
999 | left bits in Value are stripped.\r | |
1000 | \r | |
1001 | If 64-bit I/O port operations are not supported, then ASSERT().\r | |
1002 | If StartBit is greater than 63, then ASSERT().\r | |
1003 | If EndBit is greater than 63, then ASSERT().\r | |
1004 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 | 1005 | If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
b7c5912a | 1006 | \r |
1007 | @param Port The I/O port to write.\r | |
1008 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
1009 | Range 0..63.\r | |
1010 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
1011 | Range 0..63.\r | |
2fc59a00 | 1012 | @param Value The new value of the bit field.\r |
b7c5912a | 1013 | \r |
1014 | @return The value written back to the I/O port.\r | |
1015 | \r | |
1016 | **/\r | |
1017 | UINT64\r | |
1018 | EFIAPI\r | |
1019 | IoBitFieldWrite64 (\r | |
2f88bd3a MK |
1020 | IN UINTN Port,\r |
1021 | IN UINTN StartBit,\r | |
1022 | IN UINTN EndBit,\r | |
1023 | IN UINT64 Value\r | |
b7c5912a | 1024 | )\r |
1025 | {\r | |
1026 | return IoWrite64 (\r | |
1027 | Port,\r | |
1028 | BitFieldWrite64 (IoRead64 (Port), StartBit, EndBit, Value)\r | |
1029 | );\r | |
1030 | }\r | |
1031 | \r | |
1032 | /**\r | |
1033 | Reads a bit field in a 64-bit port, performs a bitwise OR, and writes the\r | |
1034 | result back to the bit field in the 64-bit port.\r | |
1035 | \r | |
1036 | Reads the 64-bit I/O port specified by Port, performs a bitwise OR\r | |
1037 | between the read result and the value specified by OrData, and writes the\r | |
1038 | result to the 64-bit I/O port specified by Port. The value written to the I/O\r | |
1039 | port is returned. This function must guarantee that all I/O read and write\r | |
1040 | operations are serialized. Extra left bits in OrData are stripped.\r | |
1041 | \r | |
1042 | If 64-bit I/O port operations are not supported, then ASSERT().\r | |
1043 | If StartBit is greater than 63, then ASSERT().\r | |
1044 | If EndBit is greater than 63, then ASSERT().\r | |
1045 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 | 1046 | If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
b7c5912a | 1047 | \r |
1048 | @param Port The I/O port to write.\r | |
1049 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
1050 | Range 0..63.\r | |
1051 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
1052 | Range 0..63.\r | |
1053 | @param OrData The value to OR with the read value from the I/O port.\r | |
1054 | \r | |
1055 | @return The value written back to the I/O port.\r | |
1056 | \r | |
1057 | **/\r | |
1058 | UINT64\r | |
1059 | EFIAPI\r | |
1060 | IoBitFieldOr64 (\r | |
2f88bd3a MK |
1061 | IN UINTN Port,\r |
1062 | IN UINTN StartBit,\r | |
1063 | IN UINTN EndBit,\r | |
1064 | IN UINT64 OrData\r | |
b7c5912a | 1065 | )\r |
1066 | {\r | |
1067 | return IoWrite64 (\r | |
1068 | Port,\r | |
1069 | BitFieldOr64 (IoRead64 (Port), StartBit, EndBit, OrData)\r | |
1070 | );\r | |
1071 | }\r | |
1072 | \r | |
1073 | /**\r | |
1074 | Reads a bit field in a 64-bit port, performs a bitwise AND, and writes the\r | |
1075 | result back to the bit field in the 64-bit port.\r | |
1076 | \r | |
1077 | Reads the 64-bit I/O port specified by Port, performs a bitwise AND between\r | |
1078 | the read result and the value specified by AndData, and writes the result to\r | |
1079 | the 64-bit I/O port specified by Port. The value written to the I/O port is\r | |
1080 | returned. This function must guarantee that all I/O read and write operations\r | |
1081 | are serialized. Extra left bits in AndData are stripped.\r | |
1082 | \r | |
1083 | If 64-bit I/O port operations are not supported, then ASSERT().\r | |
1084 | If StartBit is greater than 63, then ASSERT().\r | |
1085 | If EndBit is greater than 63, then ASSERT().\r | |
1086 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 | 1087 | If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
b7c5912a | 1088 | \r |
1089 | @param Port The I/O port to write.\r | |
1090 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
1091 | Range 0..63.\r | |
1092 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
1093 | Range 0..63.\r | |
1094 | @param AndData The value to AND with the read value from the I/O port.\r | |
1095 | \r | |
1096 | @return The value written back to the I/O port.\r | |
1097 | \r | |
1098 | **/\r | |
1099 | UINT64\r | |
1100 | EFIAPI\r | |
1101 | IoBitFieldAnd64 (\r | |
2f88bd3a MK |
1102 | IN UINTN Port,\r |
1103 | IN UINTN StartBit,\r | |
1104 | IN UINTN EndBit,\r | |
1105 | IN UINT64 AndData\r | |
b7c5912a | 1106 | )\r |
1107 | {\r | |
1108 | return IoWrite64 (\r | |
1109 | Port,\r | |
1110 | BitFieldAnd64 (IoRead64 (Port), StartBit, EndBit, AndData)\r | |
1111 | );\r | |
1112 | }\r | |
1113 | \r | |
1114 | /**\r | |
1115 | Reads a bit field in a 64-bit port, performs a bitwise AND followed by a\r | |
1116 | bitwise OR, and writes the result back to the bit field in the\r | |
1117 | 64-bit port.\r | |
1118 | \r | |
1119 | Reads the 64-bit I/O port specified by Port, performs a bitwise AND followed\r | |
1120 | by a bitwise OR between the read result and the value specified by\r | |
1121 | AndData, and writes the result to the 64-bit I/O port specified by Port. The\r | |
1122 | value written to the I/O port is returned. This function must guarantee that\r | |
1123 | all I/O read and write operations are serialized. Extra left bits in both\r | |
1124 | AndData and OrData are stripped.\r | |
1125 | \r | |
1126 | If 64-bit I/O port operations are not supported, then ASSERT().\r | |
1127 | If StartBit is greater than 63, then ASSERT().\r | |
1128 | If EndBit is greater than 63, then ASSERT().\r | |
1129 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 LG |
1130 | If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
1131 | If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r | |
b7c5912a | 1132 | \r |
1133 | @param Port The I/O port to write.\r | |
1134 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
1135 | Range 0..63.\r | |
1136 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
1137 | Range 0..63.\r | |
1138 | @param AndData The value to AND with the read value from the I/O port.\r | |
1139 | @param OrData The value to OR with the result of the AND operation.\r | |
1140 | \r | |
1141 | @return The value written back to the I/O port.\r | |
1142 | \r | |
1143 | **/\r | |
1144 | UINT64\r | |
1145 | EFIAPI\r | |
1146 | IoBitFieldAndThenOr64 (\r | |
2f88bd3a MK |
1147 | IN UINTN Port,\r |
1148 | IN UINTN StartBit,\r | |
1149 | IN UINTN EndBit,\r | |
1150 | IN UINT64 AndData,\r | |
1151 | IN UINT64 OrData\r | |
b7c5912a | 1152 | )\r |
1153 | {\r | |
1154 | return IoWrite64 (\r | |
1155 | Port,\r | |
1156 | BitFieldAndThenOr64 (IoRead64 (Port), StartBit, EndBit, AndData, OrData)\r | |
1157 | );\r | |
1158 | }\r | |
1159 | \r | |
1160 | /**\r | |
1161 | Reads an 8-bit MMIO register, performs a bitwise OR, and writes the\r | |
1162 | result back to the 8-bit MMIO register.\r | |
1163 | \r | |
1164 | Reads the 8-bit MMIO register specified by Address, performs a bitwise\r | |
1165 | inclusive OR between the read result and the value specified by OrData, and\r | |
1166 | writes the result to the 8-bit MMIO register specified by Address. The value\r | |
1167 | written to the MMIO register is returned. This function must guarantee that\r | |
1168 | all MMIO read and write operations are serialized.\r | |
1169 | \r | |
1170 | If 8-bit MMIO register operations are not supported, then ASSERT().\r | |
1171 | \r | |
1172 | @param Address The MMIO register to write.\r | |
1173 | @param OrData The value to OR with the read value from the MMIO register.\r | |
1174 | \r | |
1175 | @return The value written back to the MMIO register.\r | |
1176 | \r | |
1177 | **/\r | |
1178 | UINT8\r | |
1179 | EFIAPI\r | |
1180 | MmioOr8 (\r | |
2f88bd3a MK |
1181 | IN UINTN Address,\r |
1182 | IN UINT8 OrData\r | |
b7c5912a | 1183 | )\r |
1184 | {\r | |
2f88bd3a | 1185 | return MmioWrite8 (Address, (UINT8)(MmioRead8 (Address) | OrData));\r |
b7c5912a | 1186 | }\r |
1187 | \r | |
1188 | /**\r | |
1189 | Reads an 8-bit MMIO register, performs a bitwise AND, and writes the result\r | |
1190 | back to the 8-bit MMIO register.\r | |
1191 | \r | |
1192 | Reads the 8-bit MMIO register specified by Address, performs a bitwise AND\r | |
1193 | between the read result and the value specified by AndData, and writes the\r | |
1194 | result to the 8-bit MMIO register specified by Address. The value written to\r | |
1195 | the MMIO register is returned. This function must guarantee that all MMIO\r | |
1196 | read and write operations are serialized.\r | |
1197 | \r | |
1198 | If 8-bit MMIO register operations are not supported, then ASSERT().\r | |
1199 | \r | |
1200 | @param Address The MMIO register to write.\r | |
1201 | @param AndData The value to AND with the read value from the MMIO register.\r | |
1202 | \r | |
1203 | @return The value written back to the MMIO register.\r | |
1204 | \r | |
1205 | **/\r | |
1206 | UINT8\r | |
1207 | EFIAPI\r | |
1208 | MmioAnd8 (\r | |
2f88bd3a MK |
1209 | IN UINTN Address,\r |
1210 | IN UINT8 AndData\r | |
b7c5912a | 1211 | )\r |
1212 | {\r | |
2f88bd3a | 1213 | return MmioWrite8 (Address, (UINT8)(MmioRead8 (Address) & AndData));\r |
b7c5912a | 1214 | }\r |
1215 | \r | |
1216 | /**\r | |
1217 | Reads an 8-bit MMIO register, performs a bitwise AND followed by a bitwise\r | |
1218 | inclusive OR, and writes the result back to the 8-bit MMIO register.\r | |
1219 | \r | |
1220 | Reads the 8-bit MMIO register specified by Address, performs a bitwise AND\r | |
1221 | between the read result and the value specified by AndData, performs a\r | |
1222 | bitwise OR between the result of the AND operation and the value specified by\r | |
1223 | OrData, and writes the result to the 8-bit MMIO register specified by\r | |
1224 | Address. The value written to the MMIO register is returned. This function\r | |
1225 | must guarantee that all MMIO read and write operations are serialized.\r | |
1226 | \r | |
1227 | If 8-bit MMIO register operations are not supported, then ASSERT().\r | |
1228 | \r | |
1229 | \r | |
1230 | @param Address The MMIO register to write.\r | |
1231 | @param AndData The value to AND with the read value from the MMIO register.\r | |
1232 | @param OrData The value to OR with the result of the AND operation.\r | |
1233 | \r | |
1234 | @return The value written back to the MMIO register.\r | |
1235 | \r | |
1236 | **/\r | |
1237 | UINT8\r | |
1238 | EFIAPI\r | |
1239 | MmioAndThenOr8 (\r | |
2f88bd3a MK |
1240 | IN UINTN Address,\r |
1241 | IN UINT8 AndData,\r | |
1242 | IN UINT8 OrData\r | |
b7c5912a | 1243 | )\r |
1244 | {\r | |
2f88bd3a | 1245 | return MmioWrite8 (Address, (UINT8)((MmioRead8 (Address) & AndData) | OrData));\r |
b7c5912a | 1246 | }\r |
1247 | \r | |
1248 | /**\r | |
1249 | Reads a bit field of a MMIO register.\r | |
1250 | \r | |
1251 | Reads the bit field in an 8-bit MMIO register. The bit field is specified by\r | |
1252 | the StartBit and the EndBit. The value of the bit field is returned.\r | |
1253 | \r | |
1254 | If 8-bit MMIO register operations are not supported, then ASSERT().\r | |
1255 | If StartBit is greater than 7, then ASSERT().\r | |
1256 | If EndBit is greater than 7, then ASSERT().\r | |
1257 | If EndBit is less than StartBit, then ASSERT().\r | |
1258 | \r | |
58380e9c | 1259 | @param Address The MMIO register to read.\r |
b7c5912a | 1260 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
1261 | Range 0..7.\r | |
1262 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
1263 | Range 0..7.\r | |
1264 | \r | |
1265 | @return The value read.\r | |
1266 | \r | |
1267 | **/\r | |
1268 | UINT8\r | |
1269 | EFIAPI\r | |
1270 | MmioBitFieldRead8 (\r | |
2f88bd3a MK |
1271 | IN UINTN Address,\r |
1272 | IN UINTN StartBit,\r | |
1273 | IN UINTN EndBit\r | |
b7c5912a | 1274 | )\r |
1275 | {\r | |
1276 | return BitFieldRead8 (MmioRead8 (Address), StartBit, EndBit);\r | |
1277 | }\r | |
1278 | \r | |
1279 | /**\r | |
1280 | Writes a bit field to a MMIO register.\r | |
1281 | \r | |
1282 | Writes Value to the bit field of the MMIO register. The bit field is\r | |
1283 | specified by the StartBit and the EndBit. All other bits in the destination\r | |
1284 | MMIO register are preserved. The new value of the 8-bit register is returned.\r | |
1285 | \r | |
1286 | If 8-bit MMIO register operations are not supported, then ASSERT().\r | |
1287 | If StartBit is greater than 7, then ASSERT().\r | |
1288 | If EndBit is greater than 7, then ASSERT().\r | |
1289 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 | 1290 | If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
b7c5912a | 1291 | \r |
58380e9c | 1292 | @param Address The MMIO register to write.\r |
b7c5912a | 1293 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
1294 | Range 0..7.\r | |
1295 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
1296 | Range 0..7.\r | |
2fc59a00 | 1297 | @param Value The new value of the bit field.\r |
b7c5912a | 1298 | \r |
1299 | @return The value written back to the MMIO register.\r | |
1300 | \r | |
1301 | **/\r | |
1302 | UINT8\r | |
1303 | EFIAPI\r | |
1304 | MmioBitFieldWrite8 (\r | |
2f88bd3a MK |
1305 | IN UINTN Address,\r |
1306 | IN UINTN StartBit,\r | |
1307 | IN UINTN EndBit,\r | |
1308 | IN UINT8 Value\r | |
b7c5912a | 1309 | )\r |
1310 | {\r | |
1311 | return MmioWrite8 (\r | |
1312 | Address,\r | |
1313 | BitFieldWrite8 (MmioRead8 (Address), StartBit, EndBit, Value)\r | |
1314 | );\r | |
1315 | }\r | |
1316 | \r | |
1317 | /**\r | |
1318 | Reads a bit field in an 8-bit MMIO register, performs a bitwise OR, and\r | |
1319 | writes the result back to the bit field in the 8-bit MMIO register.\r | |
1320 | \r | |
1321 | Reads the 8-bit MMIO register specified by Address, performs a bitwise\r | |
1322 | inclusive OR between the read result and the value specified by OrData, and\r | |
1323 | writes the result to the 8-bit MMIO register specified by Address. The value\r | |
1324 | written to the MMIO register is returned. This function must guarantee that\r | |
1325 | all MMIO read and write operations are serialized. Extra left bits in OrData\r | |
1326 | are stripped.\r | |
1327 | \r | |
1328 | If 8-bit MMIO register operations are not supported, then ASSERT().\r | |
1329 | If StartBit is greater than 7, then ASSERT().\r | |
1330 | If EndBit is greater than 7, then ASSERT().\r | |
1331 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 | 1332 | If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
b7c5912a | 1333 | \r |
58380e9c | 1334 | @param Address The MMIO register to write.\r |
b7c5912a | 1335 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
1336 | Range 0..7.\r | |
1337 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
1338 | Range 0..7.\r | |
1339 | @param OrData The value to OR with read value from the MMIO register.\r | |
1340 | \r | |
1341 | @return The value written back to the MMIO register.\r | |
1342 | \r | |
1343 | **/\r | |
1344 | UINT8\r | |
1345 | EFIAPI\r | |
1346 | MmioBitFieldOr8 (\r | |
2f88bd3a MK |
1347 | IN UINTN Address,\r |
1348 | IN UINTN StartBit,\r | |
1349 | IN UINTN EndBit,\r | |
1350 | IN UINT8 OrData\r | |
b7c5912a | 1351 | )\r |
1352 | {\r | |
1353 | return MmioWrite8 (\r | |
1354 | Address,\r | |
1355 | BitFieldOr8 (MmioRead8 (Address), StartBit, EndBit, OrData)\r | |
1356 | );\r | |
1357 | }\r | |
1358 | \r | |
1359 | /**\r | |
1360 | Reads a bit field in an 8-bit MMIO register, performs a bitwise AND, and\r | |
1361 | writes the result back to the bit field in the 8-bit MMIO register.\r | |
1362 | \r | |
1363 | Reads the 8-bit MMIO register specified by Address, performs a bitwise AND\r | |
1364 | between the read result and the value specified by AndData, and writes the\r | |
1365 | result to the 8-bit MMIO register specified by Address. The value written to\r | |
1366 | the MMIO register is returned. This function must guarantee that all MMIO\r | |
1367 | read and write operations are serialized. Extra left bits in AndData are\r | |
1368 | stripped.\r | |
1369 | \r | |
1370 | If 8-bit MMIO register operations are not supported, then ASSERT().\r | |
1371 | If StartBit is greater than 7, then ASSERT().\r | |
1372 | If EndBit is greater than 7, then ASSERT().\r | |
1373 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 | 1374 | If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
b7c5912a | 1375 | \r |
58380e9c | 1376 | @param Address The MMIO register to write.\r |
b7c5912a | 1377 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
1378 | Range 0..7.\r | |
1379 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
1380 | Range 0..7.\r | |
1381 | @param AndData The value to AND with read value from the MMIO register.\r | |
1382 | \r | |
1383 | @return The value written back to the MMIO register.\r | |
1384 | \r | |
1385 | **/\r | |
1386 | UINT8\r | |
1387 | EFIAPI\r | |
1388 | MmioBitFieldAnd8 (\r | |
2f88bd3a MK |
1389 | IN UINTN Address,\r |
1390 | IN UINTN StartBit,\r | |
1391 | IN UINTN EndBit,\r | |
1392 | IN UINT8 AndData\r | |
b7c5912a | 1393 | )\r |
1394 | {\r | |
1395 | return MmioWrite8 (\r | |
1396 | Address,\r | |
1397 | BitFieldAnd8 (MmioRead8 (Address), StartBit, EndBit, AndData)\r | |
1398 | );\r | |
1399 | }\r | |
1400 | \r | |
1401 | /**\r | |
1402 | Reads a bit field in an 8-bit MMIO register, performs a bitwise AND followed\r | |
1403 | by a bitwise OR, and writes the result back to the bit field in the\r | |
1404 | 8-bit MMIO register.\r | |
1405 | \r | |
1406 | Reads the 8-bit MMIO register specified by Address, performs a bitwise AND\r | |
1407 | followed by a bitwise OR between the read result and the value\r | |
1408 | specified by AndData, and writes the result to the 8-bit MMIO register\r | |
1409 | specified by Address. The value written to the MMIO register is returned.\r | |
1410 | This function must guarantee that all MMIO read and write operations are\r | |
1411 | serialized. Extra left bits in both AndData and OrData are stripped.\r | |
1412 | \r | |
1413 | If 8-bit MMIO register operations are not supported, then ASSERT().\r | |
1414 | If StartBit is greater than 7, then ASSERT().\r | |
1415 | If EndBit is greater than 7, then ASSERT().\r | |
1416 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 LG |
1417 | If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
1418 | If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r | |
b7c5912a | 1419 | \r |
58380e9c | 1420 | @param Address The MMIO register to write.\r |
b7c5912a | 1421 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
1422 | Range 0..7.\r | |
1423 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
1424 | Range 0..7.\r | |
1425 | @param AndData The value to AND with read value from the MMIO register.\r | |
1426 | @param OrData The value to OR with the result of the AND operation.\r | |
1427 | \r | |
1428 | @return The value written back to the MMIO register.\r | |
1429 | \r | |
1430 | **/\r | |
1431 | UINT8\r | |
1432 | EFIAPI\r | |
1433 | MmioBitFieldAndThenOr8 (\r | |
2f88bd3a MK |
1434 | IN UINTN Address,\r |
1435 | IN UINTN StartBit,\r | |
1436 | IN UINTN EndBit,\r | |
1437 | IN UINT8 AndData,\r | |
1438 | IN UINT8 OrData\r | |
b7c5912a | 1439 | )\r |
1440 | {\r | |
1441 | return MmioWrite8 (\r | |
1442 | Address,\r | |
1443 | BitFieldAndThenOr8 (MmioRead8 (Address), StartBit, EndBit, AndData, OrData)\r | |
1444 | );\r | |
1445 | }\r | |
1446 | \r | |
1447 | /**\r | |
1448 | Reads a 16-bit MMIO register, performs a bitwise OR, and writes the\r | |
1449 | result back to the 16-bit MMIO register.\r | |
1450 | \r | |
1451 | Reads the 16-bit MMIO register specified by Address, performs a bitwise\r | |
1452 | inclusive OR between the read result and the value specified by OrData, and\r | |
1453 | writes the result to the 16-bit MMIO register specified by Address. The value\r | |
1454 | written to the MMIO register is returned. This function must guarantee that\r | |
1455 | all MMIO read and write operations are serialized.\r | |
1456 | \r | |
1457 | If 16-bit MMIO register operations are not supported, then ASSERT().\r | |
1458 | \r | |
1459 | @param Address The MMIO register to write.\r | |
1460 | @param OrData The value to OR with the read value from the MMIO register.\r | |
1461 | \r | |
1462 | @return The value written back to the MMIO register.\r | |
1463 | \r | |
1464 | **/\r | |
1465 | UINT16\r | |
1466 | EFIAPI\r | |
1467 | MmioOr16 (\r | |
2f88bd3a MK |
1468 | IN UINTN Address,\r |
1469 | IN UINT16 OrData\r | |
b7c5912a | 1470 | )\r |
1471 | {\r | |
2f88bd3a | 1472 | return MmioWrite16 (Address, (UINT16)(MmioRead16 (Address) | OrData));\r |
b7c5912a | 1473 | }\r |
1474 | \r | |
1475 | /**\r | |
1476 | Reads a 16-bit MMIO register, performs a bitwise AND, and writes the result\r | |
1477 | back to the 16-bit MMIO register.\r | |
1478 | \r | |
1479 | Reads the 16-bit MMIO register specified by Address, performs a bitwise AND\r | |
1480 | between the read result and the value specified by AndData, and writes the\r | |
1481 | result to the 16-bit MMIO register specified by Address. The value written to\r | |
1482 | the MMIO register is returned. This function must guarantee that all MMIO\r | |
1483 | read and write operations are serialized.\r | |
1484 | \r | |
1485 | If 16-bit MMIO register operations are not supported, then ASSERT().\r | |
1486 | \r | |
1487 | @param Address The MMIO register to write.\r | |
1488 | @param AndData The value to AND with the read value from the MMIO register.\r | |
1489 | \r | |
1490 | @return The value written back to the MMIO register.\r | |
1491 | \r | |
1492 | **/\r | |
1493 | UINT16\r | |
1494 | EFIAPI\r | |
1495 | MmioAnd16 (\r | |
2f88bd3a MK |
1496 | IN UINTN Address,\r |
1497 | IN UINT16 AndData\r | |
b7c5912a | 1498 | )\r |
1499 | {\r | |
2f88bd3a | 1500 | return MmioWrite16 (Address, (UINT16)(MmioRead16 (Address) & AndData));\r |
b7c5912a | 1501 | }\r |
1502 | \r | |
1503 | /**\r | |
1504 | Reads a 16-bit MMIO register, performs a bitwise AND followed by a bitwise\r | |
1505 | inclusive OR, and writes the result back to the 16-bit MMIO register.\r | |
1506 | \r | |
1507 | Reads the 16-bit MMIO register specified by Address, performs a bitwise AND\r | |
1508 | between the read result and the value specified by AndData, performs a\r | |
1509 | bitwise OR between the result of the AND operation and the value specified by\r | |
1510 | OrData, and writes the result to the 16-bit MMIO register specified by\r | |
1511 | Address. The value written to the MMIO register is returned. This function\r | |
1512 | must guarantee that all MMIO read and write operations are serialized.\r | |
1513 | \r | |
1514 | If 16-bit MMIO register operations are not supported, then ASSERT().\r | |
1515 | \r | |
1516 | \r | |
1517 | @param Address The MMIO register to write.\r | |
1518 | @param AndData The value to AND with the read value from the MMIO register.\r | |
1519 | @param OrData The value to OR with the result of the AND operation.\r | |
1520 | \r | |
1521 | @return The value written back to the MMIO register.\r | |
1522 | \r | |
1523 | **/\r | |
1524 | UINT16\r | |
1525 | EFIAPI\r | |
1526 | MmioAndThenOr16 (\r | |
2f88bd3a MK |
1527 | IN UINTN Address,\r |
1528 | IN UINT16 AndData,\r | |
1529 | IN UINT16 OrData\r | |
b7c5912a | 1530 | )\r |
1531 | {\r | |
2f88bd3a | 1532 | return MmioWrite16 (Address, (UINT16)((MmioRead16 (Address) & AndData) | OrData));\r |
b7c5912a | 1533 | }\r |
1534 | \r | |
1535 | /**\r | |
1536 | Reads a bit field of a MMIO register.\r | |
1537 | \r | |
1538 | Reads the bit field in a 16-bit MMIO register. The bit field is specified by\r | |
1539 | the StartBit and the EndBit. The value of the bit field is returned.\r | |
1540 | \r | |
1541 | If 16-bit MMIO register operations are not supported, then ASSERT().\r | |
1542 | If StartBit is greater than 15, then ASSERT().\r | |
1543 | If EndBit is greater than 15, then ASSERT().\r | |
1544 | If EndBit is less than StartBit, then ASSERT().\r | |
1545 | \r | |
58380e9c | 1546 | @param Address The MMIO register to read.\r |
b7c5912a | 1547 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
1548 | Range 0..15.\r | |
1549 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
1550 | Range 0..15.\r | |
1551 | \r | |
1552 | @return The value read.\r | |
1553 | \r | |
1554 | **/\r | |
1555 | UINT16\r | |
1556 | EFIAPI\r | |
1557 | MmioBitFieldRead16 (\r | |
2f88bd3a MK |
1558 | IN UINTN Address,\r |
1559 | IN UINTN StartBit,\r | |
1560 | IN UINTN EndBit\r | |
b7c5912a | 1561 | )\r |
1562 | {\r | |
1563 | return BitFieldRead16 (MmioRead16 (Address), StartBit, EndBit);\r | |
1564 | }\r | |
1565 | \r | |
1566 | /**\r | |
1567 | Writes a bit field to a MMIO register.\r | |
1568 | \r | |
1569 | Writes Value to the bit field of the MMIO register. The bit field is\r | |
1570 | specified by the StartBit and the EndBit. All other bits in the destination\r | |
1571 | MMIO register are preserved. The new value of the 16-bit register is returned.\r | |
1572 | \r | |
1573 | If 16-bit MMIO register operations are not supported, then ASSERT().\r | |
1574 | If StartBit is greater than 15, then ASSERT().\r | |
1575 | If EndBit is greater than 15, then ASSERT().\r | |
1576 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 | 1577 | If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
b7c5912a | 1578 | \r |
58380e9c | 1579 | @param Address The MMIO register to write.\r |
b7c5912a | 1580 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
1581 | Range 0..15.\r | |
1582 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
1583 | Range 0..15.\r | |
2fc59a00 | 1584 | @param Value The new value of the bit field.\r |
b7c5912a | 1585 | \r |
1586 | @return The value written back to the MMIO register.\r | |
1587 | \r | |
1588 | **/\r | |
1589 | UINT16\r | |
1590 | EFIAPI\r | |
1591 | MmioBitFieldWrite16 (\r | |
2f88bd3a MK |
1592 | IN UINTN Address,\r |
1593 | IN UINTN StartBit,\r | |
1594 | IN UINTN EndBit,\r | |
1595 | IN UINT16 Value\r | |
b7c5912a | 1596 | )\r |
1597 | {\r | |
1598 | return MmioWrite16 (\r | |
1599 | Address,\r | |
1600 | BitFieldWrite16 (MmioRead16 (Address), StartBit, EndBit, Value)\r | |
1601 | );\r | |
1602 | }\r | |
1603 | \r | |
1604 | /**\r | |
1605 | Reads a bit field in a 16-bit MMIO register, performs a bitwise OR, and\r | |
1606 | writes the result back to the bit field in the 16-bit MMIO register.\r | |
1607 | \r | |
1608 | Reads the 16-bit MMIO register specified by Address, performs a bitwise\r | |
1609 | inclusive OR between the read result and the value specified by OrData, and\r | |
1610 | writes the result to the 16-bit MMIO register specified by Address. The value\r | |
1611 | written to the MMIO register is returned. This function must guarantee that\r | |
1612 | all MMIO read and write operations are serialized. Extra left bits in OrData\r | |
1613 | are stripped.\r | |
1614 | \r | |
1615 | If 16-bit MMIO register operations are not supported, then ASSERT().\r | |
1616 | If StartBit is greater than 15, then ASSERT().\r | |
1617 | If EndBit is greater than 15, then ASSERT().\r | |
1618 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 | 1619 | If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
b7c5912a | 1620 | \r |
58380e9c | 1621 | @param Address The MMIO register to write.\r |
b7c5912a | 1622 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
1623 | Range 0..15.\r | |
1624 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
1625 | Range 0..15.\r | |
1626 | @param OrData The value to OR with read value from the MMIO register.\r | |
1627 | \r | |
1628 | @return The value written back to the MMIO register.\r | |
1629 | \r | |
1630 | **/\r | |
1631 | UINT16\r | |
1632 | EFIAPI\r | |
1633 | MmioBitFieldOr16 (\r | |
2f88bd3a MK |
1634 | IN UINTN Address,\r |
1635 | IN UINTN StartBit,\r | |
1636 | IN UINTN EndBit,\r | |
1637 | IN UINT16 OrData\r | |
b7c5912a | 1638 | )\r |
1639 | {\r | |
1640 | return MmioWrite16 (\r | |
1641 | Address,\r | |
1642 | BitFieldOr16 (MmioRead16 (Address), StartBit, EndBit, OrData)\r | |
1643 | );\r | |
1644 | }\r | |
1645 | \r | |
1646 | /**\r | |
1647 | Reads a bit field in a 16-bit MMIO register, performs a bitwise AND, and\r | |
1648 | writes the result back to the bit field in the 16-bit MMIO register.\r | |
1649 | \r | |
1650 | Reads the 16-bit MMIO register specified by Address, performs a bitwise AND\r | |
1651 | between the read result and the value specified by AndData, and writes the\r | |
1652 | result to the 16-bit MMIO register specified by Address. The value written to\r | |
1653 | the MMIO register is returned. This function must guarantee that all MMIO\r | |
1654 | read and write operations are serialized. Extra left bits in AndData are\r | |
1655 | stripped.\r | |
1656 | \r | |
1657 | If 16-bit MMIO register operations are not supported, then ASSERT().\r | |
1658 | If StartBit is greater than 15, then ASSERT().\r | |
1659 | If EndBit is greater than 15, then ASSERT().\r | |
1660 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 | 1661 | If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
b7c5912a | 1662 | \r |
58380e9c | 1663 | @param Address The MMIO register to write.\r |
b7c5912a | 1664 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
1665 | Range 0..15.\r | |
1666 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
1667 | Range 0..15.\r | |
1668 | @param AndData The value to AND with read value from the MMIO register.\r | |
1669 | \r | |
1670 | @return The value written back to the MMIO register.\r | |
1671 | \r | |
1672 | **/\r | |
1673 | UINT16\r | |
1674 | EFIAPI\r | |
1675 | MmioBitFieldAnd16 (\r | |
2f88bd3a MK |
1676 | IN UINTN Address,\r |
1677 | IN UINTN StartBit,\r | |
1678 | IN UINTN EndBit,\r | |
1679 | IN UINT16 AndData\r | |
b7c5912a | 1680 | )\r |
1681 | {\r | |
1682 | return MmioWrite16 (\r | |
1683 | Address,\r | |
1684 | BitFieldAnd16 (MmioRead16 (Address), StartBit, EndBit, AndData)\r | |
1685 | );\r | |
1686 | }\r | |
1687 | \r | |
1688 | /**\r | |
1689 | Reads a bit field in a 16-bit MMIO register, performs a bitwise AND followed\r | |
1690 | by a bitwise OR, and writes the result back to the bit field in the\r | |
1691 | 16-bit MMIO register.\r | |
1692 | \r | |
1693 | Reads the 16-bit MMIO register specified by Address, performs a bitwise AND\r | |
1694 | followed by a bitwise OR between the read result and the value\r | |
1695 | specified by AndData, and writes the result to the 16-bit MMIO register\r | |
1696 | specified by Address. The value written to the MMIO register is returned.\r | |
1697 | This function must guarantee that all MMIO read and write operations are\r | |
1698 | serialized. Extra left bits in both AndData and OrData are stripped.\r | |
1699 | \r | |
1700 | If 16-bit MMIO register operations are not supported, then ASSERT().\r | |
1701 | If StartBit is greater than 15, then ASSERT().\r | |
1702 | If EndBit is greater than 15, then ASSERT().\r | |
1703 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 LG |
1704 | If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
1705 | If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r | |
b7c5912a | 1706 | \r |
58380e9c | 1707 | @param Address The MMIO register to write.\r |
b7c5912a | 1708 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
1709 | Range 0..15.\r | |
1710 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
1711 | Range 0..15.\r | |
1712 | @param AndData The value to AND with read value from the MMIO register.\r | |
1713 | @param OrData The value to OR with the result of the AND operation.\r | |
1714 | \r | |
1715 | @return The value written back to the MMIO register.\r | |
1716 | \r | |
1717 | **/\r | |
1718 | UINT16\r | |
1719 | EFIAPI\r | |
1720 | MmioBitFieldAndThenOr16 (\r | |
2f88bd3a MK |
1721 | IN UINTN Address,\r |
1722 | IN UINTN StartBit,\r | |
1723 | IN UINTN EndBit,\r | |
1724 | IN UINT16 AndData,\r | |
1725 | IN UINT16 OrData\r | |
b7c5912a | 1726 | )\r |
1727 | {\r | |
1728 | return MmioWrite16 (\r | |
1729 | Address,\r | |
1730 | BitFieldAndThenOr16 (MmioRead16 (Address), StartBit, EndBit, AndData, OrData)\r | |
1731 | );\r | |
1732 | }\r | |
1733 | \r | |
1734 | /**\r | |
1735 | Reads a 32-bit MMIO register, performs a bitwise OR, and writes the\r | |
1736 | result back to the 32-bit MMIO register.\r | |
1737 | \r | |
1738 | Reads the 32-bit MMIO register specified by Address, performs a bitwise\r | |
1739 | inclusive OR between the read result and the value specified by OrData, and\r | |
1740 | writes the result to the 32-bit MMIO register specified by Address. The value\r | |
1741 | written to the MMIO register is returned. This function must guarantee that\r | |
1742 | all MMIO read and write operations are serialized.\r | |
1743 | \r | |
1744 | If 32-bit MMIO register operations are not supported, then ASSERT().\r | |
1745 | \r | |
1746 | @param Address The MMIO register to write.\r | |
1747 | @param OrData The value to OR with the read value from the MMIO register.\r | |
1748 | \r | |
1749 | @return The value written back to the MMIO register.\r | |
1750 | \r | |
1751 | **/\r | |
1752 | UINT32\r | |
1753 | EFIAPI\r | |
1754 | MmioOr32 (\r | |
2f88bd3a MK |
1755 | IN UINTN Address,\r |
1756 | IN UINT32 OrData\r | |
b7c5912a | 1757 | )\r |
1758 | {\r | |
1759 | return MmioWrite32 (Address, MmioRead32 (Address) | OrData);\r | |
1760 | }\r | |
1761 | \r | |
1762 | /**\r | |
1763 | Reads a 32-bit MMIO register, performs a bitwise AND, and writes the result\r | |
1764 | back to the 32-bit MMIO register.\r | |
1765 | \r | |
1766 | Reads the 32-bit MMIO register specified by Address, performs a bitwise AND\r | |
1767 | between the read result and the value specified by AndData, and writes the\r | |
1768 | result to the 32-bit MMIO register specified by Address. The value written to\r | |
1769 | the MMIO register is returned. This function must guarantee that all MMIO\r | |
1770 | read and write operations are serialized.\r | |
1771 | \r | |
1772 | If 32-bit MMIO register operations are not supported, then ASSERT().\r | |
1773 | \r | |
1774 | @param Address The MMIO register to write.\r | |
1775 | @param AndData The value to AND with the read value from the MMIO register.\r | |
1776 | \r | |
1777 | @return The value written back to the MMIO register.\r | |
1778 | \r | |
1779 | **/\r | |
1780 | UINT32\r | |
1781 | EFIAPI\r | |
1782 | MmioAnd32 (\r | |
2f88bd3a MK |
1783 | IN UINTN Address,\r |
1784 | IN UINT32 AndData\r | |
b7c5912a | 1785 | )\r |
1786 | {\r | |
1787 | return MmioWrite32 (Address, MmioRead32 (Address) & AndData);\r | |
1788 | }\r | |
1789 | \r | |
1790 | /**\r | |
1791 | Reads a 32-bit MMIO register, performs a bitwise AND followed by a bitwise\r | |
1792 | inclusive OR, and writes the result back to the 32-bit MMIO register.\r | |
1793 | \r | |
1794 | Reads the 32-bit MMIO register specified by Address, performs a bitwise AND\r | |
1795 | between the read result and the value specified by AndData, performs a\r | |
1796 | bitwise OR between the result of the AND operation and the value specified by\r | |
1797 | OrData, and writes the result to the 32-bit MMIO register specified by\r | |
1798 | Address. The value written to the MMIO register is returned. This function\r | |
1799 | must guarantee that all MMIO read and write operations are serialized.\r | |
1800 | \r | |
1801 | If 32-bit MMIO register operations are not supported, then ASSERT().\r | |
1802 | \r | |
1803 | \r | |
1804 | @param Address The MMIO register to write.\r | |
1805 | @param AndData The value to AND with the read value from the MMIO register.\r | |
1806 | @param OrData The value to OR with the result of the AND operation.\r | |
1807 | \r | |
1808 | @return The value written back to the MMIO register.\r | |
1809 | \r | |
1810 | **/\r | |
1811 | UINT32\r | |
1812 | EFIAPI\r | |
1813 | MmioAndThenOr32 (\r | |
2f88bd3a MK |
1814 | IN UINTN Address,\r |
1815 | IN UINT32 AndData,\r | |
1816 | IN UINT32 OrData\r | |
b7c5912a | 1817 | )\r |
1818 | {\r | |
1819 | return MmioWrite32 (Address, (MmioRead32 (Address) & AndData) | OrData);\r | |
1820 | }\r | |
1821 | \r | |
1822 | /**\r | |
1823 | Reads a bit field of a MMIO register.\r | |
1824 | \r | |
1825 | Reads the bit field in a 32-bit MMIO register. The bit field is specified by\r | |
1826 | the StartBit and the EndBit. The value of the bit field is returned.\r | |
1827 | \r | |
1828 | If 32-bit MMIO register operations are not supported, then ASSERT().\r | |
1829 | If StartBit is greater than 31, then ASSERT().\r | |
1830 | If EndBit is greater than 31, then ASSERT().\r | |
1831 | If EndBit is less than StartBit, then ASSERT().\r | |
1832 | \r | |
58380e9c | 1833 | @param Address The MMIO register to read.\r |
b7c5912a | 1834 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
1835 | Range 0..31.\r | |
1836 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
1837 | Range 0..31.\r | |
1838 | \r | |
1839 | @return The value read.\r | |
1840 | \r | |
1841 | **/\r | |
1842 | UINT32\r | |
1843 | EFIAPI\r | |
1844 | MmioBitFieldRead32 (\r | |
2f88bd3a MK |
1845 | IN UINTN Address,\r |
1846 | IN UINTN StartBit,\r | |
1847 | IN UINTN EndBit\r | |
b7c5912a | 1848 | )\r |
1849 | {\r | |
1850 | return BitFieldRead32 (MmioRead32 (Address), StartBit, EndBit);\r | |
1851 | }\r | |
1852 | \r | |
1853 | /**\r | |
1854 | Writes a bit field to a MMIO register.\r | |
1855 | \r | |
1856 | Writes Value to the bit field of the MMIO register. The bit field is\r | |
1857 | specified by the StartBit and the EndBit. All other bits in the destination\r | |
1858 | MMIO register are preserved. The new value of the 32-bit register is returned.\r | |
1859 | \r | |
1860 | If 32-bit MMIO register operations are not supported, then ASSERT().\r | |
1861 | If StartBit is greater than 31, then ASSERT().\r | |
1862 | If EndBit is greater than 31, then ASSERT().\r | |
1863 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 | 1864 | If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
b7c5912a | 1865 | \r |
58380e9c | 1866 | @param Address The MMIO register to write.\r |
b7c5912a | 1867 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
1868 | Range 0..31.\r | |
1869 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
1870 | Range 0..31.\r | |
2fc59a00 | 1871 | @param Value The new value of the bit field.\r |
b7c5912a | 1872 | \r |
1873 | @return The value written back to the MMIO register.\r | |
1874 | \r | |
1875 | **/\r | |
1876 | UINT32\r | |
1877 | EFIAPI\r | |
1878 | MmioBitFieldWrite32 (\r | |
2f88bd3a MK |
1879 | IN UINTN Address,\r |
1880 | IN UINTN StartBit,\r | |
1881 | IN UINTN EndBit,\r | |
1882 | IN UINT32 Value\r | |
b7c5912a | 1883 | )\r |
1884 | {\r | |
1885 | return MmioWrite32 (\r | |
1886 | Address,\r | |
1887 | BitFieldWrite32 (MmioRead32 (Address), StartBit, EndBit, Value)\r | |
1888 | );\r | |
1889 | }\r | |
1890 | \r | |
1891 | /**\r | |
1892 | Reads a bit field in a 32-bit MMIO register, performs a bitwise OR, and\r | |
1893 | writes the result back to the bit field in the 32-bit MMIO register.\r | |
1894 | \r | |
1895 | Reads the 32-bit MMIO register specified by Address, performs a bitwise\r | |
1896 | inclusive OR between the read result and the value specified by OrData, and\r | |
1897 | writes the result to the 32-bit MMIO register specified by Address. The value\r | |
1898 | written to the MMIO register is returned. This function must guarantee that\r | |
1899 | all MMIO read and write operations are serialized. Extra left bits in OrData\r | |
1900 | are stripped.\r | |
1901 | \r | |
1902 | If 32-bit MMIO register operations are not supported, then ASSERT().\r | |
1903 | If StartBit is greater than 31, then ASSERT().\r | |
1904 | If EndBit is greater than 31, then ASSERT().\r | |
1905 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 | 1906 | If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
b7c5912a | 1907 | \r |
58380e9c | 1908 | @param Address The MMIO register to write.\r |
b7c5912a | 1909 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
1910 | Range 0..31.\r | |
1911 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
1912 | Range 0..31.\r | |
1913 | @param OrData The value to OR with read value from the MMIO register.\r | |
1914 | \r | |
1915 | @return The value written back to the MMIO register.\r | |
1916 | \r | |
1917 | **/\r | |
1918 | UINT32\r | |
1919 | EFIAPI\r | |
1920 | MmioBitFieldOr32 (\r | |
2f88bd3a MK |
1921 | IN UINTN Address,\r |
1922 | IN UINTN StartBit,\r | |
1923 | IN UINTN EndBit,\r | |
1924 | IN UINT32 OrData\r | |
b7c5912a | 1925 | )\r |
1926 | {\r | |
1927 | return MmioWrite32 (\r | |
1928 | Address,\r | |
1929 | BitFieldOr32 (MmioRead32 (Address), StartBit, EndBit, OrData)\r | |
1930 | );\r | |
1931 | }\r | |
1932 | \r | |
1933 | /**\r | |
1934 | Reads a bit field in a 32-bit MMIO register, performs a bitwise AND, and\r | |
1935 | writes the result back to the bit field in the 32-bit MMIO register.\r | |
1936 | \r | |
1937 | Reads the 32-bit MMIO register specified by Address, performs a bitwise AND\r | |
1938 | between the read result and the value specified by AndData, and writes the\r | |
1939 | result to the 32-bit MMIO register specified by Address. The value written to\r | |
1940 | the MMIO register is returned. This function must guarantee that all MMIO\r | |
1941 | read and write operations are serialized. Extra left bits in AndData are\r | |
1942 | stripped.\r | |
1943 | \r | |
1944 | If 32-bit MMIO register operations are not supported, then ASSERT().\r | |
1945 | If StartBit is greater than 31, then ASSERT().\r | |
1946 | If EndBit is greater than 31, then ASSERT().\r | |
1947 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 | 1948 | If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
b7c5912a | 1949 | \r |
58380e9c | 1950 | @param Address The MMIO register to write.\r |
b7c5912a | 1951 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
1952 | Range 0..31.\r | |
1953 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
1954 | Range 0..31.\r | |
1955 | @param AndData The value to AND with read value from the MMIO register.\r | |
1956 | \r | |
1957 | @return The value written back to the MMIO register.\r | |
1958 | \r | |
1959 | **/\r | |
1960 | UINT32\r | |
1961 | EFIAPI\r | |
1962 | MmioBitFieldAnd32 (\r | |
2f88bd3a MK |
1963 | IN UINTN Address,\r |
1964 | IN UINTN StartBit,\r | |
1965 | IN UINTN EndBit,\r | |
1966 | IN UINT32 AndData\r | |
b7c5912a | 1967 | )\r |
1968 | {\r | |
1969 | return MmioWrite32 (\r | |
1970 | Address,\r | |
1971 | BitFieldAnd32 (MmioRead32 (Address), StartBit, EndBit, AndData)\r | |
1972 | );\r | |
1973 | }\r | |
1974 | \r | |
1975 | /**\r | |
1976 | Reads a bit field in a 32-bit MMIO register, performs a bitwise AND followed\r | |
1977 | by a bitwise OR, and writes the result back to the bit field in the\r | |
1978 | 32-bit MMIO register.\r | |
1979 | \r | |
1980 | Reads the 32-bit MMIO register specified by Address, performs a bitwise AND\r | |
1981 | followed by a bitwise OR between the read result and the value\r | |
1982 | specified by AndData, and writes the result to the 32-bit MMIO register\r | |
1983 | specified by Address. The value written to the MMIO register is returned.\r | |
1984 | This function must guarantee that all MMIO read and write operations are\r | |
1985 | serialized. Extra left bits in both AndData and OrData are stripped.\r | |
1986 | \r | |
1987 | If 32-bit MMIO register operations are not supported, then ASSERT().\r | |
1988 | If StartBit is greater than 31, then ASSERT().\r | |
1989 | If EndBit is greater than 31, then ASSERT().\r | |
1990 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 LG |
1991 | If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
1992 | If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r | |
b7c5912a | 1993 | \r |
58380e9c | 1994 | @param Address The MMIO register to write.\r |
b7c5912a | 1995 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
1996 | Range 0..31.\r | |
1997 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
1998 | Range 0..31.\r | |
1999 | @param AndData The value to AND with read value from the MMIO register.\r | |
2000 | @param OrData The value to OR with the result of the AND operation.\r | |
2001 | \r | |
2002 | @return The value written back to the MMIO register.\r | |
2003 | \r | |
2004 | **/\r | |
2005 | UINT32\r | |
2006 | EFIAPI\r | |
2007 | MmioBitFieldAndThenOr32 (\r | |
2f88bd3a MK |
2008 | IN UINTN Address,\r |
2009 | IN UINTN StartBit,\r | |
2010 | IN UINTN EndBit,\r | |
2011 | IN UINT32 AndData,\r | |
2012 | IN UINT32 OrData\r | |
b7c5912a | 2013 | )\r |
2014 | {\r | |
2015 | return MmioWrite32 (\r | |
2016 | Address,\r | |
2017 | BitFieldAndThenOr32 (MmioRead32 (Address), StartBit, EndBit, AndData, OrData)\r | |
2018 | );\r | |
2019 | }\r | |
2020 | \r | |
2021 | /**\r | |
2022 | Reads a 64-bit MMIO register, performs a bitwise OR, and writes the\r | |
2023 | result back to the 64-bit MMIO register.\r | |
2024 | \r | |
2025 | Reads the 64-bit MMIO register specified by Address, performs a bitwise\r | |
2026 | inclusive OR between the read result and the value specified by OrData, and\r | |
2027 | writes the result to the 64-bit MMIO register specified by Address. The value\r | |
2028 | written to the MMIO register is returned. This function must guarantee that\r | |
2029 | all MMIO read and write operations are serialized.\r | |
2030 | \r | |
2031 | If 64-bit MMIO register operations are not supported, then ASSERT().\r | |
2032 | \r | |
2033 | @param Address The MMIO register to write.\r | |
2034 | @param OrData The value to OR with the read value from the MMIO register.\r | |
2035 | \r | |
2036 | @return The value written back to the MMIO register.\r | |
2037 | \r | |
2038 | **/\r | |
2039 | UINT64\r | |
2040 | EFIAPI\r | |
2041 | MmioOr64 (\r | |
2f88bd3a MK |
2042 | IN UINTN Address,\r |
2043 | IN UINT64 OrData\r | |
b7c5912a | 2044 | )\r |
2045 | {\r | |
2046 | return MmioWrite64 (Address, MmioRead64 (Address) | OrData);\r | |
2047 | }\r | |
2048 | \r | |
2049 | /**\r | |
2050 | Reads a 64-bit MMIO register, performs a bitwise AND, and writes the result\r | |
2051 | back to the 64-bit MMIO register.\r | |
2052 | \r | |
2053 | Reads the 64-bit MMIO register specified by Address, performs a bitwise AND\r | |
2054 | between the read result and the value specified by AndData, and writes the\r | |
2055 | result to the 64-bit MMIO register specified by Address. The value written to\r | |
2056 | the MMIO register is returned. This function must guarantee that all MMIO\r | |
2057 | read and write operations are serialized.\r | |
2058 | \r | |
2059 | If 64-bit MMIO register operations are not supported, then ASSERT().\r | |
2060 | \r | |
2061 | @param Address The MMIO register to write.\r | |
2062 | @param AndData The value to AND with the read value from the MMIO register.\r | |
2063 | \r | |
2064 | @return The value written back to the MMIO register.\r | |
2065 | \r | |
2066 | **/\r | |
2067 | UINT64\r | |
2068 | EFIAPI\r | |
2069 | MmioAnd64 (\r | |
2f88bd3a MK |
2070 | IN UINTN Address,\r |
2071 | IN UINT64 AndData\r | |
b7c5912a | 2072 | )\r |
2073 | {\r | |
2074 | return MmioWrite64 (Address, MmioRead64 (Address) & AndData);\r | |
2075 | }\r | |
2076 | \r | |
2077 | /**\r | |
2078 | Reads a 64-bit MMIO register, performs a bitwise AND followed by a bitwise\r | |
2079 | inclusive OR, and writes the result back to the 64-bit MMIO register.\r | |
2080 | \r | |
2081 | Reads the 64-bit MMIO register specified by Address, performs a bitwise AND\r | |
2082 | between the read result and the value specified by AndData, performs a\r | |
2083 | bitwise OR between the result of the AND operation and the value specified by\r | |
2084 | OrData, and writes the result to the 64-bit MMIO register specified by\r | |
2085 | Address. The value written to the MMIO register is returned. This function\r | |
2086 | must guarantee that all MMIO read and write operations are serialized.\r | |
2087 | \r | |
2088 | If 64-bit MMIO register operations are not supported, then ASSERT().\r | |
2089 | \r | |
2090 | \r | |
2091 | @param Address The MMIO register to write.\r | |
2092 | @param AndData The value to AND with the read value from the MMIO register.\r | |
2093 | @param OrData The value to OR with the result of the AND operation.\r | |
2094 | \r | |
2095 | @return The value written back to the MMIO register.\r | |
2096 | \r | |
2097 | **/\r | |
2098 | UINT64\r | |
2099 | EFIAPI\r | |
2100 | MmioAndThenOr64 (\r | |
2f88bd3a MK |
2101 | IN UINTN Address,\r |
2102 | IN UINT64 AndData,\r | |
2103 | IN UINT64 OrData\r | |
b7c5912a | 2104 | )\r |
2105 | {\r | |
2106 | return MmioWrite64 (Address, (MmioRead64 (Address) & AndData) | OrData);\r | |
2107 | }\r | |
2108 | \r | |
2109 | /**\r | |
2110 | Reads a bit field of a MMIO register.\r | |
2111 | \r | |
2112 | Reads the bit field in a 64-bit MMIO register. The bit field is specified by\r | |
2113 | the StartBit and the EndBit. The value of the bit field is returned.\r | |
2114 | \r | |
2115 | If 64-bit MMIO register operations are not supported, then ASSERT().\r | |
2116 | If StartBit is greater than 63, then ASSERT().\r | |
2117 | If EndBit is greater than 63, then ASSERT().\r | |
2118 | If EndBit is less than StartBit, then ASSERT().\r | |
2119 | \r | |
58380e9c | 2120 | @param Address The MMIO register to read.\r |
b7c5912a | 2121 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
2122 | Range 0..63.\r | |
2123 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2124 | Range 0..63.\r | |
2125 | \r | |
2126 | @return The value read.\r | |
2127 | \r | |
2128 | **/\r | |
2129 | UINT64\r | |
2130 | EFIAPI\r | |
2131 | MmioBitFieldRead64 (\r | |
2f88bd3a MK |
2132 | IN UINTN Address,\r |
2133 | IN UINTN StartBit,\r | |
2134 | IN UINTN EndBit\r | |
b7c5912a | 2135 | )\r |
2136 | {\r | |
2137 | return BitFieldRead64 (MmioRead64 (Address), StartBit, EndBit);\r | |
2138 | }\r | |
2139 | \r | |
2140 | /**\r | |
2141 | Writes a bit field to a MMIO register.\r | |
2142 | \r | |
2143 | Writes Value to the bit field of the MMIO register. The bit field is\r | |
2144 | specified by the StartBit and the EndBit. All other bits in the destination\r | |
2145 | MMIO register are preserved. The new value of the 64-bit register is returned.\r | |
2146 | \r | |
2147 | If 64-bit MMIO register operations are not supported, then ASSERT().\r | |
2148 | If StartBit is greater than 63, then ASSERT().\r | |
2149 | If EndBit is greater than 63, then ASSERT().\r | |
2150 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 | 2151 | If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
b7c5912a | 2152 | \r |
58380e9c | 2153 | @param Address The MMIO register to write.\r |
b7c5912a | 2154 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
2155 | Range 0..63.\r | |
2156 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2157 | Range 0..63.\r | |
2fc59a00 | 2158 | @param Value The new value of the bit field.\r |
b7c5912a | 2159 | \r |
2160 | @return The value written back to the MMIO register.\r | |
2161 | \r | |
2162 | **/\r | |
2163 | UINT64\r | |
2164 | EFIAPI\r | |
2165 | MmioBitFieldWrite64 (\r | |
2f88bd3a MK |
2166 | IN UINTN Address,\r |
2167 | IN UINTN StartBit,\r | |
2168 | IN UINTN EndBit,\r | |
2169 | IN UINT64 Value\r | |
b7c5912a | 2170 | )\r |
2171 | {\r | |
2172 | return MmioWrite64 (\r | |
2173 | Address,\r | |
2174 | BitFieldWrite64 (MmioRead64 (Address), StartBit, EndBit, Value)\r | |
2175 | );\r | |
2176 | }\r | |
2177 | \r | |
2178 | /**\r | |
2179 | Reads a bit field in a 64-bit MMIO register, performs a bitwise OR, and\r | |
2180 | writes the result back to the bit field in the 64-bit MMIO register.\r | |
2181 | \r | |
2182 | Reads the 64-bit MMIO register specified by Address, performs a bitwise\r | |
2183 | inclusive OR between the read result and the value specified by OrData, and\r | |
2184 | writes the result to the 64-bit MMIO register specified by Address. The value\r | |
2185 | written to the MMIO register is returned. This function must guarantee that\r | |
2186 | all MMIO read and write operations are serialized. Extra left bits in OrData\r | |
2187 | are stripped.\r | |
2188 | \r | |
2189 | If 64-bit MMIO register operations are not supported, then ASSERT().\r | |
2190 | If StartBit is greater than 63, then ASSERT().\r | |
2191 | If EndBit is greater than 63, then ASSERT().\r | |
2192 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 | 2193 | If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
b7c5912a | 2194 | \r |
58380e9c | 2195 | @param Address The MMIO register to write.\r |
b7c5912a | 2196 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
2197 | Range 0..63.\r | |
2198 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2199 | Range 0..63.\r | |
2200 | @param OrData The value to OR with read value from the MMIO register.\r | |
2201 | \r | |
2202 | @return The value written back to the MMIO register.\r | |
2203 | \r | |
2204 | **/\r | |
2205 | UINT64\r | |
2206 | EFIAPI\r | |
2207 | MmioBitFieldOr64 (\r | |
2f88bd3a MK |
2208 | IN UINTN Address,\r |
2209 | IN UINTN StartBit,\r | |
2210 | IN UINTN EndBit,\r | |
2211 | IN UINT64 OrData\r | |
b7c5912a | 2212 | )\r |
2213 | {\r | |
2214 | return MmioWrite64 (\r | |
2215 | Address,\r | |
2216 | BitFieldOr64 (MmioRead64 (Address), StartBit, EndBit, OrData)\r | |
2217 | );\r | |
2218 | }\r | |
2219 | \r | |
2220 | /**\r | |
2221 | Reads a bit field in a 64-bit MMIO register, performs a bitwise AND, and\r | |
2222 | writes the result back to the bit field in the 64-bit MMIO register.\r | |
2223 | \r | |
2224 | Reads the 64-bit MMIO register specified by Address, performs a bitwise AND\r | |
2225 | between the read result and the value specified by AndData, and writes the\r | |
2226 | result to the 64-bit MMIO register specified by Address. The value written to\r | |
2227 | the MMIO register is returned. This function must guarantee that all MMIO\r | |
2228 | read and write operations are serialized. Extra left bits in AndData are\r | |
2229 | stripped.\r | |
2230 | \r | |
2231 | If 64-bit MMIO register operations are not supported, then ASSERT().\r | |
2232 | If StartBit is greater than 63, then ASSERT().\r | |
2233 | If EndBit is greater than 63, then ASSERT().\r | |
2234 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 | 2235 | If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
b7c5912a | 2236 | \r |
58380e9c | 2237 | @param Address The MMIO register to write.\r |
b7c5912a | 2238 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
2239 | Range 0..63.\r | |
2240 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2241 | Range 0..63.\r | |
2242 | @param AndData The value to AND with read value from the MMIO register.\r | |
2243 | \r | |
2244 | @return The value written back to the MMIO register.\r | |
2245 | \r | |
2246 | **/\r | |
2247 | UINT64\r | |
2248 | EFIAPI\r | |
2249 | MmioBitFieldAnd64 (\r | |
2f88bd3a MK |
2250 | IN UINTN Address,\r |
2251 | IN UINTN StartBit,\r | |
2252 | IN UINTN EndBit,\r | |
2253 | IN UINT64 AndData\r | |
b7c5912a | 2254 | )\r |
2255 | {\r | |
2256 | return MmioWrite64 (\r | |
2257 | Address,\r | |
2258 | BitFieldAnd64 (MmioRead64 (Address), StartBit, EndBit, AndData)\r | |
2259 | );\r | |
2260 | }\r | |
2261 | \r | |
2262 | /**\r | |
2263 | Reads a bit field in a 64-bit MMIO register, performs a bitwise AND followed\r | |
2264 | by a bitwise OR, and writes the result back to the bit field in the\r | |
2265 | 64-bit MMIO register.\r | |
2266 | \r | |
2267 | Reads the 64-bit MMIO register specified by Address, performs a bitwise AND\r | |
2268 | followed by a bitwise OR between the read result and the value\r | |
2269 | specified by AndData, and writes the result to the 64-bit MMIO register\r | |
2270 | specified by Address. The value written to the MMIO register is returned.\r | |
2271 | This function must guarantee that all MMIO read and write operations are\r | |
2272 | serialized. Extra left bits in both AndData and OrData are stripped.\r | |
2273 | \r | |
2274 | If 64-bit MMIO register operations are not supported, then ASSERT().\r | |
2275 | If StartBit is greater than 63, then ASSERT().\r | |
2276 | If EndBit is greater than 63, then ASSERT().\r | |
2277 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 LG |
2278 | If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
2279 | If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r | |
b7c5912a | 2280 | \r |
58380e9c | 2281 | @param Address The MMIO register to write.\r |
b7c5912a | 2282 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
2283 | Range 0..63.\r | |
2284 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2285 | Range 0..63.\r | |
2286 | @param AndData The value to AND with read value from the MMIO register.\r | |
2287 | @param OrData The value to OR with the result of the AND operation.\r | |
2288 | \r | |
2289 | @return The value written back to the MMIO register.\r | |
2290 | \r | |
2291 | **/\r | |
2292 | UINT64\r | |
2293 | EFIAPI\r | |
2294 | MmioBitFieldAndThenOr64 (\r | |
2f88bd3a MK |
2295 | IN UINTN Address,\r |
2296 | IN UINTN StartBit,\r | |
2297 | IN UINTN EndBit,\r | |
2298 | IN UINT64 AndData,\r | |
2299 | IN UINT64 OrData\r | |
b7c5912a | 2300 | )\r |
2301 | {\r | |
2302 | return MmioWrite64 (\r | |
2303 | Address,\r | |
2304 | BitFieldAndThenOr64 (MmioRead64 (Address), StartBit, EndBit, AndData, OrData)\r | |
2305 | );\r | |
2306 | }\r |