]>
Commit | Line | Data |
---|---|---|
878ddf1f | 1 | /** @file\r |
2 | This file declares Pci Host Bridge Resource Allocation Protocol\r | |
3 | \r | |
4 | Copyright (c) 2006, Intel Corporation \r | |
5 | All rights reserved. This program and the accompanying materials \r | |
6 | are licensed and made available under the terms and conditions of the BSD License \r | |
7 | which accompanies this distribution. The full text of the license may be found at \r | |
8 | http://opensource.org/licenses/bsd-license.php \r | |
9 | \r | |
10 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r | |
11 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r | |
12 | \r | |
13 | Module Name: PciHostBridgeResourceAllocation.h\r | |
14 | \r | |
15 | @par Revision Reference:\r | |
16 | This protocol is defined in Framework of EFI Pci Host Bridge Resource Allocation Protocol Spec\r | |
17 | Version 0.9\r | |
18 | \r | |
19 | **/\r | |
20 | \r | |
21 | #ifndef _PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_H_\r | |
22 | #define _PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_H_\r | |
23 | \r | |
24 | #define EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_GUID \\r | |
25 | { 0xCF8034BE, 0x6768, 0x4d8b, {0xB7,0x39,0x7C,0xCE,0x68,0x3A,0x9F,0xBE }}\r | |
26 | \r | |
27 | \r | |
28 | typedef struct _EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL;\r | |
29 | \r | |
30 | \r | |
31 | //\r | |
32 | // EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ATTRIBUTES\r | |
33 | //\r | |
34 | \r | |
35 | // If this bit is set, then the PCI Root Bridge does not \r | |
36 | // support separate windows for Non-prefetchable and Prefetchable \r | |
37 | // memory. A PCI bus driver needs to include requests for Prefetchable \r | |
38 | // memory in the Non-prefetchable memory pool.\r | |
39 | //\r | |
40 | #define EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM 1\r | |
41 | \r | |
42 | //\r | |
43 | // If this bit is set, then the PCI Root Bridge supports \r | |
44 | // 64 bit memory windows. If this bit is not set, \r | |
45 | // the PCI bus driver needs to include requests for 64 bit \r | |
46 | // memory address in the corresponding 32 bit memory pool. \r | |
47 | //\r | |
48 | #define EFI_PCI_HOST_BRIDGE_MEM64_DECODE 2\r | |
49 | \r | |
50 | \r | |
51 | //\r | |
52 | // EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE\r | |
53 | //\r | |
54 | typedef enum {\r | |
55 | EfiPciHostBridgeBeginEnumeration,\r | |
56 | EfiPciHostBridgeBeginBusAllocation,\r | |
57 | EfiPciHostBridgeEndBusAllocation,\r | |
58 | EfiPciHostBridgeBeginResourceAllocation,\r | |
59 | EfiPciHostBridgeAllocateResources,\r | |
60 | EfiPciHostBridgeSetResources,\r | |
61 | EfiPciHostBridgeFreeResources,\r | |
62 | EfiPciHostBridgeEndResourceAllocation\r | |
63 | } EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE;\r | |
64 | \r | |
65 | //\r | |
66 | // EfiPciHostBridgeBeginEnumeration\r | |
67 | // Reset the host bridge PCI apertures and internal data structures. \r | |
68 | // PCI enumerator should issue this notification before starting fresh \r | |
69 | // enumeration process. Enumeration cannot be restarted after sending \r | |
70 | // any other notification such as EfiPciHostBridgeBeginBusAllocation. \r | |
71 | //\r | |
72 | // EfiPciHostBridgeBeginBusAllocation \r | |
73 | // The bus allocation phase is about to begin. No specific action \r | |
74 | // is required here. This notification can be used to perform any \r | |
75 | // chipset specific programming. \r | |
76 | //\r | |
77 | // EfiPciHostBridgeEndBusAllocation\r | |
78 | // The bus allocation and bus programming phase is complete. No specific\r | |
79 | // action is required here. This notification can be used to perform any \r | |
80 | // chipset specific programming. \r | |
81 | //\r | |
82 | // EfiPciHostBridgeBeginResourceAllocation\r | |
83 | // The resource allocation phase is about to begin.No specific action is \r | |
84 | // required here. This notification can be used to perform any chipset specific programming. \r | |
85 | //\r | |
86 | // EfiPciHostBridgeAllocateResources\r | |
87 | // Allocate resources per previously submitted requests for all the PCI Root \r | |
88 | // Bridges. These resource settings are returned on the next call to \r | |
89 | // GetProposedResources(). \r | |
90 | //\r | |
91 | // EfiPciHostBridgeSetResources\r | |
92 | // Program the Host Bridge hardware to decode previously allocated resources\r | |
93 | // (proposed resources) for all the PCI Root Bridges. \r | |
94 | //\r | |
95 | // EfiPciHostBridgeFreeResources\r | |
96 | // De-allocate previously allocated resources previously for all the PCI \r | |
97 | // Root Bridges and reset the I/O and memory apertures to initial state. \r | |
98 | //\r | |
99 | // EfiPciHostBridgeEndResourceAllocation\r | |
100 | // The resource allocation phase is completed. No specific action is required \r | |
101 | // here. This notification can be used to perform any chipset specific programming. \r | |
102 | \r | |
103 | \r | |
104 | \r | |
105 | //\r | |
106 | // EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE\r | |
107 | //\r | |
108 | typedef enum {\r | |
109 | EfiPciBeforeChildBusEnumeration, \r | |
110 | EfiPciBeforeResourceCollection\r | |
111 | } EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE;\r | |
112 | \r | |
113 | //\r | |
114 | // EfiPciBeforeChildBusEnumeration\r | |
115 | // This notification is only applicable to PCI-PCI bridges and \r | |
116 | // indicates that the PCI enumerator is about to begin enumerating \r | |
117 | // the bus behind the PCI-PCI Bridge. This notification is sent after \r | |
118 | // the primary bus number, the secondary bus number and the subordinate \r | |
119 | // bus number registers in the PCI-PCI Bridge are programmed to valid \r | |
120 | // (not necessary final) values\r | |
121 | //\r | |
122 | // EfiPciBeforeResourceCollection\r | |
123 | // This notification is sent before the PCI enumerator probes BAR registers \r | |
124 | // for every valid PCI function.\r | |
125 | //\r | |
126 | \r | |
127 | \r | |
128 | /**\r | |
129 | Enter a certain phase of the PCI enumeration process\r | |
130 | \r | |
0647c9ad LG |
131 | @param This The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL instance\r |
132 | @param Phase The phase during enumeration\r | |
878ddf1f | 133 | \r |
0647c9ad LG |
134 | @retval EFI_SUCCESS Success\r |
135 | @retval EFI_OUT_OF_RESOURCES If SubmitResources ( ) could not allocate resources\r | |
136 | @retval EFI_NOT_READY This phase cannot be entered at this time\r | |
137 | @retval EFI_DEVICE_ERROR SetResources failed due to HW error.\r | |
878ddf1f | 138 | \r |
139 | **/\r | |
140 | typedef\r | |
141 | EFI_STATUS\r | |
142 | (EFIAPI *EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_NOTIFY_PHASE) (\r | |
143 | IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,\r | |
144 | IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE Phase\r | |
145 | );\r | |
146 | \r | |
147 | \r | |
148 | /**\r | |
149 | Return the device handle of the next PCI root bridge that is associated with \r | |
150 | this Host Bridge\r | |
151 | \r | |
0647c9ad LG |
152 | @param This The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ PROTOCOL instance\r |
153 | @param RootBridgeHandle Returns the device handle of the next PCI Root Bridge.\r | |
154 | On input, it holds the RootBridgeHandle returned by the most\r | |
155 | recent call to GetNextRootBridge().The handle for the first\r | |
156 | PCI Root Bridge is returned if RootBridgeHandle is NULL on input\r | |
878ddf1f | 157 | \r |
0647c9ad LG |
158 | @retval EFI_SUCCESS Success\r |
159 | @retval EFI_INVALID_PARAMETER RootBridgeHandle is invalid\r | |
878ddf1f | 160 | \r |
161 | **/\r | |
162 | typedef\r | |
163 | EFI_STATUS\r | |
164 | (EFIAPI *EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_GET_NEXT_ROOT_BRIDGE) (\r | |
165 | IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,\r | |
166 | IN OUT EFI_HANDLE *RootBridgeHandle\r | |
167 | );\r | |
168 | \r | |
169 | \r | |
170 | /**\r | |
171 | Returns the attributes of a PCI Root Bridge.\r | |
172 | \r | |
0647c9ad LG |
173 | @param This The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ PROTOCOL instance\r |
174 | @param RootBridgeHandle The device handle of the PCI Root Bridge\r | |
175 | that the caller is interested in\r | |
176 | @param Attribute The pointer to attributes of the PCI Root Bridge\r | |
878ddf1f | 177 | \r |
0647c9ad LG |
178 | @retval EFI_SUCCESS Success\r |
179 | @retval EFI_INVALID_PARAMETER RootBridgeHandle is invalid\r | |
180 | @retval EFI_INVALID_PARAMETER Attributes is NULL\r | |
878ddf1f | 181 | \r |
182 | **/\r | |
183 | typedef\r | |
184 | EFI_STATUS\r | |
185 | (EFIAPI *EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_GET_ATTRIBUTES) (\r | |
186 | IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,\r | |
187 | IN EFI_HANDLE RootBridgeHandle,\r | |
188 | OUT UINT64 *Attributes\r | |
189 | );\r | |
190 | \r | |
191 | \r | |
192 | /**\r | |
193 | This is the request from the PCI enumerator to set up \r | |
194 | the specified PCI Root Bridge for bus enumeration process. \r | |
195 | \r | |
0647c9ad LG |
196 | @param This The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ PROTOCOL instance\r |
197 | @param RootBridgeHandle The PCI Root Bridge to be set up\r | |
198 | @param Configuration Pointer to the pointer to the PCI bus resource descriptor\r | |
878ddf1f | 199 | \r |
0647c9ad LG |
200 | @retval EFI_SUCCESS Success\r |
201 | @retval EFI_INVALID_PARAMETER RootBridgeHandle is invalid\r | |
202 | @retval EFI_DEVICE_ERROR Request failed due to hardware error\r | |
203 | @retval EFI_OUT_OF_RESOURCES Request failed due to lack of resources\r | |
878ddf1f | 204 | \r |
205 | **/\r | |
206 | typedef\r | |
207 | EFI_STATUS\r | |
208 | (EFIAPI *EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_START_BUS_ENUMERATION) (\r | |
209 | IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,\r | |
210 | IN EFI_HANDLE RootBridgeHandle,\r | |
211 | OUT VOID **Configuration\r | |
212 | );\r | |
213 | \r | |
214 | \r | |
215 | /**\r | |
216 | This function programs the PCI Root Bridge hardware so that \r | |
217 | it decodes the specified PCI bus range\r | |
218 | \r | |
0647c9ad LG |
219 | @param This The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ PROTOCOL instance\r |
220 | @param RootBridgeHandle The PCI Root Bridge whose bus range is to be programmed\r | |
221 | @param Configuration The pointer to the PCI bus resource descriptor\r | |
222 | \r | |
223 | @retval EFI_SUCCESS Success\r | |
224 | @retval EFI_INVALID_PARAMETER RootBridgeHandle is invalid\r | |
225 | @retval EFI_INVALID_PARAMETER Configuration is NULL\r | |
226 | @retval EFI_INVALID_PARAMETER Configuration does not point to a valid ACPI resource descriptor\r | |
227 | @retval EFI_INVALID_PARAMETER Configuration contains one or more memory or IO ACPI resource descriptor\r | |
228 | @retval EFI_INVALID_PARAMETER Address Range Minimum or Address Range Length fields in Configuration\r | |
229 | are invalid for this Root Bridge.\r | |
230 | @retval EFI_INVALID_PARAMETER Configuration contains one or more invalid ACPI resource descriptor\r | |
231 | @retval EFI_DEVICE_ERROR Request failed due to hardware error\r | |
232 | @retval EFI_OUT_OF_RESOURCES Request failed due to lack of resources\r | |
878ddf1f | 233 | \r |
234 | **/\r | |
235 | typedef\r | |
236 | EFI_STATUS\r | |
237 | (EFIAPI *EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_SET_BUS_NUMBERS) (\r | |
238 | IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,\r | |
239 | IN EFI_HANDLE RootBridgeHandle,\r | |
240 | IN VOID *Configuration\r | |
241 | );\r | |
242 | \r | |
243 | \r | |
244 | /**\r | |
245 | Submits the I/O and memory resource requirements for the specified PCI Root Bridge\r | |
246 | \r | |
0647c9ad LG |
247 | @param This The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ PROTOCOL instance\r |
248 | @param RootBridgeHandle The PCI Root Bridge whose I/O and memory resource requirements\r | |
249 | are being submitted\r | |
250 | @param Configuration The pointer to the PCI I/O and PCI memory resource descriptor\r | |
878ddf1f | 251 | \r |
0647c9ad LG |
252 | @retval EFI_SUCCESS Success\r |
253 | @retval EFI_INVALID_PARAMETER RootBridgeHandle is invalid\r | |
254 | @retval EFI_INVALID_PARAMETER Configuration is NULL\r | |
255 | @retval EFI_INVALID_PARAMETER Configuration does not point to a valid ACPI resource descriptor\r | |
256 | @retval EFI_INVALID_PARAMETER Configuration includes a resource descriptor of unsupported type\r | |
878ddf1f | 257 | \r |
258 | **/\r | |
259 | typedef\r | |
260 | EFI_STATUS\r | |
261 | (EFIAPI *EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_SUBMIT_RESOURCES) (\r | |
262 | IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,\r | |
263 | IN EFI_HANDLE RootBridgeHandle,\r | |
264 | IN VOID *Configuration\r | |
265 | );\r | |
266 | \r | |
267 | \r | |
268 | /**\r | |
269 | This function returns the proposed resource settings for the specified \r | |
270 | PCI Root Bridge\r | |
271 | \r | |
0647c9ad LG |
272 | @param This The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ PROTOCOL instance\r |
273 | @param RootBridgeHandle The PCI Root Bridge handle\r | |
274 | @param Configuration The pointer to the pointer to the PCI I/O\r | |
275 | and memory resource descriptor\r | |
878ddf1f | 276 | \r |
0647c9ad LG |
277 | @retval EFI_SUCCESS Success\r |
278 | @retval EFI_INVALID_PARAMETER RootBridgeHandle is invalid\r | |
279 | @retval EFI_DEVICE_ERROR Request failed due to hardware error\r | |
280 | @retval EFI_OUT_OF_RESOURCES Request failed due to lack of resources\r | |
878ddf1f | 281 | \r |
282 | **/\r | |
283 | typedef\r | |
284 | EFI_STATUS\r | |
285 | (EFIAPI *EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_GET_PROPOSED_RESOURCES) (\r | |
286 | IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,\r | |
287 | IN EFI_HANDLE RootBridgeHandle,\r | |
288 | OUT VOID **Configuration\r | |
289 | );\r | |
290 | \r | |
291 | \r | |
292 | \r | |
293 | /**\r | |
294 | This function is called for all the PCI controllers that the PCI \r | |
295 | bus driver finds. Can be used to Preprogram the controller.\r | |
296 | \r | |
0647c9ad LG |
297 | @param This The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ PROTOCOL instance\r |
298 | @param RootBridgeHandle The PCI Root Bridge handle\r | |
299 | @param PciBusAddress Address of the controller on the PCI bus\r | |
300 | @param Phase The Phase during resource allocation\r | |
878ddf1f | 301 | \r |
0647c9ad LG |
302 | @retval EFI_SUCCESS Success\r |
303 | @retval EFI_INVALID_PARAMETER RootBridgeHandle is invalid\r | |
304 | @retval EFI_DEVICE_ERROR Device pre-initialization failed due to hardware error.\r | |
878ddf1f | 305 | \r |
306 | **/\r | |
307 | typedef\r | |
308 | EFI_STATUS\r | |
309 | (EFIAPI *EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_PREPROCESS_CONTROLLER) (\r | |
310 | IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,\r | |
311 | IN EFI_HANDLE RootBridgeHandle,\r | |
312 | IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS PciAddress,\r | |
313 | IN EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE Phase\r | |
314 | );\r | |
315 | \r | |
316 | /**\r | |
317 | @par Protocol Description:\r | |
318 | Provides the basic interfaces to abstract a PCI host bridge resource allocation. \r | |
319 | \r | |
320 | @param NotifyPhase\r | |
321 | The notification from the PCI bus enumerator that it is about to enter \r | |
322 | a certain phase during the enumeration process.\r | |
323 | \r | |
324 | @param GetNextRootBridge \r | |
325 | Retrieves the device handle for the next PCI root bridge that is produced by the \r | |
326 | host bridge to which this instance of the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL is attached. \r | |
327 | \r | |
328 | @param GetAllocAttributes \r | |
329 | Retrieves the allocation-related attributes of a PCI root bridge.\r | |
330 | \r | |
331 | @param StartBusEnumeration \r | |
332 | Sets up a PCI root bridge for bus enumeration. \r | |
333 | \r | |
334 | @param SetBusNumbers \r | |
335 | Sets up the PCI root bridge so that it decodes a specific range of bus numbers.\r | |
336 | \r | |
337 | @param SubmitResources\r | |
338 | Submits the resource requirements for the specified PCI root bridge. \r | |
339 | \r | |
340 | @param GetProposedResources \r | |
341 | Returns the proposed resource assignment for the specified PCI root bridges.\r | |
342 | \r | |
343 | @param PreprocessController\r | |
344 | Provides hooks from the PCI bus driver to every PCI controller \r | |
345 | (device/function) at various stages of the PCI enumeration process that \r | |
346 | allow the host bridge driver to preinitialize individual PCI controllers \r | |
347 | before enumeration.\r | |
348 | \r | |
349 | **/\r | |
350 | struct _EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL {\r | |
351 | EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_NOTIFY_PHASE NotifyPhase;\r | |
352 | EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_GET_NEXT_ROOT_BRIDGE GetNextRootBridge;\r | |
353 | EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_GET_ATTRIBUTES GetAllocAttributes;\r | |
354 | EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_START_BUS_ENUMERATION StartBusEnumeration;\r | |
355 | EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_SET_BUS_NUMBERS SetBusNumbers;\r | |
356 | EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_SUBMIT_RESOURCES SubmitResources;\r | |
357 | EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_GET_PROPOSED_RESOURCES GetProposedResources;\r | |
358 | EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_PREPROCESS_CONTROLLER PreprocessController;\r | |
359 | };\r | |
360 | \r | |
361 | extern EFI_GUID gEfiPciHostBridgeResourceAllocationProtocolGuid;\r | |
362 | \r | |
363 | #endif\r |