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1e57a462 | 1 | /** @file\r |
2 | \r | |
3 | Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r | |
3402aac7 | 4 | \r |
1e57a462 | 5 | This program and the accompanying materials\r |
6 | are licensed and made available under the terms and conditions of the BSD License\r | |
7 | which accompanies this distribution. The full text of the license may be found at\r | |
8 | http://opensource.org/licenses/bsd-license.php\r | |
9 | \r | |
10 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
11 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
12 | \r | |
13 | **/\r | |
14 | \r | |
15 | #include "Flash.h"\r | |
16 | \r | |
17 | NAND_PART_INFO_TABLE gNandPartInfoTable[1] = {\r | |
18 | { 0x2C, 0xBA, 17, 11 }\r | |
19 | };\r | |
20 | \r | |
21 | NAND_FLASH_INFO *gNandFlashInfo = NULL;\r | |
22 | UINT8 *gEccCode;\r | |
23 | UINTN gNum512BytesChunks = 0;\r | |
24 | \r | |
25 | //\r | |
26 | \r | |
27 | // Device path for SemiHosting. It contains our autogened Caller ID GUID.\r | |
28 | \r | |
29 | //\r | |
30 | \r | |
31 | typedef struct {\r | |
32 | \r | |
33 | VENDOR_DEVICE_PATH Guid;\r | |
34 | \r | |
35 | EFI_DEVICE_PATH_PROTOCOL End;\r | |
36 | \r | |
37 | } FLASH_DEVICE_PATH;\r | |
38 | \r | |
39 | \r | |
40 | \r | |
41 | FLASH_DEVICE_PATH gDevicePath = {\r | |
1e57a462 | 42 | {\r |
b0fdce95 | 43 | { HARDWARE_DEVICE_PATH, HW_VENDOR_DP, { sizeof (VENDOR_DEVICE_PATH), 0 } },\r |
1e57a462 | 44 | EFI_CALLER_ID_GUID\r |
1e57a462 | 45 | },\r |
b0fdce95 | 46 | { END_DEVICE_PATH_TYPE, END_ENTIRE_DEVICE_PATH_SUBTYPE, { sizeof (EFI_DEVICE_PATH_PROTOCOL), 0} }\r |
1e57a462 | 47 | };\r |
48 | \r | |
49 | \r | |
50 | \r | |
51 | //Actual page address = Column address + Page address + Block address.\r | |
52 | UINTN\r | |
53 | GetActualPageAddressInBytes (\r | |
54 | UINTN BlockIndex,\r | |
55 | UINTN PageIndex\r | |
56 | )\r | |
57 | {\r | |
58 | //BlockAddressStart = Start of the Block address in actual NAND\r | |
59 | //PageAddressStart = Start of the Page address in actual NAND\r | |
60 | return ((BlockIndex << gNandFlashInfo->BlockAddressStart) + (PageIndex << gNandFlashInfo->PageAddressStart));\r | |
61 | }\r | |
62 | \r | |
63 | VOID\r | |
64 | NandSendCommand (\r | |
65 | UINT8 Command\r | |
66 | )\r | |
67 | {\r | |
68 | MmioWrite16(GPMC_NAND_COMMAND_0, Command);\r | |
69 | }\r | |
70 | \r | |
71 | VOID\r | |
72 | NandSendAddress (\r | |
73 | UINT8 Address\r | |
74 | )\r | |
75 | {\r | |
76 | MmioWrite16(GPMC_NAND_ADDRESS_0, Address);\r | |
77 | }\r | |
78 | \r | |
79 | UINT16\r | |
80 | NandReadStatus (\r | |
81 | VOID\r | |
82 | )\r | |
83 | {\r | |
84 | //Send READ STATUS command\r | |
85 | NandSendCommand(READ_STATUS_CMD);\r | |
86 | \r | |
87 | //Read status.\r | |
88 | return MmioRead16(GPMC_NAND_DATA_0);\r | |
89 | }\r | |
90 | \r | |
91 | VOID\r | |
92 | NandSendAddressCycles (\r | |
93 | UINTN Address\r | |
94 | )\r | |
95 | {\r | |
96 | //Column address\r | |
97 | NandSendAddress(Address & 0xff);\r | |
98 | Address >>= 8;\r | |
99 | \r | |
100 | //Column address\r | |
101 | NandSendAddress(Address & 0x07);\r | |
102 | Address >>= 3;\r | |
103 | \r | |
104 | //Page and Block address\r | |
105 | NandSendAddress(Address & 0xff);\r | |
106 | Address >>= 8;\r | |
107 | \r | |
108 | //Block address\r | |
109 | NandSendAddress(Address & 0xff);\r | |
110 | Address >>= 8;\r | |
111 | \r | |
112 | //Block address\r | |
113 | NandSendAddress(Address & 0x01);\r | |
114 | }\r | |
115 | \r | |
116 | VOID\r | |
117 | GpmcInit (\r | |
118 | VOID\r | |
119 | )\r | |
120 | {\r | |
121 | //Enable Smart-idle mode.\r | |
122 | MmioWrite32 (GPMC_SYSCONFIG, SMARTIDLEMODE);\r | |
123 | \r | |
124 | //Set IRQSTATUS and IRQENABLE to the reset value\r | |
125 | MmioWrite32 (GPMC_IRQSTATUS, 0x0);\r | |
126 | MmioWrite32 (GPMC_IRQENABLE, 0x0);\r | |
127 | \r | |
128 | //Disable GPMC timeout control.\r | |
129 | MmioWrite32 (GPMC_TIMEOUT_CONTROL, TIMEOUTDISABLE);\r | |
130 | \r | |
131 | //Set WRITEPROTECT bit to enable write access.\r | |
132 | MmioWrite32 (GPMC_CONFIG, WRITEPROTECT_HIGH);\r | |
133 | \r | |
134 | //NOTE: Following GPMC_CONFIGi_0 register settings are taken from u-boot memory dump.\r | |
135 | MmioWrite32 (GPMC_CONFIG1_0, DEVICETYPE_NAND | DEVICESIZE_X16);\r | |
136 | MmioWrite32 (GPMC_CONFIG2_0, CSRDOFFTIME | CSWROFFTIME);\r | |
137 | MmioWrite32 (GPMC_CONFIG3_0, ADVRDOFFTIME | ADVWROFFTIME);\r | |
138 | MmioWrite32 (GPMC_CONFIG4_0, OEONTIME | OEOFFTIME | WEONTIME | WEOFFTIME);\r | |
139 | MmioWrite32 (GPMC_CONFIG5_0, RDCYCLETIME | WRCYCLETIME | RDACCESSTIME | PAGEBURSTACCESSTIME);\r | |
140 | MmioWrite32 (GPMC_CONFIG6_0, WRACCESSTIME | WRDATAONADMUXBUS | CYCLE2CYCLEDELAY | CYCLE2CYCLESAMECSEN);\r | |
141 | MmioWrite32 (GPMC_CONFIG7_0, MASKADDRESS_128MB | CSVALID | BASEADDRESS);\r | |
142 | }\r | |
143 | \r | |
144 | EFI_STATUS\r | |
145 | NandDetectPart (\r | |
146 | VOID\r | |
147 | )\r | |
148 | {\r | |
149 | UINT8 NandInfo = 0;\r | |
150 | UINT8 PartInfo[5];\r | |
151 | UINTN Index;\r | |
152 | BOOLEAN Found = FALSE;\r | |
153 | \r | |
154 | //Send READ ID command\r | |
155 | NandSendCommand(READ_ID_CMD);\r | |
156 | \r | |
157 | //Send one address cycle.\r | |
158 | NandSendAddress(0);\r | |
159 | \r | |
160 | //Read 5-bytes to idenfity code programmed into the NAND flash devices.\r | |
161 | //BYTE 0 = Manufacture ID\r | |
162 | //Byte 1 = Device ID\r | |
163 | //Byte 2, 3, 4 = Nand part specific information (Page size, Block size etc)\r | |
164 | for (Index = 0; Index < sizeof(PartInfo); Index++) {\r | |
165 | PartInfo[Index] = MmioRead16(GPMC_NAND_DATA_0);\r | |
166 | }\r | |
167 | \r | |
168 | //Check if the ManufactureId and DeviceId are part of the currently supported nand parts.\r | |
169 | for (Index = 0; Index < sizeof(gNandPartInfoTable)/sizeof(NAND_PART_INFO_TABLE); Index++) {\r | |
170 | if (gNandPartInfoTable[Index].ManufactureId == PartInfo[0] && gNandPartInfoTable[Index].DeviceId == PartInfo[1]) {\r | |
171 | gNandFlashInfo->BlockAddressStart = gNandPartInfoTable[Index].BlockAddressStart;\r | |
172 | gNandFlashInfo->PageAddressStart = gNandPartInfoTable[Index].PageAddressStart;\r | |
173 | Found = TRUE;\r | |
174 | break;\r | |
175 | }\r | |
176 | }\r | |
177 | \r | |
178 | if (Found == FALSE) {\r | |
179 | DEBUG ((EFI_D_ERROR, "Nand part is not currently supported. Manufacture id: %x, Device id: %x\n", PartInfo[0], PartInfo[1]));\r | |
180 | return EFI_NOT_FOUND;\r | |
181 | }\r | |
182 | \r | |
183 | //Populate NAND_FLASH_INFO based on the result of READ ID command.\r | |
184 | gNandFlashInfo->ManufactureId = PartInfo[0];\r | |
185 | gNandFlashInfo->DeviceId = PartInfo[1];\r | |
186 | NandInfo = PartInfo[3];\r | |
187 | \r | |
188 | if (PAGE_SIZE(NandInfo) == PAGE_SIZE_2K_VAL) {\r | |
189 | gNandFlashInfo->PageSize = PAGE_SIZE_2K;\r | |
190 | } else {\r | |
191 | DEBUG ((EFI_D_ERROR, "Unknown Page size.\n"));\r | |
192 | return EFI_DEVICE_ERROR;\r | |
193 | }\r | |
194 | \r | |
195 | if (SPARE_AREA_SIZE(NandInfo) == SPARE_AREA_SIZE_64B_VAL) {\r | |
196 | gNandFlashInfo->SparePageSize = SPARE_AREA_SIZE_64B;\r | |
197 | } else {\r | |
198 | DEBUG ((EFI_D_ERROR, "Unknown Spare area size.\n"));\r | |
199 | return EFI_DEVICE_ERROR;\r | |
200 | }\r | |
201 | \r | |
202 | if (BLOCK_SIZE(NandInfo) == BLOCK_SIZE_128K_VAL) {\r | |
203 | gNandFlashInfo->BlockSize = BLOCK_SIZE_128K;\r | |
204 | } else {\r | |
205 | DEBUG ((EFI_D_ERROR, "Unknown Block size.\n"));\r | |
206 | return EFI_DEVICE_ERROR;\r | |
207 | }\r | |
208 | \r | |
209 | if (ORGANIZATION(NandInfo) == ORGANIZATION_X8) {\r | |
210 | gNandFlashInfo->Organization = 0;\r | |
211 | } else if (ORGANIZATION(NandInfo) == ORGANIZATION_X16) {\r | |
212 | gNandFlashInfo->Organization = 1;\r | |
213 | }\r | |
214 | \r | |
215 | //Calculate total number of blocks.\r | |
216 | gNandFlashInfo->NumPagesPerBlock = DivU64x32(gNandFlashInfo->BlockSize, gNandFlashInfo->PageSize);\r | |
217 | \r | |
218 | return EFI_SUCCESS;\r | |
219 | }\r | |
220 | \r | |
221 | VOID\r | |
222 | NandConfigureEcc (\r | |
223 | VOID\r | |
224 | )\r | |
225 | {\r | |
226 | //Define ECC size 0 and size 1 to 512 bytes\r | |
227 | MmioWrite32 (GPMC_ECC_SIZE_CONFIG, (ECCSIZE0_512BYTES | ECCSIZE1_512BYTES));\r | |
228 | }\r | |
229 | \r | |
3402aac7 | 230 | VOID\r |
1e57a462 | 231 | NandEnableEcc (\r |
232 | VOID\r | |
233 | )\r | |
234 | {\r | |
235 | //Clear all the ECC result registers and select ECC result register 1\r | |
236 | MmioWrite32 (GPMC_ECC_CONTROL, (ECCCLEAR | ECCPOINTER_REG1));\r | |
237 | \r | |
238 | //Enable ECC engine on CS0\r | |
239 | MmioWrite32 (GPMC_ECC_CONFIG, (ECCENABLE | ECCCS_0 | ECC16B));\r | |
240 | }\r | |
241 | \r | |
242 | VOID\r | |
243 | NandDisableEcc (\r | |
244 | VOID\r | |
245 | )\r | |
246 | {\r | |
247 | //Turn off ECC engine.\r | |
248 | MmioWrite32 (GPMC_ECC_CONFIG, ECCDISABLE);\r | |
249 | }\r | |
250 | \r | |
251 | VOID\r | |
252 | NandCalculateEcc (\r | |
253 | VOID\r | |
254 | )\r | |
255 | {\r | |
256 | UINTN Index;\r | |
257 | UINTN EccResultRegister;\r | |
258 | UINTN EccResult;\r | |
259 | \r | |
260 | //Capture 32-bit ECC result for each 512-bytes chunk.\r | |
261 | //In our case PageSize is 2K so read ECC1-ECC4 result registers and\r | |
262 | //generate total of 12-bytes of ECC code for the particular page.\r | |
263 | \r | |
264 | EccResultRegister = GPMC_ECC1_RESULT;\r | |
265 | \r | |
266 | for (Index = 0; Index < gNum512BytesChunks; Index++) {\r | |
267 | \r | |
268 | EccResult = MmioRead32 (EccResultRegister);\r | |
269 | \r | |
270 | //Calculate ECC code from 32-bit ECC result value.\r | |
3402aac7 | 271 | //NOTE: Following calculation is not part of TRM. We got this information\r |
1e57a462 | 272 | //from Beagleboard mailing list.\r |
273 | gEccCode[Index * 3] = EccResult & 0xFF;\r | |
274 | gEccCode[(Index * 3) + 1] = (EccResult >> 16) & 0xFF;\r | |
275 | gEccCode[(Index * 3) + 2] = (((EccResult >> 20) & 0xF0) | ((EccResult >> 8) & 0x0F));\r | |
276 | \r | |
277 | //Point to next ECC result register.\r | |
278 | EccResultRegister += 4;\r | |
279 | }\r | |
280 | }\r | |
281 | \r | |
282 | EFI_STATUS\r | |
283 | NandReadPage (\r | |
284 | IN UINTN BlockIndex,\r | |
285 | IN UINTN PageIndex,\r | |
286 | OUT VOID *Buffer,\r | |
287 | OUT UINT8 *SpareBuffer\r | |
288 | )\r | |
289 | {\r | |
290 | UINTN Address;\r | |
291 | UINTN Index;\r | |
292 | UINTN NumMainAreaWords = (gNandFlashInfo->PageSize/2);\r | |
293 | UINTN NumSpareAreaWords = (gNandFlashInfo->SparePageSize/2);\r | |
294 | UINT16 *MainAreaWordBuffer = Buffer;\r | |
295 | UINT16 *SpareAreaWordBuffer = (UINT16 *)SpareBuffer;\r | |
296 | UINTN Timeout = MAX_RETRY_COUNT;\r | |
297 | \r | |
298 | //Generate device address in bytes to access specific block and page index\r | |
299 | Address = GetActualPageAddressInBytes(BlockIndex, PageIndex);\r | |
300 | \r | |
301 | //Send READ command\r | |
302 | NandSendCommand(PAGE_READ_CMD);\r | |
303 | \r | |
304 | //Send 5 Address cycles to access specific device address\r | |
305 | NandSendAddressCycles(Address);\r | |
306 | \r | |
307 | //Send READ CONFIRM command\r | |
308 | NandSendCommand(PAGE_READ_CONFIRM_CMD);\r | |
309 | \r | |
310 | //Poll till device is busy.\r | |
311 | while (Timeout) {\r | |
312 | if ((NandReadStatus() & NAND_READY) == NAND_READY) {\r | |
313 | break;\r | |
314 | }\r | |
315 | Timeout--;\r | |
316 | }\r | |
317 | \r | |
318 | if (Timeout == 0) {\r | |
319 | DEBUG ((EFI_D_ERROR, "Read page timed out.\n"));\r | |
320 | return EFI_TIMEOUT;\r | |
321 | }\r | |
322 | \r | |
323 | //Reissue READ command\r | |
324 | NandSendCommand(PAGE_READ_CMD);\r | |
325 | \r | |
326 | //Enable ECC engine.\r | |
327 | NandEnableEcc();\r | |
328 | \r | |
329 | //Read data into the buffer.\r | |
330 | for (Index = 0; Index < NumMainAreaWords; Index++) {\r | |
331 | *MainAreaWordBuffer++ = MmioRead16(GPMC_NAND_DATA_0);\r | |
332 | }\r | |
333 | \r | |
334 | //Read spare area into the buffer.\r | |
335 | for (Index = 0; Index < NumSpareAreaWords; Index++) {\r | |
336 | *SpareAreaWordBuffer++ = MmioRead16(GPMC_NAND_DATA_0);\r | |
337 | }\r | |
338 | \r | |
339 | //Calculate ECC.\r | |
340 | NandCalculateEcc();\r | |
341 | \r | |
342 | //Turn off ECC engine.\r | |
343 | NandDisableEcc();\r | |
344 | \r | |
345 | //Perform ECC correction.\r | |
346 | //Need to implement..\r | |
347 | \r | |
348 | return EFI_SUCCESS;\r | |
349 | }\r | |
350 | \r | |
351 | EFI_STATUS\r | |
352 | NandWritePage (\r | |
353 | IN UINTN BlockIndex,\r | |
354 | IN UINTN PageIndex,\r | |
355 | OUT VOID *Buffer,\r | |
356 | IN UINT8 *SpareBuffer\r | |
357 | )\r | |
358 | {\r | |
359 | UINTN Address;\r | |
360 | UINT16 *MainAreaWordBuffer = Buffer;\r | |
361 | UINT16 *SpareAreaWordBuffer = (UINT16 *)SpareBuffer;\r | |
362 | UINTN Index;\r | |
363 | UINTN NandStatus;\r | |
364 | UINTN Timeout = MAX_RETRY_COUNT;\r | |
365 | \r | |
366 | //Generate device address in bytes to access specific block and page index\r | |
367 | Address = GetActualPageAddressInBytes(BlockIndex, PageIndex);\r | |
368 | \r | |
369 | //Send SERIAL DATA INPUT command\r | |
370 | NandSendCommand(PROGRAM_PAGE_CMD);\r | |
371 | \r | |
372 | //Send 5 Address cycles to access specific device address\r | |
373 | NandSendAddressCycles(Address);\r | |
374 | \r | |
375 | //Enable ECC engine.\r | |
376 | NandEnableEcc();\r | |
377 | \r | |
378 | //Data input from Buffer\r | |
379 | for (Index = 0; Index < (gNandFlashInfo->PageSize/2); Index++) {\r | |
380 | MmioWrite16(GPMC_NAND_DATA_0, *MainAreaWordBuffer++);\r | |
381 | \r | |
382 | //After each write access, device has to wait to accept data.\r | |
3402aac7 | 383 | //Currently we may not be programming proper timing parameters to\r |
1e57a462 | 384 | //the GPMC_CONFIGi_0 registers and we would need to figure that out.\r |
385 | //Without following delay, page programming fails.\r | |
386 | gBS->Stall(1);\r | |
387 | }\r | |
388 | \r | |
389 | //Calculate ECC.\r | |
390 | NandCalculateEcc();\r | |
391 | \r | |
392 | //Turn off ECC engine.\r | |
393 | NandDisableEcc();\r | |
394 | \r | |
395 | //Prepare Spare area buffer with ECC codes.\r | |
396 | SetMem(SpareBuffer, gNandFlashInfo->SparePageSize, 0xFF);\r | |
397 | CopyMem(&SpareBuffer[ECC_POSITION], gEccCode, gNum512BytesChunks * 3);\r | |
398 | \r | |
399 | //Program spare area with calculated ECC.\r | |
400 | for (Index = 0; Index < (gNandFlashInfo->SparePageSize/2); Index++) {\r | |
401 | MmioWrite16(GPMC_NAND_DATA_0, *SpareAreaWordBuffer++);\r | |
402 | }\r | |
403 | \r | |
404 | //Send PROGRAM command\r | |
405 | NandSendCommand(PROGRAM_PAGE_CONFIRM_CMD);\r | |
406 | \r | |
407 | //Poll till device is busy.\r | |
408 | NandStatus = 0;\r | |
409 | while (Timeout) {\r | |
410 | NandStatus = NandReadStatus();\r | |
411 | if ((NandStatus & NAND_READY) == NAND_READY) {\r | |
412 | break;\r | |
413 | }\r | |
414 | Timeout--;\r | |
415 | }\r | |
416 | \r | |
417 | if (Timeout == 0) {\r | |
418 | DEBUG ((EFI_D_ERROR, "Program page timed out.\n"));\r | |
419 | return EFI_TIMEOUT;\r | |
420 | }\r | |
421 | \r | |
422 | //Bit0 indicates Pass/Fail status\r | |
423 | if (NandStatus & NAND_FAILURE) {\r | |
424 | return EFI_DEVICE_ERROR;\r | |
425 | }\r | |
426 | \r | |
427 | return EFI_SUCCESS;\r | |
428 | }\r | |
429 | \r | |
430 | EFI_STATUS\r | |
431 | NandEraseBlock (\r | |
432 | IN UINTN BlockIndex\r | |
433 | )\r | |
434 | {\r | |
435 | UINTN Address;\r | |
436 | UINTN NandStatus;\r | |
437 | UINTN Timeout = MAX_RETRY_COUNT;\r | |
438 | \r | |
439 | //Generate device address in bytes to access specific block and page index\r | |
440 | Address = GetActualPageAddressInBytes(BlockIndex, 0);\r | |
441 | \r | |
442 | //Send ERASE SETUP command\r | |
443 | NandSendCommand(BLOCK_ERASE_CMD);\r | |
444 | \r | |
445 | //Send 3 address cycles to device to access Page address and Block address\r | |
446 | Address >>= 11; //Ignore column addresses\r | |
447 | \r | |
448 | NandSendAddress(Address & 0xff);\r | |
449 | Address >>= 8;\r | |
450 | \r | |
451 | NandSendAddress(Address & 0xff);\r | |
452 | Address >>= 8;\r | |
453 | \r | |
454 | NandSendAddress(Address & 0xff);\r | |
455 | \r | |
456 | //Send ERASE CONFIRM command\r | |
457 | NandSendCommand(BLOCK_ERASE_CONFIRM_CMD);\r | |
458 | \r | |
459 | //Poll till device is busy.\r | |
460 | NandStatus = 0;\r | |
461 | while (Timeout) {\r | |
462 | NandStatus = NandReadStatus();\r | |
463 | if ((NandStatus & NAND_READY) == NAND_READY) {\r | |
464 | break;\r | |
465 | }\r | |
466 | Timeout--;\r | |
467 | gBS->Stall(1);\r | |
468 | }\r | |
469 | \r | |
470 | if (Timeout == 0) {\r | |
471 | DEBUG ((EFI_D_ERROR, "Erase block timed out for Block: %d.\n", BlockIndex));\r | |
472 | return EFI_TIMEOUT;\r | |
473 | }\r | |
474 | \r | |
475 | //Bit0 indicates Pass/Fail status\r | |
476 | if (NandStatus & NAND_FAILURE) {\r | |
477 | return EFI_DEVICE_ERROR;\r | |
478 | }\r | |
479 | \r | |
480 | return EFI_SUCCESS;\r | |
481 | }\r | |
482 | \r | |
483 | EFI_STATUS\r | |
484 | NandReadBlock (\r | |
485 | IN UINTN StartBlockIndex,\r | |
486 | IN UINTN EndBlockIndex,\r | |
487 | OUT VOID *Buffer,\r | |
488 | OUT VOID *SpareBuffer\r | |
489 | )\r | |
490 | {\r | |
491 | UINTN BlockIndex;\r | |
492 | UINTN PageIndex;\r | |
493 | EFI_STATUS Status = EFI_SUCCESS;\r | |
494 | \r | |
495 | for (BlockIndex = StartBlockIndex; BlockIndex <= EndBlockIndex; BlockIndex++) {\r | |
496 | //For each block read number of pages\r | |
497 | for (PageIndex = 0; PageIndex < gNandFlashInfo->NumPagesPerBlock; PageIndex++) {\r | |
498 | Status = NandReadPage(BlockIndex, PageIndex, Buffer, SpareBuffer);\r | |
499 | if (EFI_ERROR(Status)) {\r | |
500 | return Status;\r | |
501 | }\r | |
502 | Buffer = ((UINT8 *)Buffer + gNandFlashInfo->PageSize);\r | |
503 | }\r | |
504 | }\r | |
505 | \r | |
506 | return Status;\r | |
507 | }\r | |
508 | \r | |
509 | EFI_STATUS\r | |
510 | NandWriteBlock (\r | |
511 | IN UINTN StartBlockIndex,\r | |
512 | IN UINTN EndBlockIndex,\r | |
513 | OUT VOID *Buffer,\r | |
514 | OUT VOID *SpareBuffer\r | |
515 | )\r | |
516 | {\r | |
517 | UINTN BlockIndex;\r | |
518 | UINTN PageIndex;\r | |
519 | EFI_STATUS Status = EFI_SUCCESS;\r | |
520 | \r | |
521 | for (BlockIndex = StartBlockIndex; BlockIndex <= EndBlockIndex; BlockIndex++) {\r | |
522 | //Page programming.\r | |
523 | for (PageIndex = 0; PageIndex < gNandFlashInfo->NumPagesPerBlock; PageIndex++) {\r | |
524 | Status = NandWritePage(BlockIndex, PageIndex, Buffer, SpareBuffer);\r | |
525 | if (EFI_ERROR(Status)) {\r | |
526 | return Status;\r | |
527 | }\r | |
528 | Buffer = ((UINT8 *)Buffer + gNandFlashInfo->PageSize);\r | |
529 | }\r | |
530 | }\r | |
531 | \r | |
532 | return Status;\r | |
533 | }\r | |
534 | \r | |
535 | EFI_STATUS\r | |
536 | EFIAPI\r | |
537 | NandFlashReset (\r | |
538 | IN EFI_BLOCK_IO_PROTOCOL *This,\r | |
539 | IN BOOLEAN ExtendedVerification\r | |
540 | )\r | |
541 | {\r | |
542 | UINTN BusyStall = 50; // microSeconds\r | |
543 | UINTN ResetBusyTimeout = (1000000 / BusyStall); // 1 Second\r | |
544 | \r | |
545 | //Send RESET command to device.\r | |
546 | NandSendCommand(RESET_CMD);\r | |
3402aac7 | 547 | \r |
1e57a462 | 548 | //Wait for 1ms before we check status register.\r |
549 | gBS->Stall(1000);\r | |
550 | \r | |
551 | //Check BIT#5 & BIT#6 in Status register to make sure RESET is done.\r | |
552 | while ((NandReadStatus() & NAND_RESET_STATUS) != NAND_RESET_STATUS) {\r | |
553 | \r | |
554 | //In case of extended verification, wait for extended amount of time\r | |
555 | //to make sure device is reset.\r | |
556 | if (ExtendedVerification) {\r | |
557 | if (ResetBusyTimeout == 0) {\r | |
558 | return EFI_DEVICE_ERROR;\r | |
559 | }\r | |
560 | \r | |
561 | gBS->Stall(BusyStall);\r | |
562 | ResetBusyTimeout--;\r | |
563 | }\r | |
564 | }\r | |
3402aac7 | 565 | \r |
1e57a462 | 566 | return EFI_SUCCESS;\r |
567 | }\r | |
568 | \r | |
569 | EFI_STATUS\r | |
570 | EFIAPI\r | |
571 | NandFlashReadBlocks (\r | |
572 | IN EFI_BLOCK_IO_PROTOCOL *This,\r | |
573 | IN UINT32 MediaId,\r | |
574 | IN EFI_LBA Lba,\r | |
575 | IN UINTN BufferSize,\r | |
576 | OUT VOID *Buffer\r | |
577 | )\r | |
578 | {\r | |
579 | UINTN NumBlocks;\r | |
580 | UINTN EndBlockIndex;\r | |
581 | EFI_STATUS Status;\r | |
582 | UINT8 *SpareBuffer = NULL;\r | |
583 | \r | |
584 | if (Buffer == NULL) {\r | |
585 | Status = EFI_INVALID_PARAMETER;\r | |
586 | goto exit;\r | |
587 | }\r | |
3402aac7 | 588 | \r |
1e57a462 | 589 | if (Lba > LAST_BLOCK) {\r |
590 | Status = EFI_INVALID_PARAMETER;\r | |
591 | goto exit;\r | |
592 | }\r | |
3402aac7 | 593 | \r |
1e57a462 | 594 | if ((BufferSize % gNandFlashInfo->BlockSize) != 0) {\r |
595 | Status = EFI_BAD_BUFFER_SIZE;\r | |
596 | goto exit;\r | |
597 | }\r | |
598 | \r | |
599 | NumBlocks = DivU64x32(BufferSize, gNandFlashInfo->BlockSize);\r | |
600 | EndBlockIndex = ((UINTN)Lba + NumBlocks) - 1;\r | |
601 | \r | |
602 | SpareBuffer = (UINT8 *)AllocatePool(gNandFlashInfo->SparePageSize);\r | |
603 | if (SpareBuffer == NULL) {\r | |
604 | Status = EFI_OUT_OF_RESOURCES;\r | |
605 | goto exit;\r | |
606 | }\r | |
607 | \r | |
608 | //Read block\r | |
609 | Status = NandReadBlock((UINTN)Lba, EndBlockIndex, Buffer, SpareBuffer);\r | |
610 | if (EFI_ERROR(Status)) {\r | |
611 | DEBUG((EFI_D_ERROR, "Read block fails: %x\n", Status));\r | |
612 | goto exit;\r | |
613 | }\r | |
614 | \r | |
615 | exit:\r | |
616 | if (SpareBuffer != NULL) {\r | |
617 | FreePool (SpareBuffer);\r | |
618 | }\r | |
619 | \r | |
620 | return Status;\r | |
621 | }\r | |
622 | \r | |
623 | EFI_STATUS\r | |
624 | EFIAPI\r | |
625 | NandFlashWriteBlocks (\r | |
626 | IN EFI_BLOCK_IO_PROTOCOL *This,\r | |
627 | IN UINT32 MediaId,\r | |
628 | IN EFI_LBA Lba,\r | |
629 | IN UINTN BufferSize,\r | |
630 | IN VOID *Buffer\r | |
631 | )\r | |
632 | {\r | |
633 | UINTN BlockIndex;\r | |
634 | UINTN NumBlocks;\r | |
635 | UINTN EndBlockIndex;\r | |
636 | EFI_STATUS Status;\r | |
637 | UINT8 *SpareBuffer = NULL;\r | |
638 | \r | |
639 | if (Buffer == NULL) {\r | |
640 | Status = EFI_INVALID_PARAMETER;\r | |
641 | goto exit;\r | |
642 | }\r | |
3402aac7 | 643 | \r |
1e57a462 | 644 | if (Lba > LAST_BLOCK) {\r |
645 | Status = EFI_INVALID_PARAMETER;\r | |
646 | goto exit;\r | |
647 | }\r | |
3402aac7 | 648 | \r |
1e57a462 | 649 | if ((BufferSize % gNandFlashInfo->BlockSize) != 0) {\r |
650 | Status = EFI_BAD_BUFFER_SIZE;\r | |
651 | goto exit;\r | |
652 | }\r | |
653 | \r | |
654 | NumBlocks = DivU64x32(BufferSize, gNandFlashInfo->BlockSize);\r | |
655 | EndBlockIndex = ((UINTN)Lba + NumBlocks) - 1;\r | |
656 | \r | |
657 | SpareBuffer = (UINT8 *)AllocatePool(gNandFlashInfo->SparePageSize);\r | |
658 | if (SpareBuffer == NULL) {\r | |
659 | Status = EFI_OUT_OF_RESOURCES;\r | |
660 | goto exit;\r | |
661 | }\r | |
662 | \r | |
663 | // Erase block\r | |
664 | for (BlockIndex = (UINTN)Lba; BlockIndex <= EndBlockIndex; BlockIndex++) {\r | |
665 | Status = NandEraseBlock(BlockIndex);\r | |
666 | if (EFI_ERROR(Status)) {\r | |
667 | DEBUG((EFI_D_ERROR, "Erase block failed. Status: %x\n", Status));\r | |
668 | goto exit;\r | |
669 | }\r | |
670 | }\r | |
3402aac7 | 671 | \r |
1e57a462 | 672 | // Program data\r |
673 | Status = NandWriteBlock((UINTN)Lba, EndBlockIndex, Buffer, SpareBuffer);\r | |
674 | if (EFI_ERROR(Status)) {\r | |
675 | DEBUG((EFI_D_ERROR, "Block write fails: %x\n", Status));\r | |
676 | goto exit;\r | |
677 | }\r | |
678 | \r | |
679 | exit:\r | |
680 | if (SpareBuffer != NULL) {\r | |
681 | FreePool (SpareBuffer);\r | |
682 | }\r | |
683 | \r | |
684 | return Status;\r | |
685 | }\r | |
686 | \r | |
687 | EFI_STATUS\r | |
688 | EFIAPI\r | |
689 | NandFlashFlushBlocks (\r | |
690 | IN EFI_BLOCK_IO_PROTOCOL *This\r | |
691 | )\r | |
692 | {\r | |
693 | return EFI_SUCCESS;\r | |
694 | }\r | |
695 | \r | |
696 | \r | |
697 | \r | |
698 | EFI_BLOCK_IO_MEDIA gNandFlashMedia = {\r | |
699 | SIGNATURE_32('n','a','n','d'), // MediaId\r | |
700 | FALSE, // RemovableMedia\r | |
701 | TRUE, // MediaPresent\r | |
702 | FALSE, // LogicalPartition\r | |
703 | FALSE, // ReadOnly\r | |
704 | FALSE, // WriteCaching\r | |
705 | 0, // BlockSize\r | |
706 | 2, // IoAlign\r | |
707 | 0, // Pad\r | |
708 | 0 // LastBlock\r | |
709 | };\r | |
710 | \r | |
3402aac7 | 711 | EFI_BLOCK_IO_PROTOCOL BlockIo =\r |
1e57a462 | 712 | {\r |
713 | EFI_BLOCK_IO_INTERFACE_REVISION, // Revision\r | |
714 | &gNandFlashMedia, // *Media\r | |
715 | NandFlashReset, // Reset\r | |
716 | NandFlashReadBlocks, // ReadBlocks\r | |
717 | NandFlashWriteBlocks, // WriteBlocks\r | |
718 | NandFlashFlushBlocks // FlushBlocks\r | |
719 | };\r | |
720 | \r | |
721 | EFI_STATUS\r | |
722 | NandFlashInitialize (\r | |
723 | IN EFI_HANDLE ImageHandle,\r | |
724 | IN EFI_SYSTEM_TABLE *SystemTable\r | |
725 | )\r | |
726 | {\r | |
727 | EFI_STATUS Status;\r | |
3402aac7 | 728 | \r |
1e57a462 | 729 | gNandFlashInfo = (NAND_FLASH_INFO *)AllocateZeroPool (sizeof(NAND_FLASH_INFO));\r |
730 | \r | |
731 | //Initialize GPMC module.\r | |
732 | GpmcInit();\r | |
733 | \r | |
734 | //Reset NAND part\r | |
735 | NandFlashReset(&BlockIo, FALSE);\r | |
736 | \r | |
737 | //Detect NAND part and populate gNandFlashInfo structure\r | |
738 | Status = NandDetectPart ();\r | |
739 | if (EFI_ERROR(Status)) {\r | |
740 | DEBUG((EFI_D_ERROR, "Nand part id detection failure: Status: %x\n", Status));\r | |
741 | return Status;\r | |
742 | }\r | |
743 | \r | |
744 | //Count total number of 512Bytes chunk based on the page size.\r | |
745 | if (gNandFlashInfo->PageSize == PAGE_SIZE_512B) {\r | |
746 | gNum512BytesChunks = 1;\r | |
747 | } else if (gNandFlashInfo->PageSize == PAGE_SIZE_2K) {\r | |
748 | gNum512BytesChunks = 4;\r | |
749 | } else if (gNandFlashInfo->PageSize == PAGE_SIZE_4K) {\r | |
750 | gNum512BytesChunks = 8;\r | |
751 | }\r | |
752 | \r | |
753 | gEccCode = (UINT8 *)AllocatePool(gNum512BytesChunks * 3);\r | |
754 | if (gEccCode == NULL) {\r | |
755 | return EFI_OUT_OF_RESOURCES;\r | |
756 | }\r | |
757 | \r | |
758 | //Configure ECC\r | |
759 | NandConfigureEcc ();\r | |
760 | \r | |
761 | //Patch EFI_BLOCK_IO_MEDIA structure.\r | |
762 | gNandFlashMedia.BlockSize = gNandFlashInfo->BlockSize;\r | |
763 | gNandFlashMedia.LastBlock = LAST_BLOCK;\r | |
764 | \r | |
765 | //Publish BlockIO.\r | |
766 | Status = gBS->InstallMultipleProtocolInterfaces (\r | |
3402aac7 | 767 | &ImageHandle,\r |
1e57a462 | 768 | &gEfiBlockIoProtocolGuid, &BlockIo,\r |
3402aac7 | 769 | &gEfiDevicePathProtocolGuid, &gDevicePath,\r |
1e57a462 | 770 | NULL\r |
771 | );\r | |
772 | return Status;\r | |
773 | }\r | |
774 | \r |