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1 | /** @file\r |
| 2 | \r |
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3 | Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r |
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4 | \r |
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5 | SPDX-License-Identifier: BSD-2-Clause-Patent\r |
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6 | \r |
| 7 | **/\r |
| 8 | \r |
| 9 | #ifndef __OMAP3530UART_H__\r |
| 10 | #define __OMAP3530UART_H__\r |
| 11 | \r |
| 12 | #define UART1_BASE (0x4806A000)\r |
| 13 | #define UART2_BASE (0x4806C000)\r |
| 14 | #define UART3_BASE (0x49020000)\r |
| 15 | \r |
| 16 | #define UART_DLL_REG (0x0000)\r |
| 17 | #define UART_RBR_REG (0x0000)\r |
| 18 | #define UART_THR_REG (0x0000)\r |
| 19 | #define UART_DLH_REG (0x0004)\r |
| 20 | #define UART_FCR_REG (0x0008)\r |
| 21 | #define UART_LCR_REG (0x000C)\r |
| 22 | #define UART_MCR_REG (0x0010)\r |
| 23 | #define UART_LSR_REG (0x0014)\r |
| 24 | #define UART_MDR1_REG (0x0020)\r |
| 25 | \r |
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26 | #define UART_FCR_TX_FIFO_CLEAR BIT2\r |
| 27 | #define UART_FCR_RX_FIFO_CLEAR BIT1\r |
| 28 | #define UART_FCR_FIFO_ENABLE BIT0\r |
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29 | \r |
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30 | #define UART_LCR_DIV_EN_ENABLE BIT7\r |
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31 | #define UART_LCR_DIV_EN_DISABLE (0UL << 7)\r |
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32 | #define UART_LCR_CHAR_LENGTH_8 (BIT1 | BIT0)\r |
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33 | \r |
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34 | #define UART_MCR_RTS_FORCE_ACTIVE BIT1\r |
| 35 | #define UART_MCR_DTR_FORCE_ACTIVE BIT0\r |
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36 | \r |
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37 | #define UART_LSR_TX_FIFO_E_MASK BIT5\r |
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38 | #define UART_LSR_TX_FIFO_E_NOT_EMPTY (0UL << 5)\r |
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39 | #define UART_LSR_TX_FIFO_E_EMPTY BIT5\r |
| 40 | #define UART_LSR_RX_FIFO_E_MASK BIT0\r |
| 41 | #define UART_LSR_RX_FIFO_E_NOT_EMPTY BIT0\r |
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42 | #define UART_LSR_RX_FIFO_E_EMPTY (0UL << 0)\r |
| 43 | \r |
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44 | // BIT2:BIT0\r |
| 45 | #define UART_MDR1_MODE_SELECT_DISABLE (7UL)\r |
| 46 | #define UART_MDR1_MODE_SELECT_UART_16X (0UL)\r |
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47 | \r |
| 48 | #endif // __OMAP3530UART_H__\r |
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