]>
Commit | Line | Data |
---|---|---|
3d15d6c4 | 1 | /** @file |
2 | ||
3 | Copyright (c) 2011, ARM Ltd. All rights reserved.<BR> | |
4 | This program and the accompanying materials | |
5 | are licensed and made available under the terms and conditions of the BSD License | |
6 | which accompanies this distribution. The full text of the license may be found at | |
7 | http://opensource.org/licenses/bsd-license.php | |
8 | ||
9 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, | |
10 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. | |
11 | ||
12 | **/ | |
13 | ||
14 | #ifndef __OMAP3_DSS_GRAPHICS__ | |
15 | #define __OMAP3_DSS_GRAPHICS__ | |
16 | ||
17 | #include <Library/UefiBootServicesTableLib.h> | |
18 | #include <Library/UefiLib.h> | |
19 | #include <Library/DebugLib.h> | |
20 | #include <Library/MemoryAllocationLib.h> | |
21 | #include <Library/IoLib.h> | |
22 | ||
23 | #include <Protocol/DevicePathToText.h> | |
24 | #include <Protocol/EmbeddedExternalDevice.h> | |
25 | #include <Protocol/Cpu.h> | |
26 | ||
27 | #include <Guid/GlobalVariable.h> | |
28 | ||
29 | #include <Omap3530/Omap3530.h> | |
30 | #include <TPS65950.h> | |
31 | ||
32 | typedef struct { | |
33 | VENDOR_DEVICE_PATH Guid; | |
34 | EFI_DEVICE_PATH_PROTOCOL End; | |
35 | } LCD_GRAPHICS_DEVICE_PATH; | |
36 | ||
37 | typedef struct { | |
38 | UINTN Signature; | |
39 | EFI_HANDLE Handle; | |
40 | EFI_GRAPHICS_OUTPUT_MODE_INFORMATION ModeInfo; | |
41 | EFI_GRAPHICS_OUTPUT_PROTOCOL_MODE Mode; | |
42 | EFI_GRAPHICS_OUTPUT_PROTOCOL Gop; | |
43 | LCD_GRAPHICS_DEVICE_PATH DevicePath; | |
44 | // EFI_EVENT ExitBootServicesEvent; | |
45 | } LCD_INSTANCE; | |
46 | ||
47 | #define LCD_INSTANCE_SIGNATURE SIGNATURE_32('l', 'c', 'd', '0') | |
48 | #define LCD_INSTANCE_FROM_GOP_THIS(a) CR (a, LCD_INSTANCE, Gop, LCD_INSTANCE_SIGNATURE) | |
49 | ||
50 | typedef struct { | |
51 | UINTN Mode; | |
52 | UINTN HorizontalResolution; | |
53 | UINTN VerticalResolution; | |
54 | ||
55 | UINT32 DssDivisor; | |
56 | UINT32 DispcDivisor; | |
57 | ||
58 | UINT32 HSync; | |
59 | UINT32 HFrontPorch; | |
60 | UINT32 HBackPorch; | |
61 | ||
62 | UINT32 VSync; | |
63 | UINT32 VFrontPorch; | |
64 | UINT32 VBackPorch; | |
65 | } LCD_MODE; | |
66 | ||
67 | EFI_STATUS | |
68 | InitializeDisplay ( | |
69 | IN LCD_INSTANCE* Instance | |
70 | ); | |
71 | ||
72 | EFI_STATUS | |
73 | EFIAPI | |
74 | LcdGraphicsQueryMode ( | |
75 | IN EFI_GRAPHICS_OUTPUT_PROTOCOL *This, | |
76 | IN UINT32 ModeNumber, | |
77 | OUT UINTN *SizeOfInfo, | |
78 | OUT EFI_GRAPHICS_OUTPUT_MODE_INFORMATION **Info | |
79 | ); | |
80 | ||
81 | EFI_STATUS | |
82 | EFIAPI | |
83 | LcdGraphicsSetMode ( | |
84 | IN EFI_GRAPHICS_OUTPUT_PROTOCOL *This, | |
85 | IN UINT32 ModeNumber | |
86 | ); | |
87 | ||
88 | EFI_STATUS | |
89 | EFIAPI | |
90 | LcdGraphicsBlt ( | |
91 | IN EFI_GRAPHICS_OUTPUT_PROTOCOL *This, | |
92 | IN OUT EFI_GRAPHICS_OUTPUT_BLT_PIXEL *BltBuffer, OPTIONAL | |
93 | IN EFI_GRAPHICS_OUTPUT_BLT_OPERATION BltOperation, | |
94 | IN UINTN SourceX, | |
95 | IN UINTN SourceY, | |
96 | IN UINTN DestinationX, | |
97 | IN UINTN DestinationY, | |
98 | IN UINTN Width, | |
99 | IN UINTN Height, | |
100 | IN UINTN Delta OPTIONAL // Number of BYTES in a row of the BltBuffer | |
101 | ); | |
102 | ||
103 | // HW registers | |
104 | #define CM_FCLKEN_DSS 0x48004E00 | |
105 | #define CM_ICLKEN_DSS 0x48004E10 | |
106 | ||
107 | #define DSS_CONTROL 0x48050040 | |
108 | #define DSS_SYSCONFIG 0x48050010 | |
109 | #define DSS_SYSSTATUS 0x48050014 | |
110 | ||
111 | #define DISPC_CONTROL 0x48050440 | |
112 | #define DISPC_CONFIG 0x48050444 | |
113 | #define DISPC_SIZE_LCD 0x4805047C | |
114 | #define DISPC_TIMING_H 0x48050464 | |
115 | #define DISPC_TIMING_V 0x48050468 | |
116 | ||
117 | #define CM_CLKSEL_DSS 0x48004E40 | |
118 | #define DISPC_DIVISOR 0x48050470 | |
119 | #define DISPC_POL_FREQ 0x4805046C | |
120 | ||
121 | #define DISPC_GFX_TABLE_BA 0x480504B8 | |
122 | #define DISPC_GFX_BA0 0x48050480 | |
123 | #define DISPC_GFX_BA1 0x48050484 | |
124 | #define DISPC_GFX_POS 0x48050488 | |
125 | #define DISPC_GFX_SIZE 0x4805048C | |
126 | #define DISPC_GFX_ATTR 0x480504A0 | |
127 | #define DISPC_GFX_PRELD 0x4805062C | |
128 | ||
129 | #define DISPC_DEFAULT_COLOR_0 0x4805044C | |
130 | ||
131 | //#define DISPC_IRQSTATUS | |
132 | ||
133 | // Bits | |
134 | #define EN_TV 0x4 | |
135 | #define EN_DSS2 0x2 | |
136 | #define EN_DSS1 0x1 | |
137 | #define EN_DSS 0x1 | |
138 | ||
139 | #define DSS_SOFTRESET 0x2 | |
140 | #define DSS_RESETDONE 0x1 | |
141 | ||
142 | #define BYPASS_MODE (BIT15 | BIT16) | |
143 | ||
144 | #define LCDENABLE BIT0 | |
145 | #define ACTIVEMATRIX BIT3 | |
146 | #define GOLCD BIT5 | |
147 | #define DATALINES24 (BIT8 | BIT9) | |
148 | #define LCDENABLESIGNAL BIT28 | |
149 | ||
150 | #define GFXENABLE BIT0 | |
151 | #define RGB16 (0x6 << 1) | |
152 | #define BURSTSIZE16 (0x2 << 6) | |
153 | ||
154 | #define CLEARLOADMODE ~(BIT2 | BIT1) | |
155 | #define LOAD_FRAME_ONLY BIT2 | |
156 | ||
157 | #endif |