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1 | ;------------------------------------------------------------------------------\r |
2 | ; @file\r | |
3 | ; Intel TDX APs\r | |
4 | ;\r | |
5 | ; Copyright (c) 2021 - 2022, Intel Corporation. All rights reserved.<BR>\r | |
6 | ; SPDX-License-Identifier: BSD-2-Clause-Patent\r | |
7 | ;\r | |
8 | ;------------------------------------------------------------------------------\r | |
9 | \r | |
10 | %include "TdxCommondefs.inc"\r | |
11 | \r | |
12 | ;\r | |
13 | ; Note: BSP never gets here. APs will be unblocked by DXE\r | |
14 | ;\r | |
15 | ; R8 [31:0] NUM_VCPUS\r | |
16 | ; [63:32] MAX_VCPUS\r | |
17 | ; R9 [31:0] VCPU_INDEX\r | |
18 | ;\r | |
19 | ParkAp:\r | |
20 | \r | |
21 | do_wait_loop:\r | |
22 | ;\r | |
23 | ; register itself in [rsp + CpuArrivalOffset]\r | |
24 | ;\r | |
25 | mov rax, 1\r | |
26 | lock xadd dword [rsp + CpuArrivalOffset], eax\r | |
27 | inc eax\r | |
28 | \r | |
29 | .check_arrival_cnt:\r | |
30 | cmp eax, r8d\r | |
31 | je .check_command\r | |
32 | mov eax, dword[rsp + CpuArrivalOffset]\r | |
33 | jmp .check_arrival_cnt\r | |
34 | \r | |
35 | .check_command:\r | |
36 | mov eax, dword[rsp + CommandOffset]\r | |
37 | cmp eax, MpProtectedModeWakeupCommandNoop\r | |
38 | je .check_command\r | |
39 | \r | |
40 | cmp eax, MpProtectedModeWakeupCommandWakeup\r | |
41 | je .do_wakeup\r | |
42 | \r | |
43 | ; Don't support this command, so ignore\r | |
44 | jmp .check_command\r | |
45 | \r | |
46 | .do_wakeup:\r | |
47 | ;\r | |
48 | ; BSP sets these variables before unblocking APs\r | |
49 | ; RAX: WakeupVectorOffset\r | |
50 | ; RBX: Relocated mailbox address\r | |
51 | ; RBP: vCpuId\r | |
52 | ;\r | |
53 | mov rax, 0\r | |
54 | mov eax, dword[rsp + WakeupVectorOffset]\r | |
55 | mov rbx, [rsp + WakeupArgsRelocatedMailBox]\r | |
56 | nop\r | |
57 | jmp rax\r | |
58 | jmp $\r |