projects / mirror_edk2.git / blame
| Commit | Line | Data |
|---|---|---|
| 6a744d40 LE |
1 | /** @file\r |
| 2 | Plug a PciSegmentLib backend into PciCapLib, for config space access.\r | |
| 3 | \r | |
| 4 | Copyright (C) 2018, Red Hat, Inc.\r | |
| 5 | \r | |
| 6 | This program and the accompanying materials are licensed and made available\r | |
| 7 | under the terms and conditions of the BSD License which accompanies this\r | |
| 8 | distribution. The full text of the license may be found at\r | |
| 9 | http://opensource.org/licenses/bsd-license.php\r | |
| 10 | \r | |
| 11 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, WITHOUT\r | |
| 12 | WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
| 13 | **/\r | |
| 14 | \r | |
| 15 | #include <IndustryStandard/Pci23.h>\r | |
| 16 | \r | |
| 17 | #include <Library/BaseLib.h>\r | |
| 18 | #include <Library/MemoryAllocationLib.h>\r | |
| 19 | #include <Library/PciSegmentLib.h>\r | |
| 20 | \r | |
| 21 | #include "BasePciCapPciSegmentLib.h"\r | |
| 22 | \r | |
| 23 | \r | |
| 24 | /**\r | |
| 25 | Read the config space of a given PCI device (both normal and extended).\r | |
| 26 | \r | |
| 27 | SegmentDevReadConfig() performs as few config space accesses as possible\r | |
| 28 | (without attempting 64-bit wide accesses).\r | |
| 29 | \r | |
| 30 | @param[in] PciDevice Implementation-specific unique representation\r | |
| 31 | of the PCI device in the PCI hierarchy.\r | |
| 32 | \r | |
| 33 | @param[in] SourceOffset Source offset in the config space of the PCI\r | |
| 34 | device to start reading from.\r | |
| 35 | \r | |
| 36 | @param[out] DestinationBuffer Buffer to store the read data to.\r | |
| 37 | \r | |
| 38 | @param[in] Size The number of bytes to transfer.\r | |
| 39 | \r | |
| 40 | @retval RETURN_SUCCESS Size bytes have been transferred from config\r | |
| 41 | space to DestinationBuffer.\r | |
| 42 | \r | |
| 43 | @retval RETURN_UNSUPPORTED Accessing Size bytes from SourceOffset exceeds\r | |
| 44 | the config space limit of the PCI device.\r | |
| 45 | Although PCI_CAP_DEV_READ_CONFIG allows reading\r | |
| 46 | fewer than Size bytes in this case,\r | |
| 47 | SegmentDevReadConfig() will read none.\r | |
| 48 | **/\r | |
| 49 | STATIC\r | |
| 50 | RETURN_STATUS\r | |
| 51 | EFIAPI\r | |
| 52 | SegmentDevReadConfig (\r | |
| 53 | IN PCI_CAP_DEV *PciDevice,\r | |
| 54 | IN UINT16 SourceOffset,\r | |
| 55 | OUT VOID *DestinationBuffer,\r | |
| 56 | IN UINT16 Size\r | |
| 57 | )\r | |
| 58 | {\r | |
| 59 | SEGMENT_DEV *SegmentDev;\r | |
| 60 | UINT16 ConfigSpaceSize;\r | |
| 61 | UINT64 SourceAddress;\r | |
| 62 | \r | |
| 63 | SegmentDev = SEGMENT_DEV_FROM_PCI_CAP_DEV (PciDevice);\r | |
| 64 | ConfigSpaceSize = (SegmentDev->MaxDomain == PciCapNormal ?\r | |
| 65 | PCI_MAX_CONFIG_OFFSET : PCI_EXP_MAX_CONFIG_OFFSET);\r | |
| 66 | //\r | |
| 67 | // Note that all UINT16 variables below are promoted to INT32, and the\r | |
| 68 | // addition and the comparison is carried out in INT32.\r | |
| 69 | //\r | |
| 70 | if (SourceOffset + Size > ConfigSpaceSize) {\r | |
| 71 | return RETURN_UNSUPPORTED;\r | |
| 72 | }\r | |
| 73 | SourceAddress = PCI_SEGMENT_LIB_ADDRESS (SegmentDev->SegmentNr,\r | |
| 74 | SegmentDev->BusNr, SegmentDev->DeviceNr,\r | |
| 75 | SegmentDev->FunctionNr, SourceOffset);\r | |
| 76 | PciSegmentReadBuffer (SourceAddress, Size, DestinationBuffer);\r | |
| 77 | return RETURN_SUCCESS;\r | |
| 78 | }\r | |
| 79 | \r | |
| 80 | \r | |
| 81 | /**\r | |
| 82 | Write the config space of a given PCI device (both normal and extended).\r | |
| 83 | \r | |
| 84 | SegmentDevWriteConfig() performs as few config space accesses as possible\r | |
| 85 | (without attempting 64-bit wide accesses).\r | |
| 86 | \r | |
| 87 | @param[in] PciDevice Implementation-specific unique representation\r | |
| 88 | of the PCI device in the PCI hierarchy.\r | |
| 89 | \r | |
| 90 | @param[in] DestinationOffset Destination offset in the config space of the\r | |
| 91 | PCI device to start writing at.\r | |
| 92 | \r | |
| 93 | @param[in] SourceBuffer Buffer to read the data to be stored from.\r | |
| 94 | \r | |
| 95 | @param[in] Size The number of bytes to transfer.\r | |
| 96 | \r | |
| 97 | @retval RETURN_SUCCESS Size bytes have been transferred from\r | |
| 98 | SourceBuffer to config space.\r | |
| 99 | \r | |
| 100 | @retval RETURN_UNSUPPORTED Accessing Size bytes at DestinationOffset exceeds\r | |
| 101 | the config space limit of the PCI device.\r | |
| 102 | Although PCI_CAP_DEV_WRITE_CONFIG allows writing\r | |
| 103 | fewer than Size bytes in this case,\r | |
| 104 | SegmentDevWriteConfig() will write none.\r | |
| 105 | **/\r | |
| 106 | STATIC\r | |
| 107 | RETURN_STATUS\r | |
| 108 | EFIAPI\r | |
| 109 | SegmentDevWriteConfig (\r | |
| 110 | IN PCI_CAP_DEV *PciDevice,\r | |
| 111 | IN UINT16 DestinationOffset,\r | |
| 112 | IN VOID *SourceBuffer,\r | |
| 113 | IN UINT16 Size\r | |
| 114 | )\r | |
| 115 | {\r | |
| 116 | SEGMENT_DEV *SegmentDev;\r | |
| 117 | UINT16 ConfigSpaceSize;\r | |
| 118 | UINT64 DestinationAddress;\r | |
| 119 | \r | |
| 120 | SegmentDev = SEGMENT_DEV_FROM_PCI_CAP_DEV (PciDevice);\r | |
| 121 | ConfigSpaceSize = (SegmentDev->MaxDomain == PciCapNormal ?\r | |
| 122 | PCI_MAX_CONFIG_OFFSET : PCI_EXP_MAX_CONFIG_OFFSET);\r | |
| 123 | //\r | |
| 124 | // Note that all UINT16 variables below are promoted to INT32, and the\r | |
| 125 | // addition and the comparison is carried out in INT32.\r | |
| 126 | //\r | |
| 127 | if (DestinationOffset + Size > ConfigSpaceSize) {\r | |
| 128 | return RETURN_UNSUPPORTED;\r | |
| 129 | }\r | |
| 130 | DestinationAddress = PCI_SEGMENT_LIB_ADDRESS (SegmentDev->SegmentNr,\r | |
| 131 | SegmentDev->BusNr, SegmentDev->DeviceNr,\r | |
| 132 | SegmentDev->FunctionNr, DestinationOffset);\r | |
| 133 | PciSegmentWriteBuffer (DestinationAddress, Size, SourceBuffer);\r | |
| 134 | return RETURN_SUCCESS;\r | |
| 135 | }\r | |
| 136 | \r | |
| 137 | \r | |
| 138 | /**\r | |
| 139 | Create a PCI_CAP_DEV object from the PCI Segment:Bus:Device.Function\r | |
| 140 | quadruplet. The config space accessors are based upon PciSegmentLib.\r | |
| 141 | \r | |
| 142 | @param[in] MaxDomain If MaxDomain is PciCapExtended, then\r | |
| 143 | PciDevice->ReadConfig() and PciDevice->WriteConfig()\r | |
| 144 | will delegate extended config space accesses too to\r | |
| 145 | PciSegmentReadBuffer() and PciSegmentWriteBuffer(),\r | |
| 146 | respectively. Otherwise, PciDevice->ReadConfig() and\r | |
| 147 | PciDevice->WriteConfig() will reject accesses to\r | |
| 148 | extended config space with RETURN_UNSUPPORTED, without\r | |
| 149 | calling PciSegmentReadBuffer() or\r | |
| 150 | PciSegmentWriteBuffer(). By setting MaxDomain to\r | |
| 151 | PciCapNormal, the platform can prevent undefined\r | |
| 152 | PciSegmentLib behavior when the PCI root bridge under\r | |
| 153 | the PCI device at Segment:Bus:Device.Function doesn't\r | |
| 154 | support extended config space.\r | |
| 155 | \r | |
| 156 | @param[in] Segment 16-bit wide segment number.\r | |
| 157 | \r | |
| 158 | @param[in] Bus 8-bit wide bus number.\r | |
| 159 | \r | |
| 160 | @param[in] Device 5-bit wide device number.\r | |
| 161 | \r | |
| 162 | @param[in] Function 3-bit wide function number.\r | |
| 163 | \r | |
| 164 | @param[out] PciDevice The PCI_CAP_DEV object constructed as described above.\r | |
| 165 | PciDevice can be passed to the PciCapLib APIs.\r | |
| 166 | \r | |
| 167 | @retval RETURN_SUCCESS PciDevice has been constructed and output.\r | |
| 168 | \r | |
| 169 | @retval RETURN_INVALID_PARAMETER Device or Function does not fit in the\r | |
| 170 | permitted number of bits.\r | |
| 171 | \r | |
| 172 | @retval RETURN_OUT_OF_RESOURCES Memory allocation failed.\r | |
| 173 | **/\r | |
| 174 | RETURN_STATUS\r | |
| 175 | EFIAPI\r | |
| 176 | PciCapPciSegmentDeviceInit (\r | |
| 177 | IN PCI_CAP_DOMAIN MaxDomain,\r | |
| 178 | IN UINT16 Segment,\r | |
| 179 | IN UINT8 Bus,\r | |
| 180 | IN UINT8 Device,\r | |
| 181 | IN UINT8 Function,\r | |
| 182 | OUT PCI_CAP_DEV **PciDevice\r | |
| 183 | )\r | |
| 184 | {\r | |
| 185 | SEGMENT_DEV *SegmentDev;\r | |
| 186 | \r | |
| 187 | if (Device > PCI_MAX_DEVICE || Function > PCI_MAX_FUNC) {\r | |
| 188 | return RETURN_INVALID_PARAMETER;\r | |
| 189 | }\r | |
| 190 | \r | |
| 191 | SegmentDev = AllocatePool (sizeof *SegmentDev);\r | |
| 192 | if (SegmentDev == NULL) {\r | |
| 193 | return RETURN_OUT_OF_RESOURCES;\r | |
| 194 | }\r | |
| 195 | \r | |
| 196 | SegmentDev->Signature = SEGMENT_DEV_SIG;\r | |
| 197 | SegmentDev->MaxDomain = MaxDomain;\r | |
| 198 | SegmentDev->SegmentNr = Segment;\r | |
| 199 | SegmentDev->BusNr = Bus;\r | |
| 200 | SegmentDev->DeviceNr = Device;\r | |
| 201 | SegmentDev->FunctionNr = Function;\r | |
| 202 | SegmentDev->BaseDevice.ReadConfig = SegmentDevReadConfig;\r | |
| 203 | SegmentDev->BaseDevice.WriteConfig = SegmentDevWriteConfig;\r | |
| 204 | \r | |
| 205 | *PciDevice = &SegmentDev->BaseDevice;\r | |
| 206 | return RETURN_SUCCESS;\r | |
| 207 | }\r | |
| 208 | \r | |
| 209 | \r | |
| 210 | /**\r | |
| 211 | Free the resources used by PciDevice.\r | |
| 212 | \r | |
| 213 | @param[in] PciDevice The PCI_CAP_DEV object to free, originally produced by\r | |
| 214 | PciCapPciSegmentDeviceInit().\r | |
| 215 | **/\r | |
| 216 | VOID\r | |
| 217 | EFIAPI\r | |
| 218 | PciCapPciSegmentDeviceUninit (\r | |
| 219 | IN PCI_CAP_DEV *PciDevice\r | |
| 220 | )\r | |
| 221 | {\r | |
| 222 | SEGMENT_DEV *SegmentDev;\r | |
| 223 | \r | |
| 224 | SegmentDev = SEGMENT_DEV_FROM_PCI_CAP_DEV (PciDevice);\r | |
| 225 | FreePool (SegmentDev);\r | |
| 226 | }\r |