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49ba9447 | 1 | /**@file\r |
2 | Memory Detection for Virtual Machines.\r | |
3 | \r | |
4b455f7b | 4 | Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>\r |
56d7640a | 5 | This program and the accompanying materials\r |
49ba9447 | 6 | are licensed and made available under the terms and conditions of the BSD License\r |
7 | which accompanies this distribution. The full text of the license may be found at\r | |
8 | http://opensource.org/licenses/bsd-license.php\r | |
9 | \r | |
10 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
11 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
12 | \r | |
13 | Module Name:\r | |
14 | \r | |
15 | MemDetect.c\r | |
16 | \r | |
17 | **/\r | |
18 | \r | |
19 | //\r | |
20 | // The package level header files this module uses\r | |
21 | //\r | |
22 | #include <PiPei.h>\r | |
23 | \r | |
24 | //\r | |
25 | // The Library classes this module consumes\r | |
26 | //\r | |
6a7cba79 | 27 | #include <Library/BaseMemoryLib.h>\r |
49ba9447 | 28 | #include <Library/DebugLib.h>\r |
29 | #include <Library/HobLib.h>\r | |
30 | #include <Library/IoLib.h>\r | |
c1c2669c | 31 | #include <Library/PcdLib.h>\r |
49ba9447 | 32 | #include <Library/PeimEntryPoint.h>\r |
33 | #include <Library/ResourcePublicationLib.h>\r | |
e8e5cd4a | 34 | #include <Library/MtrrLib.h>\r |
49ba9447 | 35 | \r |
36 | #include "Platform.h"\r | |
37 | #include "Cmos.h"\r | |
38 | \r | |
4b455f7b | 39 | UINT32\r |
c0e10976 | 40 | GetSystemMemorySizeBelow4gb (\r |
4b455f7b | 41 | VOID\r |
49ba9447 | 42 | )\r |
43 | {\r | |
44 | UINT8 Cmos0x34;\r | |
45 | UINT8 Cmos0x35;\r | |
46 | \r | |
47 | //\r | |
48 | // CMOS 0x34/0x35 specifies the system memory above 16 MB.\r | |
49 | // * CMOS(0x35) is the high byte\r | |
50 | // * CMOS(0x34) is the low byte\r | |
51 | // * The size is specified in 64kb chunks\r | |
52 | // * Since this is memory above 16MB, the 16MB must be added\r | |
53 | // into the calculation to get the total memory size.\r | |
54 | //\r | |
55 | \r | |
56 | Cmos0x34 = (UINT8) CmosRead8 (0x34);\r | |
57 | Cmos0x35 = (UINT8) CmosRead8 (0x35);\r | |
58 | \r | |
55cdb67a | 59 | return (((UINTN)((Cmos0x35 << 8) + Cmos0x34) << 16) + SIZE_16MB);\r |
49ba9447 | 60 | }\r |
61 | \r | |
62 | \r | |
c0e10976 | 63 | STATIC\r |
64 | UINT64\r | |
65 | GetSystemMemorySizeAbove4gb (\r | |
66 | )\r | |
67 | {\r | |
68 | UINT32 Size;\r | |
69 | UINTN CmosIndex;\r | |
70 | \r | |
71 | //\r | |
72 | // CMOS 0x5b-0x5d specifies the system memory above 4GB MB.\r | |
73 | // * CMOS(0x5d) is the most significant size byte\r | |
74 | // * CMOS(0x5c) is the middle size byte\r | |
75 | // * CMOS(0x5b) is the least significant size byte\r | |
76 | // * The size is specified in 64kb chunks\r | |
77 | //\r | |
78 | \r | |
79 | Size = 0;\r | |
80 | for (CmosIndex = 0x5d; CmosIndex >= 0x5b; CmosIndex--) {\r | |
81 | Size = (UINT32) (Size << 8) + (UINT32) CmosRead8 (CmosIndex);\r | |
82 | }\r | |
83 | \r | |
84 | return LShiftU64 (Size, 16);\r | |
85 | }\r | |
86 | \r | |
36658fff WL |
87 | /**\r |
88 | Publish PEI core memory\r | |
89 | \r | |
90 | @return EFI_SUCCESS The PEIM initialized successfully.\r | |
91 | \r | |
92 | **/\r | |
93 | EFI_STATUS\r | |
94 | PublishPeiMemory (\r | |
95 | VOID\r | |
96 | )\r | |
97 | {\r | |
98 | EFI_STATUS Status;\r | |
99 | EFI_PHYSICAL_ADDRESS MemoryBase;\r | |
100 | UINT64 MemorySize;\r | |
101 | UINT64 LowerMemorySize;\r | |
102 | \r | |
8e54500f JJ |
103 | if (mBootMode == BOOT_ON_S3_RESUME) {\r |
104 | MemoryBase = PcdGet32 (PcdS3AcpiReservedMemoryBase);\r | |
105 | MemorySize = PcdGet32 (PcdS3AcpiReservedMemorySize);\r | |
106 | } else {\r | |
107 | LowerMemorySize = GetSystemMemorySizeBelow4gb ();\r | |
108 | \r | |
109 | //\r | |
110 | // Determine the range of memory to use during PEI\r | |
111 | //\r | |
112 | MemoryBase = PcdGet32 (PcdOvmfDxeMemFvBase) + PcdGet32 (PcdOvmfDxeMemFvSize);\r | |
113 | MemorySize = LowerMemorySize - MemoryBase;\r | |
114 | if (MemorySize > SIZE_64MB) {\r | |
115 | MemoryBase = LowerMemorySize - SIZE_64MB;\r | |
116 | MemorySize = SIZE_64MB;\r | |
117 | }\r | |
36658fff WL |
118 | }\r |
119 | \r | |
120 | //\r | |
121 | // Publish this memory to the PEI Core\r | |
122 | //\r | |
123 | Status = PublishSystemMemory(MemoryBase, MemorySize);\r | |
124 | ASSERT_EFI_ERROR (Status);\r | |
125 | \r | |
126 | return Status;\r | |
127 | }\r | |
128 | \r | |
c0e10976 | 129 | \r |
49ba9447 | 130 | /**\r |
c034906e | 131 | Peform Memory Detection for QEMU / KVM\r |
49ba9447 | 132 | \r |
133 | **/\r | |
c034906e JJ |
134 | STATIC\r |
135 | VOID\r | |
136 | QemuInitializeRam (\r | |
137 | VOID\r | |
49ba9447 | 138 | )\r |
139 | {\r | |
c0e10976 | 140 | UINT64 LowerMemorySize;\r |
141 | UINT64 UpperMemorySize;\r | |
49ba9447 | 142 | \r |
c034906e | 143 | DEBUG ((EFI_D_INFO, "%a called\n", __FUNCTION__));\r |
49ba9447 | 144 | \r |
145 | //\r | |
146 | // Determine total memory size available\r | |
147 | //\r | |
c0e10976 | 148 | LowerMemorySize = GetSystemMemorySizeBelow4gb ();\r |
149 | UpperMemorySize = GetSystemMemorySizeAbove4gb ();\r | |
49ba9447 | 150 | \r |
bd386eaf JJ |
151 | if (mBootMode != BOOT_ON_S3_RESUME) {\r |
152 | //\r | |
153 | // Create memory HOBs\r | |
154 | //\r | |
155 | AddMemoryRangeHob (BASE_1MB, LowerMemorySize);\r | |
156 | AddMemoryRangeHob (0, BASE_512KB + BASE_128KB);\r | |
157 | }\r | |
49ba9447 | 158 | \r |
9ab36385 | 159 | MtrrSetMemoryAttribute (BASE_1MB, LowerMemorySize - BASE_1MB, CacheWriteBack);\r |
e8e5cd4a | 160 | \r |
27d7e63f | 161 | MtrrSetMemoryAttribute (0, BASE_512KB + BASE_128KB, CacheWriteBack);\r |
e8e5cd4a | 162 | \r |
c0e10976 | 163 | if (UpperMemorySize != 0) {\r |
bd386eaf JJ |
164 | if (mBootMode != BOOT_ON_S3_RESUME) {\r |
165 | AddUntestedMemoryBaseSizeHob (BASE_4GB, UpperMemorySize);\r | |
166 | }\r | |
e8e5cd4a | 167 | \r |
27d7e63f | 168 | MtrrSetMemoryAttribute (BASE_4GB, UpperMemorySize, CacheWriteBack);\r |
c0e10976 | 169 | }\r |
49ba9447 | 170 | }\r |
171 | \r | |
c034906e JJ |
172 | /**\r |
173 | Publish system RAM and reserve memory regions\r | |
174 | \r | |
175 | **/\r | |
176 | VOID\r | |
177 | InitializeRamRegions (\r | |
178 | VOID\r | |
179 | )\r | |
180 | {\r | |
2818c158 JJ |
181 | if (!mXen) {\r |
182 | QemuInitializeRam ();\r | |
183 | } else {\r | |
2818c158 JJ |
184 | XenPublishRamRegions ();\r |
185 | }\r | |
8e54500f JJ |
186 | \r |
187 | if (mS3Supported && mBootMode != BOOT_ON_S3_RESUME) {\r | |
188 | //\r | |
189 | // This is the memory range that will be used for PEI on S3 resume\r | |
190 | //\r | |
191 | BuildMemoryAllocationHob (\r | |
192 | (EFI_PHYSICAL_ADDRESS)(UINTN) PcdGet32 (PcdS3AcpiReservedMemoryBase),\r | |
193 | (UINT64)(UINTN) PcdGet32 (PcdS3AcpiReservedMemorySize),\r | |
194 | EfiACPIMemoryNVS\r | |
195 | );\r | |
e249f906 LE |
196 | \r |
197 | //\r | |
198 | // Cover the initial RAM area used as stack and temporary PEI heap.\r | |
199 | //\r | |
200 | // This is reserved as ACPI NVS so it can be used on S3 resume.\r | |
201 | //\r | |
202 | BuildMemoryAllocationHob (\r | |
203 | PcdGet32 (PcdOvmfSecPeiTempRamBase),\r | |
204 | PcdGet32 (PcdOvmfSecPeiTempRamSize),\r | |
205 | EfiACPIMemoryNVS\r | |
206 | );\r | |
78a38b73 | 207 | \r |
ad43bc6b LE |
208 | //\r |
209 | // SEC stores its table of GUIDed section handlers here.\r | |
210 | //\r | |
211 | BuildMemoryAllocationHob (\r | |
212 | PcdGet64 (PcdGuidedExtractHandlerTableAddress),\r | |
213 | PcdGet32 (PcdGuidedExtractHandlerTableSize),\r | |
214 | EfiACPIMemoryNVS\r | |
215 | );\r | |
216 | \r | |
78a38b73 LE |
217 | #ifdef MDE_CPU_X64\r |
218 | //\r | |
219 | // Reserve the initial page tables built by the reset vector code.\r | |
220 | //\r | |
221 | // Since this memory range will be used by the Reset Vector on S3\r | |
222 | // resume, it must be reserved as ACPI NVS.\r | |
223 | //\r | |
224 | BuildMemoryAllocationHob (\r | |
225 | (EFI_PHYSICAL_ADDRESS)(UINTN) PcdGet32 (PcdOvmfSecPageTablesBase),\r | |
226 | (UINT64)(UINTN) PcdGet32 (PcdOvmfSecPageTablesSize),\r | |
227 | EfiACPIMemoryNVS\r | |
228 | );\r | |
229 | #endif\r | |
0e8a31f5 | 230 | }\r |
6a7cba79 | 231 | \r |
0e8a31f5 | 232 | if (mBootMode != BOOT_ON_S3_RESUME) {\r |
6a7cba79 LE |
233 | //\r |
234 | // Reserve the lock box storage area\r | |
235 | //\r | |
236 | // Since this memory range will be used on S3 resume, it must be\r | |
237 | // reserved as ACPI NVS.\r | |
238 | //\r | |
0e8a31f5 LE |
239 | // If S3 is unsupported, then various drivers might still write to the\r |
240 | // LockBox area. We ought to prevent DXE from serving allocation requests\r | |
241 | // such that they would overlap the LockBox storage.\r | |
242 | //\r | |
6a7cba79 LE |
243 | ZeroMem (\r |
244 | (VOID*)(UINTN) PcdGet32 (PcdOvmfLockBoxStorageBase),\r | |
245 | (UINTN) PcdGet32 (PcdOvmfLockBoxStorageSize)\r | |
246 | );\r | |
247 | BuildMemoryAllocationHob (\r | |
248 | (EFI_PHYSICAL_ADDRESS)(UINTN) PcdGet32 (PcdOvmfLockBoxStorageBase),\r | |
249 | (UINT64)(UINTN) PcdGet32 (PcdOvmfLockBoxStorageSize),\r | |
0e8a31f5 | 250 | mS3Supported ? EfiACPIMemoryNVS : EfiBootServicesData\r |
6a7cba79 | 251 | );\r |
8e54500f | 252 | }\r |
c034906e | 253 | }\r |