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49ba9447 | 1 | ;------------------------------------------------------------------------------\r |
7a55c43b | 2 | ; @file\r |
3 | ; Transition from 16 bit real mode into 32 bit flat protected mode\r | |
49ba9447 | 4 | ;\r |
d22d1f53 | 5 | ; Copyright (c) 2008 - 2010, Intel Corporation\r |
49ba9447 | 6 | ; All rights reserved. This program and the accompanying materials\r |
7 | ; are licensed and made available under the terms and conditions of the BSD License\r | |
8 | ; which accompanies this distribution. The full text of the license may be found at\r | |
9 | ; http://opensource.org/licenses/bsd-license.php\r | |
10 | ;\r | |
11 | ; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
12 | ; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
13 | ;\r | |
49ba9447 | 14 | ;------------------------------------------------------------------------------\r |
15 | \r | |
16 | %define SEC_DEFAULT_CR0 0x40000023\r | |
17 | %define SEC_DEFAULT_CR4 0x640\r | |
18 | \r | |
19 | BITS 16\r | |
20 | \r | |
7a55c43b | 21 | ;\r |
22 | ; Modified: EAX, EBX\r | |
23 | ;\r | |
24 | TransitionFromReal16To32BitFlat:\r | |
49ba9447 | 25 | \r |
7a55c43b | 26 | debugShowPostCode POSTCODE_16BIT_MODE\r |
49ba9447 | 27 | \r |
28 | cli\r | |
29 | \r | |
30 | mov bx, 0xf000\r | |
31 | mov ds, bx\r | |
32 | \r | |
33 | mov bx, ADDR16_OF(gdtr)\r | |
34 | \r | |
35 | o32 lgdt [bx]\r | |
36 | \r | |
37 | mov eax, SEC_DEFAULT_CR0\r | |
38 | mov cr0, eax\r | |
39 | \r | |
49ba9447 | 40 | jmp LINEAR_CODE_SEL:dword ADDR_OF(jumpTo32BitAndLandHere)\r |
41 | BITS 32\r | |
42 | jumpTo32BitAndLandHere:\r | |
43 | \r | |
44 | mov eax, SEC_DEFAULT_CR4\r | |
45 | mov cr4, eax\r | |
46 | \r | |
7a55c43b | 47 | debugShowPostCode POSTCODE_32BIT_MODE\r |
49ba9447 | 48 | \r |
7a55c43b | 49 | mov ax, LINEAR_SEL\r |
50 | mov ds, ax\r | |
51 | mov es, ax\r | |
52 | mov fs, ax\r | |
53 | mov gs, ax\r | |
54 | mov ss, ax\r | |
49ba9447 | 55 | \r |
7a55c43b | 56 | OneTimeCallRet TransitionFromReal16To32BitFlat\r |
49ba9447 | 57 | \r |
58 | ALIGN 2\r | |
59 | \r | |
60 | gdtr:\r | |
61 | dw GDT_END - GDT_BASE - 1 ; GDT limit\r | |
62 | dd ADDR_OF(GDT_BASE)\r | |
63 | \r | |
64 | ALIGN 16\r | |
65 | \r | |
66 | GDT_BASE:\r | |
67 | ; null descriptor\r | |
68 | NULL_SEL equ $-GDT_BASE\r | |
7a55c43b | 69 | dw 0 ; limit 15:0\r |
70 | dw 0 ; base 15:0\r | |
71 | db 0 ; base 23:16\r | |
72 | db 0 ; type\r | |
73 | db 0 ; limit 19:16, flags\r | |
74 | db 0 ; base 31:24\r | |
49ba9447 | 75 | \r |
76 | ; linear data segment descriptor\r | |
77 | LINEAR_SEL equ $-GDT_BASE\r | |
7a55c43b | 78 | dw 0FFFFh ; limit 0xFFFFF\r |
79 | dw 0 ; base 0\r | |
80 | db 0\r | |
d22d1f53 | 81 | db 093h ; present, ring 0, data, expand-up, writable, accessed\r |
7a55c43b | 82 | db 0CFh ; page-granular, 32-bit\r |
83 | db 0\r | |
49ba9447 | 84 | \r |
85 | ; linear code segment descriptor\r | |
86 | LINEAR_CODE_SEL equ $-GDT_BASE\r | |
7a55c43b | 87 | dw 0FFFFh ; limit 0xFFFFF\r |
88 | dw 0 ; base 0\r | |
89 | db 0\r | |
d22d1f53 | 90 | db 09Bh ; present, ring 0, data, expand-up, writable, accessed\r |
7a55c43b | 91 | db 0CFh ; page-granular, 32-bit\r |
92 | db 0\r | |
49ba9447 | 93 | \r |
94 | ; system data segment descriptor\r | |
95 | SYS_DATA_SEL equ $-GDT_BASE\r | |
7a55c43b | 96 | dw 0FFFFh ; limit 0xFFFFF\r |
97 | dw 0 ; base 0\r | |
98 | db 0\r | |
d22d1f53 | 99 | db 093h ; present, ring 0, data, expand-up, writable, accessed\r |
7a55c43b | 100 | db 0CFh ; page-granular, 32-bit\r |
101 | db 0\r | |
49ba9447 | 102 | \r |
103 | ; system code segment descriptor\r | |
104 | SYS_CODE_SEL equ $-GDT_BASE\r | |
7a55c43b | 105 | dw 0FFFFh ; limit 0xFFFFF\r |
106 | dw 0 ; base 0\r | |
107 | db 0\r | |
d22d1f53 | 108 | db 09Bh ; present, ring 0, data, expand-up, writable, accessed\r |
7a55c43b | 109 | db 0CFh ; page-granular, 32-bit\r |
110 | db 0\r | |
49ba9447 | 111 | \r |
112 | ; spare segment descriptor\r | |
113 | LINEAR_CODE64_SEL equ $-GDT_BASE\r | |
7a55c43b | 114 | DW -1 ; LimitLow\r |
115 | DW 0 ; BaseLow\r | |
116 | DB 0 ; BaseMid\r | |
49ba9447 | 117 | DB 9bh\r |
7a55c43b | 118 | DB 0afh ; LimitHigh (CS.L=1, CS.D=0)\r |
119 | DB 0 ; BaseHigh\r | |
49ba9447 | 120 | \r |
121 | ; spare segment descriptor\r | |
122 | SPARE4_SEL equ $-GDT_BASE\r | |
7a55c43b | 123 | dw 0 ; limit 0xFFFFF\r |
124 | dw 0 ; base 0\r | |
125 | db 0\r | |
126 | db 0 ; present, ring 0, data, expand-up, writable\r | |
127 | db 0 ; page-granular, 32-bit\r | |
128 | db 0\r | |
49ba9447 | 129 | \r |
130 | ; spare segment descriptor\r | |
131 | SPARE5_SEL equ $-GDT_BASE\r | |
7a55c43b | 132 | dw 0 ; limit 0xFFFFF\r |
133 | dw 0 ; base 0\r | |
134 | db 0\r | |
135 | db 0 ; present, ring 0, data, expand-up, writable\r | |
136 | db 0 ; page-granular, 32-bit\r | |
137 | db 0\r | |
49ba9447 | 138 | \r |
139 | GDT_END:\r | |
140 | \r |