[mirror_edk2.git] / OvmfPkg / ResetVector / ResetVector.nasmb

;------------------------------------------------------------------------------\r
; @file\r
; This file includes all other code files to assemble the reset vector code\r
;\r
; Copyright (c) 2008 - 2013, Intel Corporation. All rights reserved.<BR>\r
; Copyright (c) 2020, Advanced Micro Devices, Inc. All rights reserved.<BR>\r
; SPDX-License-Identifier: BSD-2-Clause-Patent\r
;\r
;------------------------------------------------------------------------------\r
\r
;\r
; If neither ARCH_IA32 nor ARCH_X64 are defined, then try to include\r
; Base.h to use the C pre-processor to determine the architecture.\r
;\r
%ifndef ARCH_IA32\r
  %ifndef ARCH_X64\r
    #include <Base.h>\r
    #if defined (MDE_CPU_IA32)\r
      %define ARCH_IA32\r
    #elif defined (MDE_CPU_X64)\r
      %define ARCH_X64\r
    #endif\r
  %endif\r
%endif\r
\r
%ifdef ARCH_IA32\r
  %ifdef ARCH_X64\r
    %error "Only one of ARCH_IA32 or ARCH_X64 can be defined."\r
  %endif\r
%elifdef ARCH_X64\r
%else\r
  %error "Either ARCH_IA32 or ARCH_X64 must be defined."\r
%endif\r
\r
%include "CommonMacros.inc"\r
\r
%include "PostCodes.inc"\r
\r
%ifdef DEBUG_PORT80\r
  %include "Port80Debug.asm"\r
%elifdef DEBUG_SERIAL\r
  %include "SerialDebug.asm"\r
%else\r
  %include "DebugDisabled.asm"\r
%endif\r
\r
%include "Ia32/SearchForBfvBase.asm"\r
%include "Ia32/SearchForSecEntry.asm"\r
\r
%define WORK_AREA_GUEST_TYPE          (FixedPcdGet32 (PcdOvmfWorkAreaBase))\r
%define PT_ADDR(Offset)               (FixedPcdGet32 (PcdOvmfSecPageTablesBase) + (Offset))\r
\r
%define GHCB_PT_ADDR                  (FixedPcdGet32 (PcdOvmfSecGhcbPageTableBase))\r
%define GHCB_BASE                     (FixedPcdGet32 (PcdOvmfSecGhcbBase))\r
%define GHCB_SIZE                     (FixedPcdGet32 (PcdOvmfSecGhcbSize))\r
%define SEV_ES_WORK_AREA              (FixedPcdGet32 (PcdSevEsWorkAreaBase))\r
%define SEV_ES_WORK_AREA_SIZE         25\r
%define SEV_ES_WORK_AREA_STATUS_MSR   (FixedPcdGet32 (PcdSevEsWorkAreaBase))\r
%define SEV_ES_WORK_AREA_RDRAND       (FixedPcdGet32 (PcdSevEsWorkAreaBase) + 8)\r
%define SEV_ES_WORK_AREA_ENC_MASK     (FixedPcdGet32 (PcdSevEsWorkAreaBase) + 16)\r
%define SEV_ES_WORK_AREA_RECEIVED_VC  (FixedPcdGet32 (PcdSevEsWorkAreaBase) + 24)\r
%define SEV_ES_VC_TOP_OF_STACK        (FixedPcdGet32 (PcdOvmfSecPeiTempRamBase) + FixedPcdGet32 (PcdOvmfSecPeiTempRamSize))\r
%define SEV_SNP_SECRETS_BASE          (FixedPcdGet32 (PcdOvmfSnpSecretsBase))\r
%define SEV_SNP_SECRETS_SIZE          (FixedPcdGet32 (PcdOvmfSnpSecretsSize))\r
%define CPUID_BASE                    (FixedPcdGet32 (PcdOvmfCpuidBase))\r
%define CPUID_SIZE                    (FixedPcdGet32 (PcdOvmfCpuidSize))\r
%define SNP_SEC_MEM_BASE_DESC_1       (FixedPcdGet32 (PcdOvmfSecPageTablesBase))\r
%define SNP_SEC_MEM_SIZE_DESC_1       (FixedPcdGet32 (PcdOvmfSecGhcbBase) - SNP_SEC_MEM_BASE_DESC_1)\r
;\r
; The PcdOvmfSecGhcbBase reserves two GHCB pages. The first page is used\r
; as GHCB shared page and second is used for bookkeeping to support the\r
; nested GHCB in SEC phase. The bookkeeping page is mapped private. The VMM\r
; does not need to validate the shared page but it need to validate the\r
; bookkeeping page.\r
;\r
%define SNP_SEC_MEM_BASE_DESC_2       (GHCB_BASE + 0x1000)\r
%define SNP_SEC_MEM_SIZE_DESC_2       (SEV_SNP_SECRETS_BASE - SNP_SEC_MEM_BASE_DESC_2)\r
%define SNP_SEC_MEM_BASE_DESC_3       (CPUID_BASE + CPUID_SIZE)\r
%define SNP_SEC_MEM_SIZE_DESC_3       (FixedPcdGet32 (PcdOvmfPeiMemFvBase) - SNP_SEC_MEM_BASE_DESC_3)\r
\r
%ifdef ARCH_X64\r
  #include <AutoGen.h>\r
\r
  %if (FixedPcdGet32 (PcdOvmfSecPageTablesSize) != 0x6000)\r
    %error "This implementation inherently depends on PcdOvmfSecPageTablesSize"\r
  %endif\r
\r
  %if (FixedPcdGet32 (PcdOvmfSecGhcbPageTableSize) != 0x1000)\r
    %error "This implementation inherently depends on PcdOvmfSecGhcbPageTableSize"\r
  %endif\r
\r
  %if (FixedPcdGet32 (PcdOvmfSecGhcbSize) != 0x2000)\r
    %error "This implementation inherently depends on PcdOvmfSecGhcbSize"\r
  %endif\r
\r
  %if ((FixedPcdGet32 (PcdOvmfSecGhcbBase) >> 21) != \\r
       ((FixedPcdGet32 (PcdOvmfSecGhcbBase) + FixedPcdGet32 (PcdOvmfSecGhcbSize) - 1) >> 21))\r
    %error "This implementation inherently depends on PcdOvmfSecGhcbBase not straddling a 2MB boundary"\r
  %endif\r
\r
  %define TDX_BFV_RAW_DATA_OFFSET   FixedPcdGet32 (PcdBfvRawDataOffset)\r
  %define TDX_BFV_RAW_DATA_SIZE     FixedPcdGet32 (PcdBfvRawDataSize)\r
  %define TDX_BFV_MEMORY_BASE       FixedPcdGet32 (PcdBfvBase)\r
  %define TDX_BFV_MEMORY_SIZE       FixedPcdGet32 (PcdBfvRawDataSize)\r
\r
  %define TDX_CFV_RAW_DATA_OFFSET   FixedPcdGet32 (PcdCfvRawDataOffset)\r
  %define TDX_CFV_RAW_DATA_SIZE     FixedPcdGet32 (PcdCfvRawDataSize)\r
  %define TDX_CFV_MEMORY_BASE       FixedPcdGet32 (PcdCfvBase),\r
  %define TDX_CFV_MEMORY_SIZE       FixedPcdGet32 (PcdCfvRawDataSize),\r
\r
  %define TDX_HEAP_STACK_BASE       FixedPcdGet32 (PcdOvmfSecPeiTempRamBase)\r
  %define TDX_HEAP_STACK_SIZE       FixedPcdGet32 (PcdOvmfSecPeiTempRamSize)\r
\r
  %define TDX_HOB_MEMORY_BASE       FixedPcdGet32 (PcdOvmfSecGhcbBase)\r
  %define TDX_HOB_MEMORY_SIZE       FixedPcdGet32 (PcdOvmfSecGhcbSize)\r
\r
  %define TDX_INIT_MEMORY_BASE      FixedPcdGet32 (PcdOvmfWorkAreaBase)\r
  %define TDX_INIT_MEMORY_SIZE      (FixedPcdGet32 (PcdOvmfWorkAreaSize) + FixedPcdGet32 (PcdOvmfSecGhcbBackupSize))\r
\r
  %define OVMF_PAGE_TABLE_BASE      FixedPcdGet32 (PcdOvmfSecPageTablesBase)\r
  %define OVMF_PAGE_TABLE_SIZE      FixedPcdGet32 (PcdOvmfSecPageTablesSize)\r
\r
  %define TDX_WORK_AREA_PGTBL_READY (FixedPcdGet32 (PcdOvmfWorkAreaBase) + 4)\r
  %define TDX_WORK_AREA_GPAW        (FixedPcdGet32 (PcdOvmfWorkAreaBase) + 8)\r
\r
  %include "X64/IntelTdxMetadata.asm"\r
  %include "Ia32/Flat32ToFlat64.asm"\r
  %include "Ia32/PageTables64.asm"\r
  %include "Ia32/IntelTdx.asm"\r
  %include "X64/OvmfSevMetadata.asm"\r
%endif\r
\r
%include "Ia32/AmdSev.asm"\r
\r
%include "Ia16/Real16ToFlat32.asm"\r
%include "Ia16/Init16.asm"\r
\r
%include "Main.asm"\r
\r
  %define SEV_ES_AP_RESET_IP  FixedPcdGet32 (PcdSevEsWorkAreaBase)\r
  %define SEV_LAUNCH_SECRET_BASE  FixedPcdGet32 (PcdSevLaunchSecretBase)\r
  %define SEV_LAUNCH_SECRET_SIZE  FixedPcdGet32 (PcdSevLaunchSecretSize)\r
  %define SEV_FW_HASH_BLOCK_BASE  FixedPcdGet32 (PcdQemuHashTableBase)\r
  %define SEV_FW_HASH_BLOCK_SIZE  FixedPcdGet32 (PcdQemuHashTableSize)\r
%include "Ia16/ResetVectorVtf0.asm"\r
\r
Commit	Line	Data
9b9fdbfa JJ	1	;------------------------------------------------------------------------------\r
	2	; @file\r
	3	; This file includes all other code files to assemble the reset vector code\r
	4	;\r
	5	; Copyright (c) 2008 - 2013, Intel Corporation. All rights reserved.<BR>\r
7cb96c47	6	; Copyright (c) 2020, Advanced Micro Devices, Inc. All rights reserved.<BR>\r
b26f0cf9	7	; SPDX-License-Identifier: BSD-2-Clause-Patent\r
9b9fdbfa JJ	8	;\r
	9	;------------------------------------------------------------------------------\r
	10	\r
	11	;\r
	12	; If neither ARCH_IA32 nor ARCH_X64 are defined, then try to include\r
	13	; Base.h to use the C pre-processor to determine the architecture.\r
	14	;\r
	15	%ifndef ARCH_IA32\r
	16	%ifndef ARCH_X64\r
	17	#include <Base.h>\r
	18	#if defined (MDE_CPU_IA32)\r
	19	%define ARCH_IA32\r
	20	#elif defined (MDE_CPU_X64)\r
	21	%define ARCH_X64\r
	22	#endif\r
	23	%endif\r
	24	%endif\r
	25	\r
	26	%ifdef ARCH_IA32\r
	27	%ifdef ARCH_X64\r
	28	%error "Only one of ARCH_IA32 or ARCH_X64 can be defined."\r
	29	%endif\r
	30	%elifdef ARCH_X64\r
	31	%else\r
	32	%error "Either ARCH_IA32 or ARCH_X64 must be defined."\r
	33	%endif\r
	34	\r
	35	%include "CommonMacros.inc"\r
	36	\r
	37	%include "PostCodes.inc"\r
	38	\r
	39	%ifdef DEBUG_PORT80\r
	40	%include "Port80Debug.asm"\r
	41	%elifdef DEBUG_SERIAL\r
	42	%include "SerialDebug.asm"\r
	43	%else\r
	44	%include "DebugDisabled.asm"\r
	45	%endif\r
	46	\r
	47	%include "Ia32/SearchForBfvBase.asm"\r
	48	%include "Ia32/SearchForSecEntry.asm"\r
	49	\r
a21a3438 TL	50	%define WORK_AREA_GUEST_TYPE (FixedPcdGet32 (PcdOvmfWorkAreaBase))\r
	51	%define PT_ADDR(Offset) (FixedPcdGet32 (PcdOvmfSecPageTablesBase) + (Offset))\r
	52	\r
	53	%define GHCB_PT_ADDR (FixedPcdGet32 (PcdOvmfSecGhcbPageTableBase))\r
	54	%define GHCB_BASE (FixedPcdGet32 (PcdOvmfSecGhcbBase))\r
	55	%define GHCB_SIZE (FixedPcdGet32 (PcdOvmfSecGhcbSize))\r
	56	%define SEV_ES_WORK_AREA (FixedPcdGet32 (PcdSevEsWorkAreaBase))\r
	57	%define SEV_ES_WORK_AREA_SIZE 25\r
	58	%define SEV_ES_WORK_AREA_STATUS_MSR (FixedPcdGet32 (PcdSevEsWorkAreaBase))\r
	59	%define SEV_ES_WORK_AREA_RDRAND (FixedPcdGet32 (PcdSevEsWorkAreaBase) + 8)\r
	60	%define SEV_ES_WORK_AREA_ENC_MASK (FixedPcdGet32 (PcdSevEsWorkAreaBase) + 16)\r
	61	%define SEV_ES_WORK_AREA_RECEIVED_VC (FixedPcdGet32 (PcdSevEsWorkAreaBase) + 24)\r
	62	%define SEV_ES_VC_TOP_OF_STACK (FixedPcdGet32 (PcdOvmfSecPeiTempRamBase) + FixedPcdGet32 (PcdOvmfSecPeiTempRamSize))\r
	63	%define SEV_SNP_SECRETS_BASE (FixedPcdGet32 (PcdOvmfSnpSecretsBase))\r
	64	%define SEV_SNP_SECRETS_SIZE (FixedPcdGet32 (PcdOvmfSnpSecretsSize))\r
	65	%define CPUID_BASE (FixedPcdGet32 (PcdOvmfCpuidBase))\r
	66	%define CPUID_SIZE (FixedPcdGet32 (PcdOvmfCpuidSize))\r
	67	%define SNP_SEC_MEM_BASE_DESC_1 (FixedPcdGet32 (PcdOvmfSecPageTablesBase))\r
	68	%define SNP_SEC_MEM_SIZE_DESC_1 (FixedPcdGet32 (PcdOvmfSecGhcbBase) - SNP_SEC_MEM_BASE_DESC_1)\r
	69	;\r
	70	; The PcdOvmfSecGhcbBase reserves two GHCB pages. The first page is used\r
	71	; as GHCB shared page and second is used for bookkeeping to support the\r
	72	; nested GHCB in SEC phase. The bookkeeping page is mapped private. The VMM\r
	73	; does not need to validate the shared page but it need to validate the\r
	74	; bookkeeping page.\r
	75	;\r
	76	%define SNP_SEC_MEM_BASE_DESC_2 (GHCB_BASE + 0x1000)\r
	77	%define SNP_SEC_MEM_SIZE_DESC_2 (SEV_SNP_SECRETS_BASE - SNP_SEC_MEM_BASE_DESC_2)\r
	78	%define SNP_SEC_MEM_BASE_DESC_3 (CPUID_BASE + CPUID_SIZE)\r
	79	%define SNP_SEC_MEM_SIZE_DESC_3 (FixedPcdGet32 (PcdOvmfPeiMemFvBase) - SNP_SEC_MEM_BASE_DESC_3)\r
11a4af85	80	\r
9b9fdbfa	81	%ifdef ARCH_X64\r
73d66c58 MH	82	#include <AutoGen.h>\r
	83	\r
	84	%if (FixedPcdGet32 (PcdOvmfSecPageTablesSize) != 0x6000)\r
	85	%error "This implementation inherently depends on PcdOvmfSecPageTablesSize"\r
	86	%endif\r
	87	\r
6995a1b7 TL	88	%if (FixedPcdGet32 (PcdOvmfSecGhcbPageTableSize) != 0x1000)\r
	89	%error "This implementation inherently depends on PcdOvmfSecGhcbPageTableSize"\r
	90	%endif\r
	91	\r
	92	%if (FixedPcdGet32 (PcdOvmfSecGhcbSize) != 0x2000)\r
	93	%error "This implementation inherently depends on PcdOvmfSecGhcbSize"\r
	94	%endif\r
	95	\r
	96	%if ((FixedPcdGet32 (PcdOvmfSecGhcbBase) >> 21) != \\r
	97	((FixedPcdGet32 (PcdOvmfSecGhcbBase) + FixedPcdGet32 (PcdOvmfSecGhcbSize) - 1) >> 21))\r
	98	%error "This implementation inherently depends on PcdOvmfSecGhcbBase not straddling a 2MB boundary"\r
	99	%endif\r
	100	\r
c9ec74a1 MX	101	%define TDX_BFV_RAW_DATA_OFFSET FixedPcdGet32 (PcdBfvRawDataOffset)\r
	102	%define TDX_BFV_RAW_DATA_SIZE FixedPcdGet32 (PcdBfvRawDataSize)\r
	103	%define TDX_BFV_MEMORY_BASE FixedPcdGet32 (PcdBfvBase)\r
	104	%define TDX_BFV_MEMORY_SIZE FixedPcdGet32 (PcdBfvRawDataSize)\r
	105	\r
	106	%define TDX_CFV_RAW_DATA_OFFSET FixedPcdGet32 (PcdCfvRawDataOffset)\r
	107	%define TDX_CFV_RAW_DATA_SIZE FixedPcdGet32 (PcdCfvRawDataSize)\r
	108	%define TDX_CFV_MEMORY_BASE FixedPcdGet32 (PcdCfvBase),\r
	109	%define TDX_CFV_MEMORY_SIZE FixedPcdGet32 (PcdCfvRawDataSize),\r
	110	\r
	111	%define TDX_HEAP_STACK_BASE FixedPcdGet32 (PcdOvmfSecPeiTempRamBase)\r
	112	%define TDX_HEAP_STACK_SIZE FixedPcdGet32 (PcdOvmfSecPeiTempRamSize)\r
	113	\r
	114	%define TDX_HOB_MEMORY_BASE FixedPcdGet32 (PcdOvmfSecGhcbBase)\r
	115	%define TDX_HOB_MEMORY_SIZE FixedPcdGet32 (PcdOvmfSecGhcbSize)\r
	116	\r
	117	%define TDX_INIT_MEMORY_BASE FixedPcdGet32 (PcdOvmfWorkAreaBase)\r
	118	%define TDX_INIT_MEMORY_SIZE (FixedPcdGet32 (PcdOvmfWorkAreaSize) + FixedPcdGet32 (PcdOvmfSecGhcbBackupSize))\r
	119	\r
	120	%define OVMF_PAGE_TABLE_BASE FixedPcdGet32 (PcdOvmfSecPageTablesBase)\r
	121	%define OVMF_PAGE_TABLE_SIZE FixedPcdGet32 (PcdOvmfSecPageTablesSize)\r
	122	\r
	123	%define TDX_WORK_AREA_PGTBL_READY (FixedPcdGet32 (PcdOvmfWorkAreaBase) + 4)\r
	124	%define TDX_WORK_AREA_GPAW (FixedPcdGet32 (PcdOvmfWorkAreaBase) + 8)\r
	125	\r
a21a3438 TL	126	%include "X64/IntelTdxMetadata.asm"\r
	127	%include "Ia32/Flat32ToFlat64.asm"\r
	128	%include "Ia32/PageTables64.asm"\r
	129	%include "Ia32/IntelTdx.asm"\r
	130	%include "X64/OvmfSevMetadata.asm"\r
9b9fdbfa JJ	131	%endif\r
9b9fdbfa JJ	132	\r
a21a3438 TL	133	%include "Ia32/AmdSev.asm"\r
a21a3438 TL	134	\r
9b9fdbfa JJ	135	%include "Ia16/Real16ToFlat32.asm"\r
	136	%include "Ia16/Init16.asm"\r
	137	\r
	138	%include "Main.asm"\r
	139	\r
30937f2f	140	%define SEV_ES_AP_RESET_IP FixedPcdGet32 (PcdSevEsWorkAreaBase)\r
224752ec JB	141	%define SEV_LAUNCH_SECRET_BASE FixedPcdGet32 (PcdSevLaunchSecretBase)\r
224752ec JB	142	%define SEV_LAUNCH_SECRET_SIZE FixedPcdGet32 (PcdSevLaunchSecretSize)\r
0deeab36 JB	143	%define SEV_FW_HASH_BLOCK_BASE FixedPcdGet32 (PcdQemuHashTableBase)\r
0deeab36 JB	144	%define SEV_FW_HASH_BLOCK_SIZE FixedPcdGet32 (PcdQemuHashTableSize)\r
9b9fdbfa JJ	145	%include "Ia16/ResetVectorVtf0.asm"\r
9b9fdbfa JJ	146	\r