Synchronize the binary with build tools' source at r1630 which fix the issue that...

[mirror_edk2.git] / OvmfPkg / ResetVector / SerialDebug.asm

;------------------------------------------------------------------------------\r
;\r
; Copyright (c) 2008, Intel Corporation\r
; All rights reserved. This program and the accompanying materials\r
; are licensed and made available under the terms and conditions of the BSD License\r
; which accompanies this distribution.  The full text of the license may be found at\r
; http://opensource.org/licenses/bsd-license.php\r
;\r
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
;\r
; Module Name:\r
;\r
;   SerialDebug.asm\r
;\r
; Abstract:\r
;\r
;   Serial port support macros\r
;\r
;------------------------------------------------------------------------------\r
\r
BITS    16\r
\r
;//---------------------------------------------\r
;// UART Register Offsets\r
;//---------------------------------------------\r
%define BAUD_LOW_OFFSET         0x00\r
%define BAUD_HIGH_OFFSET        0x01\r
%define IER_OFFSET              0x01\r
%define LCR_SHADOW_OFFSET       0x01\r
%define FCR_SHADOW_OFFSET       0x02\r
%define IR_CONTROL_OFFSET       0x02\r
%define FCR_OFFSET              0x02\r
%define EIR_OFFSET              0x02\r
%define BSR_OFFSET              0x03\r
%define LCR_OFFSET              0x03\r
%define MCR_OFFSET              0x04\r
%define LSR_OFFSET              0x05\r
%define MSR_OFFSET              0x06\r
\r
;//---------------------------------------------\r
;// UART Register Bit Defines\r
;//---------------------------------------------\r
%define LSR_TXRDY               0x20\r
%define LSR_RXDA                0x01\r
%define DLAB                    0x01\r
\r
; UINT16  gComBase = 0x3f8;\r
; UINTN   gBps = 115200;\r
; UINT8   gData = 8;\r
; UINT8   gStop = 1;\r
; UINT8   gParity = 0;\r
; UINT8   gBreakSet = 0;\r
\r
%define DEFAULT_COM_BASE 0x3f8\r
%define DEFAULT_BPS 115200\r
%define DEFAULT_DATA 8\r
%define DEFAULT_STOP 1\r
%define DEFAULT_PARITY 0\r
%define DEFAULT_BREAK_SET 0\r
\r
%define SERIAL_DEFAULT_LCR ( \\r
     (DEFAULT_BREAK_SET << 6) | \\r
     (DEFAULT_PARITY << 3) | \\r
     (DEFAULT_STOP << 2) | \\r
     (DEFAULT_DATA - 5) \\r
    )\r
\r
%define SERIAL_PORT_IO_BASE_ADDRESS DEFAULT_COM_BASE\r
\r
%macro  inFromSerialPort 1\r
    mov     dx, (SERIAL_PORT_IO_BASE_ADDRESS + %1)\r
    in      al, dx\r
%endmacro\r
\r
%macro  waitForSerialTxReady 0\r
\r
%%waitingForTx:\r
    inFromSerialPort LSR_OFFSET\r
    test    al, LSR_TXRDY\r
    jz      %%waitingForTx\r
\r
%endmacro\r
\r
%macro  outToSerialPort 2\r
    mov     dx, (SERIAL_PORT_IO_BASE_ADDRESS + %1)\r
    mov     al, %2\r
    out     dx, al\r
%endmacro\r
\r
%macro  writeToSerialPort 1\r
    waitForSerialTxReady\r
    outToSerialPort 0, %1\r
%endmacro\r
\r
real16InitSerialPort:\r
    ;\r
    ; Set communications format\r
    ;\r
    outToSerialPort LCR_OFFSET, ((DLAB << 7) | SERIAL_DEFAULT_LCR)\r
\r
    ;\r
    ; Configure baud rate\r
    ;\r
    outToSerialPort BAUD_HIGH_OFFSET, ((115200 / DEFAULT_BPS) >> 8)\r
    outToSerialPort BAUD_LOW_OFFSET, ((115200 / DEFAULT_BPS) & 0xff)\r
\r
    ;\r
    ; Switch back to bank 0\r
    ;\r
    outToSerialPort LCR_OFFSET, SERIAL_DEFAULT_LCR\r
\r
    jmp     real16SerialPortInitReturn\r
\r