]>
Commit | Line | Data |
---|---|---|
90b8b0ec | 1 | /** @file\r |
2 | Driver implementing the Tiano Legacy 8259 Protocol\r | |
1166d068 | 3 | \r |
47ca9c95 | 4 | Copyright (c) 2005 - 2009, Intel Corporation. All rights reserved.<BR>\r |
5 | This program and the accompanying materials\r | |
6 | are licensed and made available under the terms and conditions of the BSD License\r | |
7 | which accompanies this distribution. The full text of the license may be found at\r | |
8 | http://opensource.org/licenses/bsd-license.php.\r | |
9 | \r | |
10 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
11 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
1166d068 | 12 | \r |
1166d068 | 13 | **/\r |
14 | \r | |
15 | #ifndef _8259_H__\r | |
16 | #define _8259_H__\r | |
17 | \r | |
18 | #include <FrameworkDxe.h>\r | |
19 | \r | |
1166d068 | 20 | #include <Protocol/Legacy8259.h>\r |
ae6a37f0 | 21 | #include <Protocol/PciIo.h>\r |
1166d068 | 22 | \r |
23 | #include <Library/UefiBootServicesTableLib.h>\r | |
24 | #include <Library/DebugLib.h>\r | |
8be701c3 | 25 | #include <Library/IoLib.h>\r |
ae6a37f0 | 26 | #include <Library/BaseLib.h>\r |
0547cf4b | 27 | #include <Library/PcdLib.h>\r |
1166d068 | 28 | \r |
6844f188 | 29 | #include <IndustryStandard/Pci.h>\r |
47ca9c95 | 30 | \r |
1166d068 | 31 | // 8259 Hardware definitions\r |
47ca9c95 | 32 | \r |
1166d068 | 33 | #define LEGACY_MODE_BASE_VECTOR_MASTER 0x08\r |
34 | #define LEGACY_MODE_BASE_VECTOR_SLAVE 0x70\r | |
35 | \r | |
36 | #define PROTECTED_MODE_BASE_VECTOR_MASTER 0x68\r | |
37 | #define PROTECTED_MODE_BASE_VECTOR_SLAVE 0x70\r | |
38 | \r | |
39 | #define LEGACY_8259_CONTROL_REGISTER_MASTER 0x20\r | |
40 | #define LEGACY_8259_MASK_REGISTER_MASTER 0x21\r | |
41 | #define LEGACY_8259_CONTROL_REGISTER_SLAVE 0xA0\r | |
42 | #define LEGACY_8259_MASK_REGISTER_SLAVE 0xA1\r | |
43 | #define LEGACY_8259_EDGE_LEVEL_TRIGGERED_REGISTER_MASTER 0x4D0\r | |
44 | #define LEGACY_8259_EDGE_LEVEL_TRIGGERED_REGISTER_SLAVE 0x4D1\r | |
45 | \r | |
46 | #define LEGACY_8259_EOI 0x20\r | |
47 | \r | |
1166d068 | 48 | // Protocol Function Prototypes\r |
47ca9c95 | 49 | \r |
24115e44 ED |
50 | /**\r |
51 | Sets the base address for the 8259 master and slave PICs.\r | |
47ca9c95 | 52 | \r |
24115e44 ED |
53 | @param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.\r |
54 | @param[in] MasterBase Interrupt vectors for IRQ0-IRQ7.\r | |
55 | @param[in] SlaveBase Interrupt vectors for IRQ8-IRQ15.\r | |
56 | \r | |
57 | @retval EFI_SUCCESS The 8259 PIC was programmed successfully.\r | |
58 | @retval EFI_DEVICE_ERROR There was an error while writing to the 8259 PIC.\r | |
59 | \r | |
60 | **/\r | |
1166d068 | 61 | EFI_STATUS\r |
62 | EFIAPI\r | |
63 | Interrupt8259SetVectorBase (\r | |
90b8b0ec | 64 | IN EFI_LEGACY_8259_PROTOCOL *This,\r |
65 | IN UINT8 MasterBase,\r | |
66 | IN UINT8 SlaveBase\r | |
67 | );\r | |
1166d068 | 68 | \r |
24115e44 ED |
69 | /**\r |
70 | Gets the current 16-bit real mode and 32-bit protected-mode IRQ masks.\r | |
71 | \r | |
72 | @param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.\r | |
73 | @param[out] LegacyMask 16-bit mode interrupt mask for IRQ0-IRQ15.\r | |
74 | @param[out] LegacyEdgeLevel 16-bit mode edge/level mask for IRQ-IRQ15.\r | |
75 | @param[out] ProtectedMask 32-bit mode interrupt mask for IRQ0-IRQ15.\r | |
76 | @param[out] ProtectedEdgeLevel 32-bit mode edge/level mask for IRQ0-IRQ15.\r | |
77 | \r | |
78 | @retval EFI_SUCCESS The 8259 PIC was programmed successfully.\r | |
79 | @retval EFI_DEVICE_ERROR There was an error while reading the 8259 PIC.\r | |
80 | \r | |
81 | **/\r | |
1166d068 | 82 | EFI_STATUS\r |
83 | EFIAPI\r | |
84 | Interrupt8259GetMask (\r | |
90b8b0ec | 85 | IN EFI_LEGACY_8259_PROTOCOL *This,\r |
1166d068 | 86 | OUT UINT16 *LegacyMask, OPTIONAL\r |
87 | OUT UINT16 *LegacyEdgeLevel, OPTIONAL\r | |
88 | OUT UINT16 *ProtectedMask, OPTIONAL\r | |
89 | OUT UINT16 *ProtectedEdgeLevel OPTIONAL\r | |
90b8b0ec | 90 | );\r |
1166d068 | 91 | \r |
24115e44 ED |
92 | /**\r |
93 | Sets the current 16-bit real mode and 32-bit protected-mode IRQ masks.\r | |
94 | \r | |
95 | @param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.\r | |
96 | @param[in] LegacyMask 16-bit mode interrupt mask for IRQ0-IRQ15.\r | |
97 | @param[in] LegacyEdgeLevel 16-bit mode edge/level mask for IRQ-IRQ15.\r | |
98 | @param[in] ProtectedMask 32-bit mode interrupt mask for IRQ0-IRQ15.\r | |
99 | @param[in] ProtectedEdgeLevel 32-bit mode edge/level mask for IRQ0-IRQ15.\r | |
100 | \r | |
101 | @retval EFI_SUCCESS The 8259 PIC was programmed successfully.\r | |
102 | @retval EFI_DEVICE_ERROR There was an error while writing the 8259 PIC.\r | |
103 | \r | |
104 | **/\r | |
1166d068 | 105 | EFI_STATUS\r |
106 | EFIAPI\r | |
107 | Interrupt8259SetMask (\r | |
90b8b0ec | 108 | IN EFI_LEGACY_8259_PROTOCOL *This,\r |
109 | IN UINT16 *LegacyMask, OPTIONAL\r | |
110 | IN UINT16 *LegacyEdgeLevel, OPTIONAL\r | |
111 | IN UINT16 *ProtectedMask, OPTIONAL\r | |
112 | IN UINT16 *ProtectedEdgeLevel OPTIONAL\r | |
113 | );\r | |
1166d068 | 114 | \r |
24115e44 ED |
115 | /**\r |
116 | Sets the mode of the PICs.\r | |
117 | \r | |
118 | @param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.\r | |
119 | @param[in] Mode 16-bit real or 32-bit protected mode.\r | |
120 | @param[in] Mask The value with which to set the interrupt mask.\r | |
121 | @param[in] EdgeLevel The value with which to set the edge/level mask.\r | |
122 | \r | |
123 | @retval EFI_SUCCESS The mode was set successfully.\r | |
124 | @retval EFI_INVALID_PARAMETER The mode was not set.\r | |
125 | \r | |
126 | **/\r | |
1166d068 | 127 | EFI_STATUS\r |
128 | EFIAPI\r | |
129 | Interrupt8259SetMode (\r | |
90b8b0ec | 130 | IN EFI_LEGACY_8259_PROTOCOL *This,\r |
131 | IN EFI_8259_MODE Mode,\r | |
132 | IN UINT16 *Mask, OPTIONAL\r | |
133 | IN UINT16 *EdgeLevel OPTIONAL\r | |
134 | );\r | |
1166d068 | 135 | \r |
24115e44 ED |
136 | /**\r |
137 | Translates the IRQ into a vector.\r | |
138 | \r | |
139 | @param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.\r | |
140 | @param[in] Irq IRQ0-IRQ15.\r | |
141 | @param[out] Vector The vector that is assigned to the IRQ.\r | |
142 | \r | |
143 | @retval EFI_SUCCESS The Vector that matches Irq was returned.\r | |
144 | @retval EFI_INVALID_PARAMETER Irq is not valid.\r | |
145 | \r | |
146 | **/\r | |
1166d068 | 147 | EFI_STATUS\r |
148 | EFIAPI\r | |
149 | Interrupt8259GetVector (\r | |
150 | IN EFI_LEGACY_8259_PROTOCOL *This,\r | |
151 | IN EFI_8259_IRQ Irq,\r | |
152 | OUT UINT8 *Vector\r | |
90b8b0ec | 153 | );\r |
1166d068 | 154 | \r |
24115e44 ED |
155 | /**\r |
156 | Enables the specified IRQ.\r | |
157 | \r | |
158 | @param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.\r | |
159 | @param[in] Irq IRQ0-IRQ15.\r | |
160 | @param[in] LevelTriggered 0 = Edge triggered; 1 = Level triggered.\r | |
161 | \r | |
162 | @retval EFI_SUCCESS The Irq was enabled on the 8259 PIC.\r | |
163 | @retval EFI_INVALID_PARAMETER The Irq is not valid.\r | |
164 | \r | |
165 | **/\r | |
1166d068 | 166 | EFI_STATUS\r |
167 | EFIAPI\r | |
168 | Interrupt8259EnableIrq (\r | |
90b8b0ec | 169 | IN EFI_LEGACY_8259_PROTOCOL *This,\r |
170 | IN EFI_8259_IRQ Irq,\r | |
171 | IN BOOLEAN LevelTriggered\r | |
172 | );\r | |
1166d068 | 173 | \r |
24115e44 ED |
174 | /**\r |
175 | Disables the specified IRQ.\r | |
176 | \r | |
177 | @param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.\r | |
178 | @param[in] Irq IRQ0-IRQ15.\r | |
179 | \r | |
180 | @retval EFI_SUCCESS The Irq was disabled on the 8259 PIC.\r | |
181 | @retval EFI_INVALID_PARAMETER The Irq is not valid.\r | |
182 | \r | |
183 | **/\r | |
1166d068 | 184 | EFI_STATUS\r |
185 | EFIAPI\r | |
186 | Interrupt8259DisableIrq (\r | |
90b8b0ec | 187 | IN EFI_LEGACY_8259_PROTOCOL *This,\r |
188 | IN EFI_8259_IRQ Irq\r | |
189 | );\r | |
1166d068 | 190 | \r |
24115e44 ED |
191 | /**\r |
192 | Reads the PCI configuration space to get the interrupt number that is assigned to the card.\r | |
193 | \r | |
194 | @param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.\r | |
195 | @param[in] PciHandle PCI function for which to return the vector.\r | |
196 | @param[out] Vector IRQ number that corresponds to the interrupt line.\r | |
197 | \r | |
198 | @retval EFI_SUCCESS The interrupt line value was read successfully.\r | |
199 | \r | |
200 | **/\r | |
1166d068 | 201 | EFI_STATUS\r |
202 | EFIAPI\r | |
203 | Interrupt8259GetInterruptLine (\r | |
204 | IN EFI_LEGACY_8259_PROTOCOL *This,\r | |
205 | IN EFI_HANDLE PciHandle,\r | |
206 | OUT UINT8 *Vector\r | |
90b8b0ec | 207 | );\r |
1166d068 | 208 | \r |
24115e44 ED |
209 | /**\r |
210 | Issues the End of Interrupt (EOI) commands to PICs.\r | |
211 | \r | |
212 | @param[in] This Indicates the EFI_LEGACY_8259_PROTOCOL instance.\r | |
213 | @param[in] Irq The interrupt for which to issue the EOI command.\r | |
214 | \r | |
215 | @retval EFI_SUCCESS The EOI command was issued.\r | |
216 | @retval EFI_INVALID_PARAMETER The Irq is not valid.\r | |
217 | \r | |
218 | **/\r | |
1166d068 | 219 | EFI_STATUS\r |
220 | EFIAPI\r | |
221 | Interrupt8259EndOfInterrupt (\r | |
222 | IN EFI_LEGACY_8259_PROTOCOL *This,\r | |
223 | IN EFI_8259_IRQ Irq\r | |
90b8b0ec | 224 | );\r |
1166d068 | 225 | \r |
226 | #endif\r |