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7b202cb0 | 1 | ## @file\r |
31ed75a9 | 2 | # Public definitions for PcAtChipset package.\r |
3 | #\r | |
4 | # This package is designed to public interfaces and implementation which follows\r | |
5 | # PcAt defacto standard.\r | |
6 | #\r | |
e8bce4b4 | 7 | # Copyright (c) 2009 - 2011, Intel Corporation. All rights reserved.<BR>\r |
31ed75a9 | 8 | #\r |
95d48e82 | 9 | # This program and the accompanying materials\r |
31ed75a9 | 10 | # are licensed and made available under the terms and conditions of the BSD License\r |
11 | # which accompanies this distribution. The full text of the license may be found at\r | |
12 | # http://opensource.org/licenses/bsd-license.php\r | |
13 | #\r | |
14 | # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
15 | # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
16 | #\r | |
7b202cb0 | 17 | ##\r |
31ed75a9 | 18 | \r |
19 | [Defines]\r | |
20 | DEC_SPECIFICATION = 0x00010005\r | |
21 | PACKAGE_NAME = PcAtChipsetPkg\r | |
22 | PACKAGE_GUID = B728689A-52D3-4b8c-AE89-2CE5514CC6DC\r | |
bae5fa3b | 23 | PACKAGE_VERSION = 0.2\r |
31ed75a9 | 24 | \r |
986d1dfb | 25 | [Includes]\r |
26 | Include\r | |
27 | \r | |
28 | [LibraryClasses]\r | |
29 | ## @libraryclass Provides functions to manage I/O APIC Redirection Table Entries.\r | |
30 | #\r | |
31 | IoApicLib|Include/Library/IoApicLib.h\r | |
32 | \r | |
53705ed1 | 33 | [Guids]\r |
34 | gPcAtChipsetPkgTokenSpaceGuid = { 0x326ae723, 0xae32, 0x4589, { 0x98, 0xb8, 0xca, 0xc2, 0x3c, 0xdc, 0xc1, 0xb1 } }\r | |
35 | \r | |
986d1dfb | 36 | [PcdsFeatureFlag]\r |
37 | ## If TRUE, then the HPET Timer will be configured to use MSI interrupts if the HPET timer supports them.\r | |
38 | # If FALSE, then the HPET Timer will be configued to use I/O APIC interrupts.\r | |
39 | gPcAtChipsetPkgTokenSpaceGuid.PcdHpetMsiEnable|TRUE|BOOLEAN|0x00001000\r | |
40 | \r | |
856f592c | 41 | [PcdsFixedAtBuild, PcdsDynamic, PcdsDynamicEx, PcdsPatchableInModule]\r |
31ed75a9 | 42 | ## Pcd8259LegacyModeMask defines the default mask value for platform. This value is determined\r |
43 | # 1) If platform only support pure UEFI, value should be set to 0xFFFF or 0xFFFE;\r | |
44 | # Because only clock interrupt is allowed in legacy mode in pure UEFI platform.\r | |
45 | # 2) If platform install CSM and use thunk module:\r | |
46 | # a) If thunk call provided by CSM binary requires some legacy interrupt support, the corresponding bit \r | |
47 | # should be opened as 0.\r | |
48 | # For example, if keyboard interfaces provided CSM binary use legacy keyboard interrupt in 8259 bit 2, then\r | |
49 | # the value should be set to 0xFFFC\r | |
50 | # b) If all thunk call provied by CSM binary do not require legacy interrupt support, value should be set\r | |
51 | # to 0xFFFF or 0xFFFE.\r | |
52 | #\r | |
31ed75a9 | 53 | # The default value of legacy mode mask could be changed by EFI_LEGACY_8259_PROTOCOL->SetMask(). But it is rarely\r |
54 | # need change it except some special cases such as when initializing the CSM binary, it should be set to 0xFFFF to \r | |
55 | # mask all legacy interrupt. Please restore the original legacy mask value if changing is made for these special case.\r | |
56 | #\r | |
1f44ee10 | 57 | gPcAtChipsetPkgTokenSpaceGuid.Pcd8259LegacyModeMask|0xFFFF|UINT16|0x00000001\r |
e356f999 | 58 | \r |
59 | ## Pcd8259LegacyModeEdgeLevel defines the default edge level for legacy mode's interrrupt controller.\r | |
1f44ee10 | 60 | gPcAtChipsetPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel|0x0000|UINT16|0x00000002\r |
e8bce4b4 | 61 | \r |
e8bce4b4 RN |
62 | ## This PCD specifies whether we need enable IsaAcpiCom1 device.\r |
63 | gPcAtChipsetPkgTokenSpaceGuid.PcdIsaAcpiCom1Enable|TRUE|BOOLEAN|0x00000003\r | |
64 | \r | |
65 | ## This PCD specifies whether we need enable IsaAcpiCom2 device.\r | |
66 | gPcAtChipsetPkgTokenSpaceGuid.PcdIsaAcpiCom2Enable|TRUE|BOOLEAN|0x00000004\r | |
67 | \r | |
68 | ## This PCD specifies whether we need enable IsaAcpiPs2Keyboard device.\r | |
69 | gPcAtChipsetPkgTokenSpaceGuid.PcdIsaAcpiPs2KeyboardEnable|TRUE|BOOLEAN|0x00000005\r | |
70 | \r | |
71 | ## This PCD specifies whether we need enable IsaAcpiPs2Mouse device.\r | |
72 | gPcAtChipsetPkgTokenSpaceGuid.PcdIsaAcpiPs2MouseEnable|TRUE|BOOLEAN|0x00000006\r | |
73 | \r | |
74 | ## This PCD specifies whether we need enable IsaAcpiFloppyA device.\r | |
75 | gPcAtChipsetPkgTokenSpaceGuid.PcdIsaAcpiFloppyAEnable|TRUE|BOOLEAN|0x00000007\r | |
76 | \r | |
77 | ## This PCD specifies whether we need enable IsaAcpiFloppyB device.\r | |
78 | gPcAtChipsetPkgTokenSpaceGuid.PcdIsaAcpiFloppyBEnable|TRUE|BOOLEAN|0x00000008\r | |
986d1dfb | 79 | \r |
80 | ## This PCD specifies the base address of the HPET timer.\r | |
81 | gPcAtChipsetPkgTokenSpaceGuid.PcdHpetBaseAddress|0xFED00000|UINT32|0x00000009\r | |
82 | \r | |
83 | ## This PCD specifies the Local APIC Interrupt Vector for the HPET Timer.\r | |
84 | gPcAtChipsetPkgTokenSpaceGuid.PcdHpetLocalApicVector|0x40|UINT8|0x0000000A\r | |
85 | \r | |
86 | ## This PCD specifies the defaut period of the HPET Timer in 100 ns units.\r | |
87 | # The default value of 100000 100 ns units is the same as 10 ms.\r | |
88 | gPcAtChipsetPkgTokenSpaceGuid.PcdHpetDefaultTimerPeriod|100000|UINT64|0x0000000B\r | |
89 | \r | |
90 | ## This PCD specifies the base address of the HPET timer.\r | |
91 | gPcAtChipsetPkgTokenSpaceGuid.PcdIoApicBaseAddress|0xFEC00000|UINT32|0x0000000C\r | |
bae5fa3b | 92 | \r |