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21b404d1 | 1 | /** @file\r |
21b404d1 | 2 | Provides the basic interfaces to abstract a PCI Host Bridge Resource Allocation\r |
3 | \r | |
cfdb6737 | 4 | Copyright (c) 2008 - 2013, Intel Corporation. All rights reserved.<BR>\r |
18c97f53 | 5 | This program and the accompanying materials are\r |
6 | licensed and made available under the terms and conditions of the BSD License\r | |
7 | which accompanies this distribution. The full text of the license may be found at\r | |
8 | http://opensource.org/licenses/bsd-license.php\r | |
9 | \r | |
10 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
11 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
21b404d1 | 12 | \r |
13 | **/ \r | |
14 | \r | |
15 | #include "PciHostBridge.h"\r | |
16 | \r | |
21b404d1 | 17 | //\r |
18 | // Hard code: Root Bridge Number within the host bridge\r | |
19 | // Root Bridge's attribute\r | |
20 | // Root Bridge's device path\r | |
21 | // Root Bridge's resource appeture\r | |
22 | //\r | |
23 | UINTN RootBridgeNumber[1] = { 1 };\r | |
24 | \r | |
ce68d3bc | 25 | UINT64 RootBridgeAttribute[1][1] = { { EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM } };\r |
21b404d1 | 26 | \r |
27 | EFI_PCI_ROOT_BRIDGE_DEVICE_PATH mEfiPciRootBridgeDevicePath[1][1] = {\r | |
28 | {\r | |
ce68d3bc SZ |
29 | {\r |
30 | {\r | |
31 | {\r | |
32 | ACPI_DEVICE_PATH,\r | |
33 | ACPI_DP,\r | |
34 | {\r | |
35 | (UINT8) (sizeof(ACPI_HID_DEVICE_PATH)),\r | |
36 | (UINT8) ((sizeof(ACPI_HID_DEVICE_PATH)) >> 8)\r | |
37 | }\r | |
38 | },\r | |
39 | EISA_PNP_ID(0x0A03),\r | |
40 | 0\r | |
41 | },\r | |
42 | \r | |
43 | {\r | |
44 | END_DEVICE_PATH_TYPE,\r | |
45 | END_ENTIRE_DEVICE_PATH_SUBTYPE,\r | |
46 | {\r | |
47 | END_DEVICE_PATH_LENGTH,\r | |
48 | 0\r | |
49 | }\r | |
50 | }\r | |
51 | }\r | |
21b404d1 | 52 | }\r |
53 | };\r | |
54 | \r | |
55 | PCI_ROOT_BRIDGE_RESOURCE_APPETURE mResAppeture[1][1] = {\r | |
ce68d3bc | 56 | {{0, 0xff, 0x80000000, 0xffffffff, 0, 0xffff}}\r |
21b404d1 | 57 | };\r |
58 | \r | |
59 | EFI_HANDLE mDriverImageHandle;\r | |
60 | \r | |
61 | PCI_HOST_BRIDGE_INSTANCE mPciHostBridgeInstanceTemplate = {\r | |
62 | PCI_HOST_BRIDGE_SIGNATURE, // Signature\r | |
63 | NULL, // HostBridgeHandle\r | |
64 | 0, // RootBridgeNumber\r | |
65 | {NULL, NULL}, // Head\r | |
66 | FALSE, // ResourceSubiteed\r | |
67 | TRUE, // CanRestarted\r | |
68 | {\r | |
69 | NotifyPhase,\r | |
70 | GetNextRootBridge,\r | |
71 | GetAttributes,\r | |
72 | StartBusEnumeration,\r | |
73 | SetBusNumbers,\r | |
74 | SubmitResources,\r | |
75 | GetProposedResources,\r | |
76 | PreprocessController\r | |
77 | }\r | |
78 | };\r | |
79 | \r | |
80 | //\r | |
81 | // Implementation\r | |
82 | //\r | |
24115e44 | 83 | \r |
18c97f53 | 84 | /**\r |
85 | Entry point of this driver\r | |
86 | \r | |
87 | @param ImageHandle Handle of driver image\r | |
88 | @param SystemTable Point to EFI_SYSTEM_TABLE\r | |
89 | \r | |
90 | @retval EFI_OUT_OF_RESOURCES Can not allocate memory resource\r | |
91 | @retval EFI_DEVICE_ERROR Can not install the protocol instance\r | |
92 | @retval EFI_SUCCESS Success to initialize the Pci host bridge.\r | |
93 | **/\r | |
21b404d1 | 94 | EFI_STATUS\r |
95 | EFIAPI\r | |
96 | InitializePciHostBridge (\r | |
97 | IN EFI_HANDLE ImageHandle,\r | |
98 | IN EFI_SYSTEM_TABLE *SystemTable\r | |
99 | )\r | |
21b404d1 | 100 | {\r |
101 | EFI_STATUS Status;\r | |
102 | UINTN Loop1;\r | |
103 | UINTN Loop2;\r | |
104 | PCI_HOST_BRIDGE_INSTANCE *HostBridge;\r | |
105 | PCI_ROOT_BRIDGE_INSTANCE *PrivateData;\r | |
21b404d1 | 106 | \r |
107 | mDriverImageHandle = ImageHandle;\r | |
108 | \r | |
109 | //\r | |
110 | // Create Host Bridge Device Handle\r | |
111 | //\r | |
112 | for (Loop1 = 0; Loop1 < HOST_BRIDGE_NUMBER; Loop1++) {\r | |
113 | HostBridge = AllocateCopyPool (sizeof(PCI_HOST_BRIDGE_INSTANCE), &mPciHostBridgeInstanceTemplate);\r | |
114 | if (HostBridge == NULL) {\r | |
115 | return EFI_OUT_OF_RESOURCES;\r | |
116 | }\r | |
117 | \r | |
118 | HostBridge->RootBridgeNumber = RootBridgeNumber[Loop1];\r | |
119 | InitializeListHead (&HostBridge->Head);\r | |
120 | \r | |
121 | Status = gBS->InstallMultipleProtocolInterfaces (\r | |
122 | &HostBridge->HostBridgeHandle, \r | |
123 | &gEfiPciHostBridgeResourceAllocationProtocolGuid, &HostBridge->ResAlloc,\r | |
124 | NULL\r | |
125 | );\r | |
126 | if (EFI_ERROR (Status)) {\r | |
127 | FreePool (HostBridge);\r | |
128 | return EFI_DEVICE_ERROR;\r | |
129 | }\r | |
130 | \r | |
131 | //\r | |
132 | // Create Root Bridge Device Handle in this Host Bridge\r | |
133 | //\r | |
134 | \r | |
135 | for (Loop2 = 0; Loop2 < HostBridge->RootBridgeNumber; Loop2++) {\r | |
136 | PrivateData = AllocateZeroPool (sizeof(PCI_ROOT_BRIDGE_INSTANCE));\r | |
137 | if (PrivateData == NULL) {\r | |
138 | return EFI_OUT_OF_RESOURCES;\r | |
139 | }\r | |
140 | \r | |
141 | PrivateData->Signature = PCI_ROOT_BRIDGE_SIGNATURE;\r | |
142 | PrivateData->DevicePath = (EFI_DEVICE_PATH_PROTOCOL *)&mEfiPciRootBridgeDevicePath[Loop1][Loop2];\r | |
143 | \r | |
144 | RootBridgeConstructor (\r | |
145 | &PrivateData->Io, \r | |
146 | HostBridge->HostBridgeHandle, \r | |
147 | RootBridgeAttribute[Loop1][Loop2], \r | |
148 | &mResAppeture[Loop1][Loop2]\r | |
149 | );\r | |
150 | \r | |
151 | Status = gBS->InstallMultipleProtocolInterfaces(\r | |
152 | &PrivateData->Handle, \r | |
153 | &gEfiDevicePathProtocolGuid, PrivateData->DevicePath,\r | |
154 | &gEfiPciRootBridgeIoProtocolGuid, &PrivateData->Io,\r | |
155 | NULL\r | |
156 | );\r | |
157 | if (EFI_ERROR (Status)) {\r | |
158 | FreePool(PrivateData);\r | |
159 | return EFI_DEVICE_ERROR;\r | |
160 | }\r | |
161 | \r | |
162 | InsertTailList (&HostBridge->Head, &PrivateData->Link);\r | |
163 | }\r | |
164 | } \r | |
165 | \r | |
21b404d1 | 166 | return EFI_SUCCESS;\r |
167 | }\r | |
168 | \r | |
169 | \r | |
18c97f53 | 170 | /**\r |
171 | These are the notifications from the PCI bus driver that it is about to enter a certain\r | |
172 | phase of the PCI enumeration process.\r | |
173 | \r | |
174 | This member function can be used to notify the host bridge driver to perform specific actions,\r | |
175 | including any chipset-specific initialization, so that the chipset is ready to enter the next phase.\r | |
176 | Eight notification points are defined at this time. See belows:\r | |
177 | EfiPciHostBridgeBeginEnumeration Resets the host bridge PCI apertures and internal data\r | |
178 | structures. The PCI enumerator should issue this notification\r | |
179 | before starting a fresh enumeration process. Enumeration cannot\r | |
180 | be restarted after sending any other notification such as\r | |
181 | EfiPciHostBridgeBeginBusAllocation.\r | |
182 | EfiPciHostBridgeBeginBusAllocation The bus allocation phase is about to begin. No specific action is\r | |
183 | required here. This notification can be used to perform any\r | |
184 | chipset-specific programming.\r | |
185 | EfiPciHostBridgeEndBusAllocation The bus allocation and bus programming phase is complete. No\r | |
186 | specific action is required here. This notification can be used to\r | |
187 | perform any chipset-specific programming.\r | |
188 | EfiPciHostBridgeBeginResourceAllocation\r | |
189 | The resource allocation phase is about to begin. No specific\r | |
190 | action is required here. This notification can be used to perform\r | |
191 | any chipset-specific programming.\r | |
192 | EfiPciHostBridgeAllocateResources Allocates resources per previously submitted requests for all the PCI\r | |
193 | root bridges. These resource settings are returned on the next call to\r | |
194 | GetProposedResources(). Before calling NotifyPhase() with a Phase of\r | |
195 | EfiPciHostBridgeAllocateResource, the PCI bus enumerator is responsible\r | |
196 | for gathering I/O and memory requests for\r | |
197 | all the PCI root bridges and submitting these requests using\r | |
198 | SubmitResources(). This function pads the resource amount\r | |
199 | to suit the root bridge hardware, takes care of dependencies between\r | |
200 | the PCI root bridges, and calls the Global Coherency Domain (GCD)\r | |
201 | with the allocation request. In the case of padding, the allocated range\r | |
202 | could be bigger than what was requested.\r | |
203 | EfiPciHostBridgeSetResources Programs the host bridge hardware to decode previously allocated\r | |
204 | resources (proposed resources) for all the PCI root bridges. After the\r | |
205 | hardware is programmed, reassigning resources will not be supported.\r | |
206 | The bus settings are not affected.\r | |
207 | EfiPciHostBridgeFreeResources Deallocates resources that were previously allocated for all the PCI\r | |
208 | root bridges and resets the I/O and memory apertures to their initial\r | |
209 | state. The bus settings are not affected. If the request to allocate\r | |
210 | resources fails, the PCI enumerator can use this notification to\r | |
211 | deallocate previous resources, adjust the requests, and retry\r | |
212 | allocation.\r | |
213 | EfiPciHostBridgeEndResourceAllocation The resource allocation phase is completed. No specific action is\r | |
214 | required here. This notification can be used to perform any chipsetspecific\r | |
215 | programming.\r | |
216 | \r | |
24115e44 | 217 | @param[in] This The instance pointer of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL\r |
18c97f53 | 218 | @param[in] Phase The phase during enumeration\r |
219 | \r | |
220 | @retval EFI_NOT_READY This phase cannot be entered at this time. For example, this error\r | |
221 | is valid for a Phase of EfiPciHostBridgeAllocateResources if\r | |
222 | SubmitResources() has not been called for one or more\r | |
223 | PCI root bridges before this call\r | |
224 | @retval EFI_DEVICE_ERROR Programming failed due to a hardware error. This error is valid\r | |
225 | for a Phase of EfiPciHostBridgeSetResources.\r | |
226 | @retval EFI_INVALID_PARAMETER Invalid phase parameter\r | |
227 | @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.\r | |
228 | This error is valid for a Phase of EfiPciHostBridgeAllocateResources if the\r | |
229 | previously submitted resource requests cannot be fulfilled or\r | |
230 | were only partially fulfilled.\r | |
231 | @retval EFI_SUCCESS The notification was accepted without any errors.\r | |
232 | \r | |
233 | **/\r | |
21b404d1 | 234 | EFI_STATUS\r |
235 | EFIAPI\r | |
236 | NotifyPhase(\r | |
237 | IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,\r | |
238 | IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE Phase\r | |
239 | )\r | |
21b404d1 | 240 | {\r |
241 | PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;\r | |
242 | PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;\r | |
243 | PCI_RESOURCE_TYPE Index;\r | |
244 | LIST_ENTRY *List;\r | |
245 | EFI_PHYSICAL_ADDRESS BaseAddress;\r | |
246 | UINT64 AddrLen;\r | |
247 | UINTN BitsOfAlignment;\r | |
248 | EFI_STATUS Status;\r | |
249 | EFI_STATUS ReturnStatus;\r | |
250 | \r | |
251 | HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);\r | |
252 | \r | |
253 | switch (Phase) {\r | |
254 | \r | |
255 | case EfiPciHostBridgeBeginEnumeration:\r | |
256 | if (HostBridgeInstance->CanRestarted) {\r | |
257 | //\r | |
258 | // Reset the Each Root Bridge \r | |
259 | //\r | |
260 | List = HostBridgeInstance->Head.ForwardLink;\r | |
261 | \r | |
262 | while (List != &HostBridgeInstance->Head) {\r | |
263 | RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);\r | |
264 | for (Index = TypeIo; Index < TypeMax; Index++) {\r | |
265 | RootBridgeInstance->ResAllocNode[Index].Type = Index;\r | |
266 | RootBridgeInstance->ResAllocNode[Index].Base = 0;\r | |
267 | RootBridgeInstance->ResAllocNode[Index].Length = 0;\r | |
268 | RootBridgeInstance->ResAllocNode[Index].Status = ResNone;\r | |
269 | }\r | |
270 | \r | |
271 | List = List->ForwardLink;\r | |
272 | }\r | |
273 | \r | |
274 | HostBridgeInstance->ResourceSubmited = FALSE;\r | |
275 | HostBridgeInstance->CanRestarted = TRUE;\r | |
276 | } else {\r | |
277 | //\r | |
278 | // Can not restart\r | |
279 | // \r | |
280 | return EFI_NOT_READY;\r | |
281 | } \r | |
282 | break;\r | |
283 | \r | |
cfdb6737 RN |
284 | case EfiPciHostBridgeEndEnumeration:\r |
285 | break;\r | |
286 | \r | |
21b404d1 | 287 | case EfiPciHostBridgeBeginBusAllocation:\r |
288 | //\r | |
289 | // No specific action is required here, can perform any chipset specific programing\r | |
290 | //\r | |
291 | HostBridgeInstance->CanRestarted = FALSE;\r | |
21b404d1 | 292 | break;\r |
293 | \r | |
294 | case EfiPciHostBridgeEndBusAllocation:\r | |
295 | //\r | |
296 | // No specific action is required here, can perform any chipset specific programing\r | |
297 | //\r | |
298 | //HostBridgeInstance->CanRestarted = FALSE;\r | |
21b404d1 | 299 | break;\r |
300 | \r | |
301 | case EfiPciHostBridgeBeginResourceAllocation:\r | |
302 | //\r | |
303 | // No specific action is required here, can perform any chipset specific programing\r | |
304 | //\r | |
305 | //HostBridgeInstance->CanRestarted = FALSE;\r | |
21b404d1 | 306 | break;\r |
307 | \r | |
308 | case EfiPciHostBridgeAllocateResources:\r | |
309 | ReturnStatus = EFI_SUCCESS;\r | |
310 | if (HostBridgeInstance->ResourceSubmited) {\r | |
311 | //\r | |
312 | // Take care of the resource dependencies between the root bridges \r | |
313 | //\r | |
314 | List = HostBridgeInstance->Head.ForwardLink;\r | |
315 | \r | |
316 | while (List != &HostBridgeInstance->Head) {\r | |
317 | RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);\r | |
318 | for (Index = TypeIo; Index < TypeBus; Index++) {\r | |
319 | if (RootBridgeInstance->ResAllocNode[Index].Status != ResNone) {\r | |
320 | \r | |
321 | AddrLen = RootBridgeInstance->ResAllocNode[Index].Length;\r | |
322 | \r | |
323 | //\r | |
324 | // Get the number of '1' in Alignment.\r | |
325 | //\r | |
24115e44 | 326 | BitsOfAlignment = (UINTN) (HighBitSet64 (RootBridgeInstance->ResAllocNode[Index].Alignment) + 1);\r |
21b404d1 | 327 | \r |
328 | switch (Index) {\r | |
329 | \r | |
330 | case TypeIo: \r | |
331 | //\r | |
332 | // It is impossible for this chipset to align 0xFFFF for IO16\r | |
333 | // So clear it\r | |
334 | //\r | |
335 | if (BitsOfAlignment >= 16) {\r | |
336 | BitsOfAlignment = 0;\r | |
337 | }\r | |
338 | \r | |
339 | Status = gDS->AllocateIoSpace (\r | |
340 | EfiGcdAllocateAnySearchBottomUp, \r | |
341 | EfiGcdIoTypeIo, \r | |
342 | BitsOfAlignment,\r | |
343 | AddrLen,\r | |
344 | &BaseAddress,\r | |
345 | mDriverImageHandle,\r | |
346 | NULL\r | |
347 | );\r | |
348 | \r | |
349 | if (!EFI_ERROR (Status)) {\r | |
350 | RootBridgeInstance->ResAllocNode[Index].Base = (UINTN)BaseAddress;\r | |
351 | RootBridgeInstance->ResAllocNode[Index].Status = ResAllocated; \r | |
352 | } else {\r | |
353 | ReturnStatus = Status; \r | |
354 | if (Status != EFI_OUT_OF_RESOURCES) {\r | |
355 | RootBridgeInstance->ResAllocNode[Index].Length = 0;\r | |
356 | }\r | |
357 | }\r | |
358 | \r | |
359 | break;\r | |
360 | \r | |
361 | \r | |
362 | case TypeMem32:\r | |
363 | //\r | |
364 | // It is impossible for this chipset to align 0xFFFFFFFF for Mem32\r | |
365 | // So clear it \r | |
366 | //\r | |
367 | \r | |
368 | if (BitsOfAlignment >= 32) {\r | |
369 | BitsOfAlignment = 0;\r | |
370 | }\r | |
371 | \r | |
372 | Status = gDS->AllocateMemorySpace (\r | |
373 | EfiGcdAllocateAnySearchBottomUp, \r | |
374 | EfiGcdMemoryTypeMemoryMappedIo, \r | |
375 | BitsOfAlignment,\r | |
376 | AddrLen,\r | |
377 | &BaseAddress,\r | |
378 | mDriverImageHandle,\r | |
379 | NULL\r | |
380 | );\r | |
381 | \r | |
382 | if (!EFI_ERROR (Status)) {\r | |
383 | // We were able to allocate the PCI memory\r | |
384 | RootBridgeInstance->ResAllocNode[Index].Base = (UINTN)BaseAddress;\r | |
385 | RootBridgeInstance->ResAllocNode[Index].Status = ResAllocated;\r | |
386 | \r | |
387 | } else {\r | |
388 | // Not able to allocate enough PCI memory\r | |
389 | ReturnStatus = Status; \r | |
390 | \r | |
391 | if (Status != EFI_OUT_OF_RESOURCES) {\r | |
392 | RootBridgeInstance->ResAllocNode[Index].Length = 0;\r | |
393 | } \r | |
394 | ASSERT (FALSE);\r | |
395 | }\r | |
396 | break;\r | |
397 | \r | |
398 | case TypePMem32: \r | |
399 | case TypeMem64: \r | |
400 | case TypePMem64:\r | |
401 | ReturnStatus = EFI_ABORTED;\r | |
402 | break; \r | |
403 | default:\r | |
404 | ASSERT (FALSE);\r | |
405 | break;\r | |
406 | }; //end switch\r | |
407 | }\r | |
408 | }\r | |
409 | \r | |
410 | List = List->ForwardLink;\r | |
411 | }\r | |
412 | \r | |
413 | return ReturnStatus;\r | |
414 | \r | |
415 | } else {\r | |
416 | return EFI_NOT_READY;\r | |
417 | }\r | |
418 | break;\r | |
419 | \r | |
420 | case EfiPciHostBridgeSetResources:\r | |
421 | break;\r | |
422 | \r | |
423 | case EfiPciHostBridgeFreeResources:\r | |
424 | ReturnStatus = EFI_SUCCESS;\r | |
425 | List = HostBridgeInstance->Head.ForwardLink;\r | |
426 | while (List != &HostBridgeInstance->Head) {\r | |
427 | RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);\r | |
428 | for (Index = TypeIo; Index < TypeBus; Index++) {\r | |
429 | if (RootBridgeInstance->ResAllocNode[Index].Status == ResAllocated) {\r | |
430 | AddrLen = RootBridgeInstance->ResAllocNode[Index].Length;\r | |
431 | BaseAddress = RootBridgeInstance->ResAllocNode[Index].Base;\r | |
432 | switch (Index) {\r | |
433 | \r | |
434 | case TypeIo: \r | |
435 | Status = gDS->FreeIoSpace (BaseAddress, AddrLen); \r | |
436 | if (EFI_ERROR (Status)) {\r | |
437 | ReturnStatus = Status;\r | |
438 | }\r | |
439 | break;\r | |
440 | \r | |
441 | case TypeMem32:\r | |
442 | Status = gDS->FreeMemorySpace (BaseAddress, AddrLen);\r | |
443 | if (EFI_ERROR (Status)) {\r | |
444 | ReturnStatus = Status;\r | |
445 | }\r | |
446 | break;\r | |
447 | \r | |
448 | case TypePMem32:\r | |
449 | break;\r | |
450 | \r | |
451 | case TypeMem64:\r | |
452 | break;\r | |
453 | \r | |
454 | case TypePMem64:\r | |
455 | break; \r | |
456 | \r | |
457 | default:\r | |
458 | ASSERT (FALSE);\r | |
459 | break;\r | |
460 | \r | |
461 | }; //end switch\r | |
462 | RootBridgeInstance->ResAllocNode[Index].Type = Index;\r | |
463 | RootBridgeInstance->ResAllocNode[Index].Base = 0;\r | |
464 | RootBridgeInstance->ResAllocNode[Index].Length = 0;\r | |
465 | RootBridgeInstance->ResAllocNode[Index].Status = ResNone;\r | |
466 | }\r | |
467 | }\r | |
468 | \r | |
469 | List = List->ForwardLink;\r | |
470 | }\r | |
471 | \r | |
472 | HostBridgeInstance->ResourceSubmited = FALSE;\r | |
473 | HostBridgeInstance->CanRestarted = TRUE; \r | |
474 | return ReturnStatus;\r | |
21b404d1 | 475 | \r |
476 | case EfiPciHostBridgeEndResourceAllocation:\r | |
477 | HostBridgeInstance->CanRestarted = FALSE;\r | |
478 | break;\r | |
479 | \r | |
480 | default:\r | |
481 | return EFI_INVALID_PARAMETER;\r | |
cfdb6737 | 482 | }\r |
21b404d1 | 483 | \r |
484 | return EFI_SUCCESS; \r | |
485 | }\r | |
486 | \r | |
18c97f53 | 487 | /**\r |
488 | Return the device handle of the next PCI root bridge that is associated with this Host Bridge.\r | |
489 | \r | |
490 | This function is called multiple times to retrieve the device handles of all the PCI root bridges that\r | |
491 | are associated with this PCI host bridge. Each PCI host bridge is associated with one or more PCI\r | |
492 | root bridges. On each call, the handle that was returned by the previous call is passed into the\r | |
493 | interface, and on output the interface returns the device handle of the next PCI root bridge. The\r | |
494 | caller can use the handle to obtain the instance of the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL\r | |
495 | for that root bridge. When there are no more PCI root bridges to report, the interface returns\r | |
496 | EFI_NOT_FOUND. A PCI enumerator must enumerate the PCI root bridges in the order that they\r | |
497 | are returned by this function.\r | |
498 | For D945 implementation, there is only one root bridge in PCI host bridge.\r | |
499 | \r | |
500 | @param[in] This The instance pointer of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL\r | |
24115e44 | 501 | @param[in, out] RootBridgeHandle Returns the device handle of the next PCI root bridge.\r |
18c97f53 | 502 | \r |
503 | @retval EFI_SUCCESS If parameter RootBridgeHandle = NULL, then return the first Rootbridge handle of the\r | |
504 | specific Host bridge and return EFI_SUCCESS. \r | |
505 | @retval EFI_NOT_FOUND Can not find the any more root bridge in specific host bridge.\r | |
506 | @retval EFI_INVALID_PARAMETER RootBridgeHandle is not an EFI_HANDLE that was\r | |
507 | returned on a previous call to GetNextRootBridge().\r | |
508 | **/\r | |
21b404d1 | 509 | EFI_STATUS\r |
510 | EFIAPI\r | |
511 | GetNextRootBridge(\r | |
512 | IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,\r | |
513 | IN OUT EFI_HANDLE *RootBridgeHandle\r | |
514 | )\r | |
21b404d1 | 515 | {\r |
516 | BOOLEAN NoRootBridge; \r | |
517 | LIST_ENTRY *List; \r | |
518 | PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;\r | |
519 | PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;\r | |
520 | \r | |
521 | NoRootBridge = TRUE;\r | |
522 | HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);\r | |
523 | List = HostBridgeInstance->Head.ForwardLink;\r | |
524 | \r | |
525 | \r | |
526 | while (List != &HostBridgeInstance->Head) {\r | |
527 | NoRootBridge = FALSE;\r | |
528 | RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);\r | |
529 | if (*RootBridgeHandle == NULL) {\r | |
530 | //\r | |
531 | // Return the first Root Bridge Handle of the Host Bridge\r | |
532 | //\r | |
533 | *RootBridgeHandle = RootBridgeInstance->Handle;\r | |
534 | return EFI_SUCCESS;\r | |
535 | } else {\r | |
536 | if (*RootBridgeHandle == RootBridgeInstance->Handle) {\r | |
537 | //\r | |
538 | // Get next if have\r | |
539 | //\r | |
540 | List = List->ForwardLink;\r | |
541 | if (List!=&HostBridgeInstance->Head) {\r | |
542 | RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);\r | |
543 | *RootBridgeHandle = RootBridgeInstance->Handle;\r | |
544 | return EFI_SUCCESS; \r | |
545 | } else {\r | |
546 | return EFI_NOT_FOUND;\r | |
547 | }\r | |
548 | }\r | |
549 | }\r | |
550 | \r | |
551 | List = List->ForwardLink;\r | |
552 | } //end while\r | |
553 | \r | |
554 | if (NoRootBridge) {\r | |
555 | return EFI_NOT_FOUND;\r | |
556 | } else {\r | |
557 | return EFI_INVALID_PARAMETER;\r | |
558 | }\r | |
559 | }\r | |
560 | \r | |
18c97f53 | 561 | /**\r |
562 | Returns the allocation attributes of a PCI root bridge.\r | |
563 | \r | |
564 | The function returns the allocation attributes of a specific PCI root bridge. The attributes can vary\r | |
565 | from one PCI root bridge to another. These attributes are different from the decode-related\r | |
566 | attributes that are returned by the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.GetAttributes() member function. The\r | |
567 | RootBridgeHandle parameter is used to specify the instance of the PCI root bridge. The device\r | |
568 | handles of all the root bridges that are associated with this host bridge must be obtained by calling\r | |
569 | GetNextRootBridge(). The attributes are static in the sense that they do not change during or\r | |
570 | after the enumeration process. The hardware may provide mechanisms to change the attributes on\r | |
571 | the fly, but such changes must be completed before EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL is \r | |
572 | installed. The permitted values of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ATTRIBUTES are defined in\r | |
573 | "Related Definitions" below. The caller uses these attributes to combine multiple resource requests.\r | |
574 | For example, if the flag EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM is set, the PCI bus enumerator needs to \r | |
575 | include requests for the prefetchable memory in the nonprefetchable memory pool and not request any \r | |
576 | prefetchable memory.\r | |
577 | Attribute Description\r | |
578 | ------------------------------------ ----------------------------------------------------------------------\r | |
579 | EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM If this bit is set, then the PCI root bridge does not support separate\r | |
580 | windows for nonprefetchable and prefetchable memory. A PCI bus\r | |
581 | driver needs to include requests for prefetchable memory in the\r | |
582 | nonprefetchable memory pool.\r | |
583 | \r | |
584 | EFI_PCI_HOST_BRIDGE_MEM64_DECODE If this bit is set, then the PCI root bridge supports 64-bit memory\r | |
585 | windows. If this bit is not set, the PCI bus driver needs to include\r | |
586 | requests for a 64-bit memory address in the corresponding 32-bit\r | |
587 | memory pool.\r | |
588 | \r | |
589 | @param[in] This The instance pointer of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL\r | |
590 | @param[in] RootBridgeHandle The device handle of the PCI root bridge in which the caller is interested. Type\r | |
591 | EFI_HANDLE is defined in InstallProtocolInterface() in the UEFI 2.0 Specification.\r | |
592 | @param[out] Attributes The pointer to attribte of root bridge, it is output parameter\r | |
593 | \r | |
594 | @retval EFI_INVALID_PARAMETER Attribute pointer is NULL\r | |
595 | @retval EFI_INVALID_PARAMETER RootBridgehandle is invalid.\r | |
596 | @retval EFI_SUCCESS Success to get attribute of interested root bridge.\r | |
597 | \r | |
598 | **/\r | |
21b404d1 | 599 | EFI_STATUS\r |
600 | EFIAPI\r | |
601 | GetAttributes(\r | |
602 | IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,\r | |
603 | IN EFI_HANDLE RootBridgeHandle,\r | |
604 | OUT UINT64 *Attributes\r | |
605 | )\r | |
21b404d1 | 606 | {\r |
607 | LIST_ENTRY *List; \r | |
608 | PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;\r | |
609 | PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;\r | |
610 | \r | |
611 | if (Attributes == NULL) {\r | |
612 | return EFI_INVALID_PARAMETER;\r | |
613 | }\r | |
614 | \r | |
615 | HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);\r | |
616 | List = HostBridgeInstance->Head.ForwardLink;\r | |
617 | \r | |
618 | while (List != &HostBridgeInstance->Head) {\r | |
619 | RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);\r | |
620 | if (RootBridgeHandle == RootBridgeInstance->Handle) {\r | |
621 | *Attributes = RootBridgeInstance->RootBridgeAttrib;\r | |
622 | return EFI_SUCCESS;\r | |
623 | }\r | |
624 | List = List->ForwardLink;\r | |
625 | }\r | |
626 | \r | |
627 | //\r | |
628 | // RootBridgeHandle is not an EFI_HANDLE \r | |
629 | // that was returned on a previous call to GetNextRootBridge()\r | |
630 | //\r | |
631 | return EFI_INVALID_PARAMETER;\r | |
632 | }\r | |
633 | \r | |
18c97f53 | 634 | /**\r |
635 | Sets up the specified PCI root bridge for the bus enumeration process.\r | |
636 | \r | |
637 | This member function sets up the root bridge for bus enumeration and returns the PCI bus range\r | |
638 | over which the search should be performed in ACPI 2.0 resource descriptor format.\r | |
639 | \r | |
640 | @param[in] This The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ PROTOCOL instance.\r | |
641 | @param[in] RootBridgeHandle The PCI Root Bridge to be set up.\r | |
642 | @param[out] Configuration Pointer to the pointer to the PCI bus resource descriptor.\r | |
643 | \r | |
644 | @retval EFI_INVALID_PARAMETER Invalid Root bridge's handle\r | |
645 | @retval EFI_OUT_OF_RESOURCES Fail to allocate ACPI resource descriptor tag.\r | |
646 | @retval EFI_SUCCESS Sucess to allocate ACPI resource descriptor.\r | |
647 | \r | |
648 | **/\r | |
21b404d1 | 649 | EFI_STATUS\r |
650 | EFIAPI\r | |
651 | StartBusEnumeration(\r | |
652 | IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,\r | |
653 | IN EFI_HANDLE RootBridgeHandle,\r | |
654 | OUT VOID **Configuration\r | |
655 | )\r | |
21b404d1 | 656 | {\r |
657 | LIST_ENTRY *List; \r | |
658 | PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;\r | |
659 | PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;\r | |
660 | VOID *Buffer;\r | |
661 | UINT8 *Temp;\r | |
662 | UINT64 BusStart;\r | |
663 | UINT64 BusEnd;\r | |
664 | \r | |
665 | HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);\r | |
666 | List = HostBridgeInstance->Head.ForwardLink;\r | |
667 | \r | |
668 | while (List != &HostBridgeInstance->Head) {\r | |
669 | RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);\r | |
670 | if (RootBridgeHandle == RootBridgeInstance->Handle) {\r | |
671 | //\r | |
672 | // Set up the Root Bridge for Bus Enumeration\r | |
673 | //\r | |
674 | BusStart = RootBridgeInstance->BusBase;\r | |
675 | BusEnd = RootBridgeInstance->BusLimit;\r | |
676 | //\r | |
677 | // Program the Hardware(if needed) if error return EFI_DEVICE_ERROR\r | |
678 | //\r | |
679 | \r | |
680 | Buffer = AllocatePool (sizeof(EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) + sizeof(EFI_ACPI_END_TAG_DESCRIPTOR));\r | |
681 | if (Buffer == NULL) {\r | |
682 | return EFI_OUT_OF_RESOURCES;\r | |
683 | }\r | |
684 | \r | |
685 | Temp = (UINT8 *)Buffer;\r | |
686 | \r | |
687 | ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->Desc = 0x8A;\r | |
688 | ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->Len = 0x2B;\r | |
689 | ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->ResType = 2;\r | |
690 | ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->GenFlag = 0; \r | |
691 | ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->SpecificFlag = 0;\r | |
692 | ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->AddrSpaceGranularity = 0;\r | |
693 | ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->AddrRangeMin = BusStart;\r | |
694 | ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->AddrRangeMax = 0;\r | |
695 | ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->AddrTranslationOffset = 0; \r | |
696 | ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->AddrLen = BusEnd - BusStart + 1;\r | |
697 | \r | |
698 | Temp = Temp + sizeof(EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR);\r | |
699 | ((EFI_ACPI_END_TAG_DESCRIPTOR *)Temp)->Desc = 0x79; \r | |
700 | ((EFI_ACPI_END_TAG_DESCRIPTOR *)Temp)->Checksum = 0x0;\r | |
701 | \r | |
702 | *Configuration = Buffer; \r | |
703 | return EFI_SUCCESS;\r | |
704 | }\r | |
705 | List = List->ForwardLink;\r | |
706 | }\r | |
707 | \r | |
708 | return EFI_INVALID_PARAMETER;\r | |
709 | }\r | |
710 | \r | |
18c97f53 | 711 | /**\r |
712 | Programs the PCI root bridge hardware so that it decodes the specified PCI bus range.\r | |
713 | \r | |
714 | This member function programs the specified PCI root bridge to decode the bus range that is\r | |
715 | specified by the input parameter Configuration.\r | |
716 | The bus range information is specified in terms of the ACPI 2.0 resource descriptor format.\r | |
717 | \r | |
718 | @param[in] This The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ PROTOCOL instance\r | |
719 | @param[in] RootBridgeHandle The PCI Root Bridge whose bus range is to be programmed\r | |
720 | @param[in] Configuration The pointer to the PCI bus resource descriptor\r | |
721 | \r | |
722 | @retval EFI_INVALID_PARAMETER RootBridgeHandle is not a valid root bridge handle.\r | |
723 | @retval EFI_INVALID_PARAMETER Configuration is NULL.\r | |
724 | @retval EFI_INVALID_PARAMETER Configuration does not point to a valid ACPI 2.0 resource descriptor.\r | |
725 | @retval EFI_INVALID_PARAMETER Configuration does not include a valid ACPI 2.0 bus resource descriptor.\r | |
726 | @retval EFI_INVALID_PARAMETER Configuration includes valid ACPI 2.0 resource descriptors other than \r | |
727 | bus descriptors.\r | |
728 | @retval EFI_INVALID_PARAMETER Configuration contains one or more invalid ACPI resource descriptors.\r | |
729 | @retval EFI_INVALID_PARAMETER "Address Range Minimum" is invalid for this root bridge.\r | |
730 | @retval EFI_INVALID_PARAMETER "Address Range Length" is invalid for this root bridge.\r | |
731 | @retval EFI_DEVICE_ERROR Programming failed due to a hardware error.\r | |
732 | @retval EFI_SUCCESS The bus range for the PCI root bridge was programmed.\r | |
733 | \r | |
734 | **/\r | |
21b404d1 | 735 | EFI_STATUS\r |
736 | EFIAPI\r | |
737 | SetBusNumbers(\r | |
738 | IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,\r | |
739 | IN EFI_HANDLE RootBridgeHandle,\r | |
740 | IN VOID *Configuration\r | |
741 | )\r | |
21b404d1 | 742 | {\r |
743 | LIST_ENTRY *List; \r | |
744 | PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;\r | |
745 | PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;\r | |
746 | UINT8 *Ptr;\r | |
747 | UINTN BusStart;\r | |
748 | UINTN BusEnd;\r | |
749 | UINTN BusLen;\r | |
750 | \r | |
751 | if (Configuration == NULL) {\r | |
752 | return EFI_INVALID_PARAMETER;\r | |
753 | }\r | |
754 | \r | |
755 | Ptr = Configuration;\r | |
756 | \r | |
757 | //\r | |
758 | // Check the Configuration is valid\r | |
759 | //\r | |
760 | if(*Ptr != ACPI_ADDRESS_SPACE_DESCRIPTOR) {\r | |
761 | return EFI_INVALID_PARAMETER;\r | |
762 | }\r | |
763 | \r | |
764 | if (((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Ptr)->ResType != 2) {\r | |
765 | return EFI_INVALID_PARAMETER;\r | |
766 | }\r | |
767 | \r | |
768 | Ptr += sizeof(EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR);\r | |
769 | if (*Ptr != ACPI_END_TAG_DESCRIPTOR) {\r | |
770 | return EFI_INVALID_PARAMETER;\r | |
771 | }\r | |
772 | \r | |
773 | HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);\r | |
774 | List = HostBridgeInstance->Head.ForwardLink;\r | |
775 | \r | |
776 | Ptr = Configuration;\r | |
777 | \r | |
778 | while (List != &HostBridgeInstance->Head) {\r | |
779 | RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);\r | |
780 | if (RootBridgeHandle == RootBridgeInstance->Handle) {\r | |
781 | BusStart = (UINTN)((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Ptr)->AddrRangeMin;\r | |
782 | BusLen = (UINTN)((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Ptr)->AddrLen;\r | |
783 | BusEnd = BusStart + BusLen - 1;\r | |
784 | \r | |
785 | if (BusStart > BusEnd) {\r | |
786 | return EFI_INVALID_PARAMETER;\r | |
787 | }\r | |
788 | \r | |
789 | if ((BusStart < RootBridgeInstance->BusBase) || (BusEnd > RootBridgeInstance->BusLimit)) {\r | |
790 | return EFI_INVALID_PARAMETER;\r | |
791 | }\r | |
792 | \r | |
793 | //\r | |
794 | // Update the Bus Range\r | |
795 | //\r | |
796 | RootBridgeInstance->ResAllocNode[TypeBus].Base = BusStart;\r | |
797 | RootBridgeInstance->ResAllocNode[TypeBus].Length = BusLen;\r | |
798 | RootBridgeInstance->ResAllocNode[TypeBus].Status = ResAllocated;\r | |
799 | \r | |
800 | //\r | |
801 | // Program the Root Bridge Hardware\r | |
802 | //\r | |
803 | \r | |
804 | return EFI_SUCCESS;\r | |
805 | }\r | |
806 | \r | |
807 | List = List->ForwardLink;\r | |
808 | }\r | |
809 | \r | |
810 | return EFI_INVALID_PARAMETER;\r | |
811 | }\r | |
812 | \r | |
813 | \r | |
18c97f53 | 814 | /**\r |
815 | Submits the I/O and memory resource requirements for the specified PCI root bridge.\r | |
816 | \r | |
817 | This function is used to submit all the I/O and memory resources that are required by the specified\r | |
818 | PCI root bridge. The input parameter Configuration is used to specify the following:\r | |
819 | - The various types of resources that are required\r | |
820 | - The associated lengths in terms of ACPI 2.0 resource descriptor format\r | |
821 | \r | |
822 | @param[in] This Pointer to the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL instance.\r | |
823 | @param[in] RootBridgeHandle The PCI root bridge whose I/O and memory resource requirements are being submitted.\r | |
824 | @param[in] Configuration The pointer to the PCI I/O and PCI memory resource descriptor.\r | |
825 | \r | |
826 | @retval EFI_SUCCESS The I/O and memory resource requests for a PCI root bridge were accepted.\r | |
827 | @retval EFI_INVALID_PARAMETER RootBridgeHandle is not a valid root bridge handle.\r | |
828 | @retval EFI_INVALID_PARAMETER Configuration is NULL.\r | |
829 | @retval EFI_INVALID_PARAMETER Configuration does not point to a valid ACPI 2.0 resource descriptor.\r | |
830 | @retval EFI_INVALID_PARAMETER Configuration includes requests for one or more resource types that are \r | |
831 | not supported by this PCI root bridge. This error will happen if the caller \r | |
832 | did not combine resources according to Attributes that were returned by\r | |
833 | GetAllocAttributes().\r | |
834 | @retval EFI_INVALID_PARAMETER Address Range Maximum" is invalid.\r | |
835 | @retval EFI_INVALID_PARAMETER "Address Range Length" is invalid for this PCI root bridge.\r | |
836 | @retval EFI_INVALID_PARAMETER "Address Space Granularity" is invalid for this PCI root bridge.\r | |
837 | \r | |
838 | **/\r | |
21b404d1 | 839 | EFI_STATUS\r |
840 | EFIAPI\r | |
841 | SubmitResources(\r | |
842 | IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,\r | |
843 | IN EFI_HANDLE RootBridgeHandle,\r | |
844 | IN VOID *Configuration\r | |
845 | )\r | |
21b404d1 | 846 | {\r |
847 | LIST_ENTRY *List; \r | |
848 | PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;\r | |
849 | PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;\r | |
850 | UINT8 *Temp;\r | |
24115e44 | 851 | EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Ptr;\r |
21b404d1 | 852 | UINT64 AddrLen;\r |
853 | UINT64 Alignment;\r | |
854 | \r | |
855 | //\r | |
856 | // Check the input parameter: Configuration\r | |
857 | //\r | |
858 | if (Configuration == NULL) {\r | |
859 | return EFI_INVALID_PARAMETER;\r | |
860 | }\r | |
861 | \r | |
862 | HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);\r | |
863 | List = HostBridgeInstance->Head.ForwardLink;\r | |
864 | \r | |
865 | Temp = (UINT8 *)Configuration;\r | |
866 | while ( *Temp == 0x8A) { \r | |
867 | Temp += sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) ;\r | |
868 | }\r | |
869 | if (*Temp != 0x79) {\r | |
870 | return EFI_INVALID_PARAMETER;\r | |
871 | }\r | |
872 | \r | |
873 | Temp = (UINT8 *)Configuration;\r | |
874 | while (List != &HostBridgeInstance->Head) {\r | |
875 | RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);\r | |
876 | if (RootBridgeHandle == RootBridgeInstance->Handle) {\r | |
877 | while ( *Temp == 0x8A) {\r | |
24115e44 | 878 | Ptr = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *) Temp ;\r |
21b404d1 | 879 | \r |
880 | //\r | |
881 | // Check Address Length\r | |
882 | //\r | |
24115e44 | 883 | if (Ptr->AddrLen > 0xffffffff) {\r |
21b404d1 | 884 | return EFI_INVALID_PARAMETER;\r |
885 | }\r | |
886 | \r | |
887 | //\r | |
888 | // Check address range alignment\r | |
889 | //\r | |
24115e44 | 890 | if (Ptr->AddrRangeMax >= 0xffffffff || Ptr->AddrRangeMax != (GetPowerOfTwo64 (Ptr->AddrRangeMax + 1) - 1)) {\r |
21b404d1 | 891 | return EFI_INVALID_PARAMETER;\r |
892 | }\r | |
893 | \r | |
24115e44 | 894 | switch (Ptr->ResType) {\r |
21b404d1 | 895 | \r |
896 | case 0:\r | |
897 | \r | |
898 | //\r | |
899 | // Check invalid Address Sapce Granularity\r | |
900 | //\r | |
24115e44 | 901 | if (Ptr->AddrSpaceGranularity != 32) {\r |
21b404d1 | 902 | return EFI_INVALID_PARAMETER;\r |
903 | }\r | |
904 | \r | |
905 | //\r | |
906 | // check the memory resource request is supported by PCI root bridge\r | |
907 | //\r | |
908 | if (RootBridgeInstance->RootBridgeAttrib == EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM &&\r | |
24115e44 | 909 | Ptr->SpecificFlag == 0x06) {\r |
21b404d1 | 910 | return EFI_INVALID_PARAMETER;\r |
911 | }\r | |
912 | \r | |
24115e44 ED |
913 | AddrLen = Ptr->AddrLen;\r |
914 | Alignment = Ptr->AddrRangeMax;\r | |
915 | if (Ptr->AddrSpaceGranularity == 32) {\r | |
916 | if (Ptr->SpecificFlag == 0x06) {\r | |
21b404d1 | 917 | //\r |
918 | // Apply from GCD\r | |
919 | //\r | |
920 | RootBridgeInstance->ResAllocNode[TypePMem32].Status = ResSubmitted;\r | |
921 | } else {\r | |
922 | RootBridgeInstance->ResAllocNode[TypeMem32].Length = AddrLen;\r | |
923 | RootBridgeInstance->ResAllocNode[TypeMem32].Alignment = Alignment;\r | |
924 | RootBridgeInstance->ResAllocNode[TypeMem32].Status = ResRequested; \r | |
925 | HostBridgeInstance->ResourceSubmited = TRUE;\r | |
926 | }\r | |
927 | }\r | |
928 | \r | |
24115e44 ED |
929 | if (Ptr->AddrSpaceGranularity == 64) {\r |
930 | if (Ptr->SpecificFlag == 0x06) {\r | |
21b404d1 | 931 | RootBridgeInstance->ResAllocNode[TypePMem64].Status = ResSubmitted;\r |
932 | } else {\r | |
933 | RootBridgeInstance->ResAllocNode[TypeMem64].Status = ResSubmitted;\r | |
934 | }\r | |
935 | }\r | |
936 | break;\r | |
937 | \r | |
938 | case 1:\r | |
24115e44 ED |
939 | AddrLen = (UINTN) Ptr->AddrLen;\r |
940 | Alignment = (UINTN) Ptr->AddrRangeMax;\r | |
21b404d1 | 941 | RootBridgeInstance->ResAllocNode[TypeIo].Length = AddrLen;\r |
942 | RootBridgeInstance->ResAllocNode[TypeIo].Alignment = Alignment;\r | |
943 | RootBridgeInstance->ResAllocNode[TypeIo].Status = ResRequested;\r | |
944 | HostBridgeInstance->ResourceSubmited = TRUE; \r | |
945 | break;\r | |
946 | \r | |
947 | default:\r | |
948 | break;\r | |
949 | };\r | |
950 | \r | |
951 | Temp += sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) ;\r | |
952 | } \r | |
953 | \r | |
954 | return EFI_SUCCESS;\r | |
955 | }\r | |
956 | \r | |
957 | List = List->ForwardLink;\r | |
958 | }\r | |
959 | \r | |
960 | return EFI_INVALID_PARAMETER;\r | |
961 | }\r | |
962 | \r | |
18c97f53 | 963 | /**\r |
964 | Returns the proposed resource settings for the specified PCI root bridge.\r | |
965 | \r | |
966 | This member function returns the proposed resource settings for the specified PCI root bridge. The\r | |
967 | proposed resource settings are prepared when NotifyPhase() is called with a Phase of\r | |
968 | EfiPciHostBridgeAllocateResources. The output parameter Configuration\r | |
969 | specifies the following:\r | |
970 | - The various types of resources, excluding bus resources, that are allocated\r | |
971 | - The associated lengths in terms of ACPI 2.0 resource descriptor format\r | |
972 | \r | |
973 | @param[in] This Pointer to the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL instance.\r | |
974 | @param[in] RootBridgeHandle The PCI root bridge handle. Type EFI_HANDLE is defined in InstallProtocolInterface() in the UEFI 2.0 Specification.\r | |
975 | @param[out] Configuration The pointer to the pointer to the PCI I/O and memory resource descriptor.\r | |
976 | \r | |
977 | @retval EFI_SUCCESS The requested parameters were returned.\r | |
978 | @retval EFI_INVALID_PARAMETER RootBridgeHandle is not a valid root bridge handle.\r | |
979 | @retval EFI_DEVICE_ERROR Programming failed due to a hardware error.\r | |
980 | @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.\r | |
981 | \r | |
982 | **/\r | |
21b404d1 | 983 | EFI_STATUS\r |
984 | EFIAPI\r | |
985 | GetProposedResources(\r | |
986 | IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,\r | |
987 | IN EFI_HANDLE RootBridgeHandle,\r | |
988 | OUT VOID **Configuration\r | |
989 | )\r | |
21b404d1 | 990 | {\r |
991 | LIST_ENTRY *List; \r | |
992 | PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;\r | |
993 | PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;\r | |
994 | UINTN Index;\r | |
995 | UINTN Number; \r | |
996 | VOID *Buffer; \r | |
997 | UINT8 *Temp;\r | |
24115e44 | 998 | EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Ptr;\r |
21b404d1 | 999 | UINT64 ResStatus;\r |
1000 | \r | |
1001 | Buffer = NULL;\r | |
1002 | Number = 0;\r | |
1003 | //\r | |
1004 | // Get the Host Bridge Instance from the resource allocation protocol\r | |
1005 | //\r | |
1006 | HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);\r | |
1007 | List = HostBridgeInstance->Head.ForwardLink;\r | |
1008 | \r | |
1009 | //\r | |
1010 | // Enumerate the root bridges in this host bridge\r | |
1011 | //\r | |
1012 | while (List != &HostBridgeInstance->Head) {\r | |
1013 | RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);\r | |
1014 | if (RootBridgeHandle == RootBridgeInstance->Handle) {\r | |
1015 | for (Index = 0; Index < TypeBus; Index ++) {\r | |
1016 | if (RootBridgeInstance->ResAllocNode[Index].Status != ResNone) {\r | |
1017 | Number ++;\r | |
1018 | } \r | |
1019 | }\r | |
1020 | \r | |
1021 | if (Number == 0) {\r | |
1022 | return EFI_INVALID_PARAMETER;\r | |
1023 | }\r | |
1024 | \r | |
1025 | Buffer = AllocateZeroPool (Number * sizeof(EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) + sizeof(EFI_ACPI_END_TAG_DESCRIPTOR));\r | |
1026 | if (Buffer == NULL) {\r | |
1027 | return EFI_OUT_OF_RESOURCES;\r | |
1028 | }\r | |
1029 | \r | |
1030 | Temp = Buffer;\r | |
1031 | for (Index = 0; Index < TypeBus; Index ++) {\r | |
1032 | if (RootBridgeInstance->ResAllocNode[Index].Status != ResNone) {\r | |
24115e44 | 1033 | Ptr = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *) Temp ;\r |
21b404d1 | 1034 | ResStatus = RootBridgeInstance->ResAllocNode[Index].Status;\r |
1035 | \r | |
1036 | switch (Index) {\r | |
1037 | \r | |
1038 | case TypeIo:\r | |
1039 | //\r | |
1040 | // Io\r | |
1041 | //\r | |
24115e44 ED |
1042 | Ptr->Desc = 0x8A;\r |
1043 | Ptr->Len = 0x2B;\r | |
1044 | Ptr->ResType = 1;\r | |
1045 | Ptr->GenFlag = 0; \r | |
1046 | Ptr->SpecificFlag = 0;\r | |
1047 | Ptr->AddrRangeMin = RootBridgeInstance->ResAllocNode[Index].Base;\r | |
1048 | Ptr->AddrRangeMax = 0;\r | |
1049 | Ptr->AddrTranslationOffset = \\r | |
21b404d1 | 1050 | (ResStatus == ResAllocated) ? EFI_RESOURCE_SATISFIED : EFI_RESOURCE_LESS;\r |
24115e44 | 1051 | Ptr->AddrLen = RootBridgeInstance->ResAllocNode[Index].Length;\r |
21b404d1 | 1052 | break;\r |
1053 | \r | |
1054 | case TypeMem32:\r | |
1055 | //\r | |
1056 | // Memory 32\r | |
1057 | // \r | |
24115e44 ED |
1058 | Ptr->Desc = 0x8A;\r |
1059 | Ptr->Len = 0x2B;\r | |
1060 | Ptr->ResType = 0;\r | |
1061 | Ptr->GenFlag = 0; \r | |
1062 | Ptr->SpecificFlag = 0;\r | |
1063 | Ptr->AddrSpaceGranularity = 32;\r | |
1064 | Ptr->AddrRangeMin = RootBridgeInstance->ResAllocNode[Index].Base;\r | |
1065 | Ptr->AddrRangeMax = 0;\r | |
1066 | Ptr->AddrTranslationOffset = \\r | |
21b404d1 | 1067 | (ResStatus == ResAllocated) ? EFI_RESOURCE_SATISFIED : EFI_RESOURCE_LESS; \r |
24115e44 | 1068 | Ptr->AddrLen = RootBridgeInstance->ResAllocNode[Index].Length;\r |
21b404d1 | 1069 | break;\r |
1070 | \r | |
1071 | case TypePMem32:\r | |
1072 | //\r | |
1073 | // Prefetch memory 32\r | |
1074 | //\r | |
24115e44 ED |
1075 | Ptr->Desc = 0x8A;\r |
1076 | Ptr->Len = 0x2B;\r | |
1077 | Ptr->ResType = 0;\r | |
1078 | Ptr->GenFlag = 0; \r | |
1079 | Ptr->SpecificFlag = 6;\r | |
1080 | Ptr->AddrSpaceGranularity = 32;\r | |
1081 | Ptr->AddrRangeMin = 0;\r | |
1082 | Ptr->AddrRangeMax = 0;\r | |
1083 | Ptr->AddrTranslationOffset = EFI_RESOURCE_NONEXISTENT; \r | |
1084 | Ptr->AddrLen = 0;\r | |
21b404d1 | 1085 | break;\r |
1086 | \r | |
1087 | case TypeMem64:\r | |
1088 | //\r | |
1089 | // Memory 64\r | |
1090 | //\r | |
24115e44 ED |
1091 | Ptr->Desc = 0x8A;\r |
1092 | Ptr->Len = 0x2B;\r | |
1093 | Ptr->ResType = 0;\r | |
1094 | Ptr->GenFlag = 0; \r | |
1095 | Ptr->SpecificFlag = 0;\r | |
1096 | Ptr->AddrSpaceGranularity = 64;\r | |
1097 | Ptr->AddrRangeMin = 0;\r | |
1098 | Ptr->AddrRangeMax = 0;\r | |
1099 | Ptr->AddrTranslationOffset = EFI_RESOURCE_NONEXISTENT; \r | |
1100 | Ptr->AddrLen = 0;\r | |
21b404d1 | 1101 | break;\r |
1102 | \r | |
1103 | case TypePMem64:\r | |
1104 | //\r | |
1105 | // Prefetch memory 64\r | |
1106 | //\r | |
24115e44 ED |
1107 | Ptr->Desc = 0x8A;\r |
1108 | Ptr->Len = 0x2B;\r | |
1109 | Ptr->ResType = 0;\r | |
1110 | Ptr->GenFlag = 0; \r | |
1111 | Ptr->SpecificFlag = 6;\r | |
1112 | Ptr->AddrSpaceGranularity = 64;\r | |
1113 | Ptr->AddrRangeMin = 0;\r | |
1114 | Ptr->AddrRangeMax = 0;\r | |
1115 | Ptr->AddrTranslationOffset = EFI_RESOURCE_NONEXISTENT; \r | |
1116 | Ptr->AddrLen = 0;\r | |
21b404d1 | 1117 | break;\r |
1118 | };\r | |
1119 | \r | |
1120 | Temp += sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR);\r | |
1121 | } \r | |
1122 | }\r | |
1123 | \r | |
1124 | ((EFI_ACPI_END_TAG_DESCRIPTOR *)Temp)->Desc = 0x79; \r | |
1125 | ((EFI_ACPI_END_TAG_DESCRIPTOR *)Temp)->Checksum = 0x0;\r | |
1126 | \r | |
1127 | *Configuration = Buffer; \r | |
1128 | \r | |
1129 | return EFI_SUCCESS;\r | |
1130 | }\r | |
1131 | \r | |
1132 | List = List->ForwardLink;\r | |
1133 | }\r | |
1134 | \r | |
1135 | return EFI_INVALID_PARAMETER;\r | |
1136 | }\r | |
1137 | \r | |
18c97f53 | 1138 | /**\r |
1139 | Provides the hooks from the PCI bus driver to every PCI controller (device/function) at various\r | |
1140 | stages of the PCI enumeration process that allow the host bridge driver to preinitialize individual\r | |
1141 | PCI controllers before enumeration.\r | |
1142 | \r | |
1143 | This function is called during the PCI enumeration process. No specific action is expected from this\r | |
1144 | member function. It allows the host bridge driver to preinitialize individual PCI controllers before\r | |
1145 | enumeration.\r | |
1146 | \r | |
1147 | @param This Pointer to the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL instance.\r | |
1148 | @param RootBridgeHandle The associated PCI root bridge handle. Type EFI_HANDLE is defined in\r | |
1149 | InstallProtocolInterface() in the UEFI 2.0 Specification.\r | |
1150 | @param PciAddress The address of the PCI device on the PCI bus. This address can be passed to the\r | |
1151 | EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL member functions to access the PCI\r | |
1152 | configuration space of the device. See Table 12-1 in the UEFI 2.0 Specification for\r | |
1153 | the definition of EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS.\r | |
1154 | @param Phase The phase of the PCI device enumeration. \r | |
1155 | \r | |
1156 | @retval EFI_SUCCESS The requested parameters were returned.\r | |
1157 | @retval EFI_INVALID_PARAMETER RootBridgeHandle is not a valid root bridge handle.\r | |
1158 | @retval EFI_INVALID_PARAMETER Phase is not a valid phase that is defined in\r | |
1159 | EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE.\r | |
1160 | @retval EFI_DEVICE_ERROR Programming failed due to a hardware error. The PCI enumerator should\r | |
1161 | not enumerate this device, including its child devices if it is a PCI-to-PCI\r | |
1162 | bridge.\r | |
1163 | \r | |
1164 | **/\r | |
21b404d1 | 1165 | EFI_STATUS\r |
1166 | EFIAPI\r | |
1167 | PreprocessController (\r | |
24115e44 | 1168 | IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,\r |
21b404d1 | 1169 | IN EFI_HANDLE RootBridgeHandle,\r |
1170 | IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS PciAddress,\r | |
1171 | IN EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE Phase\r | |
1172 | )\r | |
21b404d1 | 1173 | {\r |
1174 | PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;\r | |
1175 | PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;\r | |
1176 | LIST_ENTRY *List; \r | |
1177 | \r | |
1178 | HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);\r | |
1179 | List = HostBridgeInstance->Head.ForwardLink;\r | |
1180 | \r | |
1181 | //\r | |
1182 | // Enumerate the root bridges in this host bridge\r | |
1183 | //\r | |
1184 | while (List != &HostBridgeInstance->Head) {\r | |
1185 | RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);\r | |
1186 | if (RootBridgeHandle == RootBridgeInstance->Handle) {\r | |
e0ee9d93 | 1187 | break;\r |
21b404d1 | 1188 | }\r |
1189 | List = List->ForwardLink;\r | |
1190 | }\r | |
e0ee9d93 | 1191 | if (List == &HostBridgeInstance->Head) {\r |
1192 | return EFI_INVALID_PARAMETER;\r | |
1193 | }\r | |
21b404d1 | 1194 | \r |
3d78c020 | 1195 | if ((UINT32)Phase > EfiPciBeforeResourceCollection) {\r |
e0ee9d93 | 1196 | return EFI_INVALID_PARAMETER;\r |
1197 | }\r | |
1198 | \r | |
1199 | return EFI_SUCCESS;\r | |
21b404d1 | 1200 | }\r |