]> git.proxmox.com Git - mirror_edk2.git/blame - PcAtChipsetPkg/PciHostBridgeDxe/X64/IoFifo.asm
Fix typo.
[mirror_edk2.git] / PcAtChipsetPkg / PciHostBridgeDxe / X64 / IoFifo.asm
CommitLineData
1fd376d9 1;------------------------------------------------------------------------------\r
2;\r
3; Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>\r
4; This program and the accompanying materials\r
5; are licensed and made available under the terms and conditions of the BSD License\r
6; which accompanies this distribution. The full text of the license may be found at\r
7; http://opensource.org/licenses/bsd-license.php.\r
8;\r
9; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
10; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
11;\r
12;------------------------------------------------------------------------------\r
13\r
14 .code\r
15\r
16;------------------------------------------------------------------------------\r
17; VOID\r
18; EFIAPI\r
19; IoReadFifo8 (\r
20; IN UINTN Port, // rcx\r
21; IN UINTN Size, // rdx\r
22; IN VOID *Buffer // r8\r
23; );\r
24;------------------------------------------------------------------------------\r
25IoReadFifo8 PROC\r
26 cld\r
27 xchg rcx, rdx\r
28 xchg rdi, r8 ; rdi: buffer address; r8: save rdi\r
29rep insb\r
30 mov rdi, r8 ; restore rdi\r
31 ret\r
32IoReadFifo8 ENDP\r
33\r
34;------------------------------------------------------------------------------\r
35; VOID\r
36; EFIAPI\r
37; IoReadFifo16 (\r
38; IN UINTN Port, // rcx\r
39; IN UINTN Size, // rdx\r
40; IN VOID *Buffer // r8\r
41; );\r
42;------------------------------------------------------------------------------\r
43IoReadFifo16 PROC\r
44 cld\r
45 xchg rcx, rdx\r
46 xchg rdi, r8 ; rdi: buffer address; r8: save rdi\r
47rep insw\r
48 mov rdi, r8 ; restore rdi\r
49 ret\r
50IoReadFifo16 ENDP\r
51\r
52;------------------------------------------------------------------------------\r
53; VOID\r
54; EFIAPI\r
55; IoReadFifo32 (\r
56; IN UINTN Port, // rcx\r
57; IN UINTN Size, // rdx\r
58; IN VOID *Buffer // r8\r
59; );\r
60;------------------------------------------------------------------------------\r
61IoReadFifo32 PROC\r
62 cld\r
63 xchg rcx, rdx\r
64 xchg rdi, r8 ; rdi: buffer address; r8: save rdi\r
65rep insd\r
66 mov rdi, r8 ; restore rdi\r
67 ret\r
68IoReadFifo32 ENDP\r
69\r
70;------------------------------------------------------------------------------\r
71; VOID\r
72; EFIAPI\r
73; IoWriteFifo8 (\r
74; IN UINTN Port, // rcx\r
75; IN UINTN Size, // rdx\r
76; IN VOID *Buffer // r8\r
77; );\r
78;------------------------------------------------------------------------------\r
79IoWriteFifo8 PROC\r
80 cld\r
81 xchg rcx, rdx\r
82 xchg rsi, r8 ; rsi: buffer address; r8: save rsi\r
83rep outsb\r
84 mov rsi, r8 ; restore rsi\r
85 ret\r
86IoWriteFifo8 ENDP\r
87\r
88;------------------------------------------------------------------------------\r
89; VOID\r
90; EFIAPI\r
91; IoWriteFifo16 (\r
92; IN UINTN Port, // rcx\r
93; IN UINTN Size, // rdx\r
94; IN VOID *Buffer // r8\r
95; );\r
96;------------------------------------------------------------------------------\r
97IoWriteFifo16 PROC\r
98 cld\r
99 xchg rcx, rdx\r
100 xchg rsi, r8 ; rsi: buffer address; r8: save rsi\r
101rep outsw\r
102 mov rsi, r8 ; restore rsi\r
103 ret\r
104IoWriteFifo16 ENDP\r
105\r
106;------------------------------------------------------------------------------\r
107; VOID\r
108; EFIAPI\r
109; IoWriteFifo32 (\r
110; IN UINTN Port, // rcx\r
111; IN UINTN Size, // rdx\r
112; IN VOID *Buffer // r8\r
113; );\r
114;------------------------------------------------------------------------------\r
115IoWriteFifo32 PROC\r
116 cld\r
117 xchg rcx, rdx\r
118 xchg rsi, r8 ; rsi: buffer address; r8: save rsi\r
119rep outsd\r
120 mov rsi, r8 ; restore rsi\r
121 ret\r
122IoWriteFifo32 ENDP\r
123\r
124 END\r
125\r