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1 | /** @file\r |
2 | Platform SEC Library for Quark.\r | |
3 | \r | |
4 | Copyright (c) 2013-2015 Intel Corporation.\r | |
5 | \r | |
6 | This program and the accompanying materials\r | |
7 | are licensed and made available under the terms and conditions of the BSD License\r | |
8 | which accompanies this distribution. The full text of the license may be found at\r | |
9 | http://opensource.org/licenses/bsd-license.php\r | |
10 | \r | |
11 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
12 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
13 | \r | |
14 | \r | |
15 | **/\r | |
16 | \r | |
17 | #include <PiPei.h>\r | |
18 | \r | |
19 | #include <Ppi/SecPlatformInformation.h>\r | |
20 | #include <Ppi/TemporaryRamSupport.h>\r | |
21 | #include <Library/PcdLib.h>\r | |
22 | #include <Library/BaseLib.h>\r | |
23 | #include <Library/DebugLib.h>\r | |
24 | #include <Library/BaseMemoryLib.h>\r | |
25 | #include <Library/HobLib.h>\r | |
26 | #include <Library/MtrrLib.h>\r | |
27 | \r | |
28 | /**\r | |
29 | \r | |
30 | Entry point to the C language phase of SEC. After the SEC assembly\r | |
31 | code has initialized some temporary memory and set up the stack,\r | |
32 | the control is transferred to this function.\r | |
33 | \r | |
34 | @param SizeOfRam Size of the temporary memory available for use.\r | |
35 | @param TempRamBase Base address of temporary ram\r | |
36 | @param BootFirmwareVolume Base address of the Boot Firmware Volume.\r | |
37 | \r | |
38 | **/\r | |
39 | VOID\r | |
40 | EFIAPI\r | |
41 | SecStartup (\r | |
42 | IN UINT32 SizeOfRam,\r | |
43 | IN UINT32 TempRamBase,\r | |
44 | IN VOID *BootFirmwareVolume\r | |
45 | );\r | |
46 | \r | |
47 | /**\r | |
48 | Auto-generated function that calls the library constructors for all of the module's\r | |
49 | dependent libraries. This function must be called by the SEC Core once a stack has\r | |
50 | been established.\r | |
51 | \r | |
52 | **/\r | |
53 | VOID\r | |
54 | EFIAPI\r | |
55 | ProcessLibraryConstructorList (\r | |
56 | VOID\r | |
57 | );\r | |
58 | \r | |
59 | /**\r | |
60 | \r | |
61 | Entry point to the C language phase of PlatformSecLib. After the SEC assembly\r | |
62 | code has initialized some temporary memory and set up the stack, control is\r | |
63 | transferred to this function.\r | |
64 | \r | |
65 | **/\r | |
66 | VOID\r | |
67 | EFIAPI\r | |
68 | PlatformSecLibStartup (\r | |
69 | VOID\r | |
70 | )\r | |
71 | {\r | |
72 | //\r | |
73 | // Process all library constructor functions linked to SecCore.\r | |
74 | // This function must be called before any library functions are called\r | |
75 | //\r | |
76 | ProcessLibraryConstructorList ();\r | |
77 | \r | |
78 | //\r | |
79 | // Set write back cache attribute for SPI FLASH\r | |
80 | //\r | |
81 | MtrrSetMemoryAttribute (\r | |
82 | PcdGet32 (PcdFlashAreaBaseAddress),\r | |
83 | PcdGet32 (PcdFlashAreaSize),\r | |
84 | CacheWriteBack\r | |
85 | );\r | |
86 | \r | |
87 | //\r | |
88 | // Set write back cache attribute for 512KB Embedded SRAM\r | |
89 | //\r | |
90 | MtrrSetMemoryAttribute (\r | |
91 | PcdGet32 (PcdEsramStage1Base),\r | |
92 | SIZE_512KB,\r | |
93 | CacheWriteBack\r | |
94 | );\r | |
95 | \r | |
96 | //\r | |
97 | // Pass control to SecCore module passing in the size of the temporary RAM in\r | |
98 | // Embedded SRAM, the base address of the temporary RAM in Embedded SRAM, and\r | |
99 | // the base address of the boot firmware volume. The top 32KB of the 512 KB\r | |
100 | // embedded SRAM are used as temporary RAM.\r | |
101 | //\r | |
102 | SecStartup (\r | |
103 | SIZE_32KB,\r | |
104 | PcdGet32 (PcdEsramStage1Base) + SIZE_512KB - SIZE_32KB,\r | |
105 | (VOID *)(UINTN)PcdGet32 (PcdFlashFvRecoveryBase)\r | |
106 | );\r | |
107 | }\r | |
108 | \r | |
109 | /**\r | |
110 | A developer supplied function to perform platform specific operations.\r | |
111 | \r | |
112 | It's a developer supplied function to perform any operations appropriate to a\r | |
113 | given platform. It's invoked just before passing control to PEI core by SEC\r | |
114 | core. Platform developer may modify the SecCoreData and PPI list that is\r | |
115 | passed to PEI Core.\r | |
116 | \r | |
117 | @param SecCoreData The same parameter as passing to PEI core. It\r | |
118 | could be overridden by this function.\r | |
119 | @param PpiList The default PPI list passed from generic SEC\r | |
120 | part.\r | |
121 | \r | |
122 | @return The final PPI list that platform wishes to passed to PEI core.\r | |
123 | \r | |
124 | **/\r | |
125 | EFI_PEI_PPI_DESCRIPTOR *\r | |
126 | EFIAPI\r | |
127 | SecPlatformMain (\r | |
128 | IN OUT EFI_SEC_PEI_HAND_OFF *SecCoreData,\r | |
129 | IN EFI_PEI_PPI_DESCRIPTOR *PpiList\r | |
130 | )\r | |
131 | {\r | |
132 | return NULL;\r | |
133 | }\r | |
134 | \r | |
135 | /**\r | |
136 | This interface conveys state information out of the Security (SEC) phase into PEI.\r | |
137 | \r | |
138 | @param PeiServices Pointer to the PEI Services Table.\r | |
139 | @param StructureSize Pointer to the variable describing size of the input buffer.\r | |
140 | @param PlatformInformationRecord Pointer to the EFI_SEC_PLATFORM_INFORMATION_RECORD.\r | |
141 | \r | |
142 | @retval EFI_SUCCESS The data was successfully returned.\r | |
143 | @retval EFI_BUFFER_TOO_SMALL The buffer was too small.\r | |
144 | \r | |
145 | **/\r | |
146 | EFI_STATUS\r | |
147 | EFIAPI\r | |
148 | SecPlatformInformation (\r | |
149 | IN CONST EFI_PEI_SERVICES **PeiServices,\r | |
150 | IN OUT UINT64 *StructureSize,\r | |
151 | OUT EFI_SEC_PLATFORM_INFORMATION_RECORD *PlatformInformationRecord\r | |
152 | )\r | |
153 | {\r | |
154 | UINT32 *BIST;\r | |
155 | UINT32 Size;\r | |
156 | UINT32 Count;\r | |
157 | EFI_HOB_GUID_TYPE *GuidHob;\r | |
158 | UINT32 *TopOfStack;\r | |
159 | \r | |
160 | //\r | |
161 | // Top of the stack is the top of the 512KB Embedded SRAM region\r | |
162 | //\r | |
163 | TopOfStack = (UINT32 *)(UINTN)(PcdGet32 (PcdEsramStage1Base) + SIZE_512KB);\r | |
164 | \r | |
165 | GuidHob = GetFirstGuidHob (&gEfiSecPlatformInformationPpiGuid);\r | |
166 | if (GuidHob != NULL) {\r | |
167 | Size = GET_GUID_HOB_DATA_SIZE (GuidHob);\r | |
168 | BIST = GET_GUID_HOB_DATA (GuidHob);\r | |
169 | } else {\r | |
170 | //\r | |
171 | // The entries of BIST information, together with the number of them,\r | |
172 | // reside in the bottom of stack, left untouched by normal stack operation.\r | |
173 | // This routine copies the BIST information to the buffer pointed by\r | |
174 | // PlatformInformationRecord for output.\r | |
175 | //\r | |
176 | Count = *(TopOfStack - 1);\r | |
177 | Size = Count * sizeof (IA32_HANDOFF_STATUS);\r | |
178 | BIST = (UINT32 *) ((UINT32) TopOfStack - sizeof (UINT32) - Size);\r | |
179 | \r | |
180 | //\r | |
181 | // Copy Data from Stack to Hob to avoid data is lost after memory is ready.\r | |
182 | //\r | |
183 | BuildGuidDataHob (\r | |
184 | &gEfiSecPlatformInformationPpiGuid,\r | |
185 | BIST,\r | |
186 | (UINTN)Size\r | |
187 | );\r | |
188 | GuidHob = GetFirstGuidHob (&gEfiSecPlatformInformationPpiGuid);\r | |
189 | Size = GET_GUID_HOB_DATA_SIZE (GuidHob);\r | |
190 | BIST = GET_GUID_HOB_DATA (GuidHob);\r | |
191 | }\r | |
192 | \r | |
193 | if ((*StructureSize) < (UINT64) Size) {\r | |
194 | *StructureSize = Size;\r | |
195 | return EFI_BUFFER_TOO_SMALL;\r | |
196 | }\r | |
197 | \r | |
198 | *StructureSize = Size;\r | |
199 | CopyMem (PlatformInformationRecord, BIST, Size);\r | |
200 | \r | |
201 | return EFI_SUCCESS;\r | |
202 | }\r | |
203 | \r | |
204 | /**\r | |
205 | This interface disables temporary memory in SEC Phase.\r | |
206 | **/\r | |
207 | VOID\r | |
208 | EFIAPI\r | |
209 | SecPlatformDisableTemporaryMemory (\r | |
210 | VOID\r | |
211 | )\r | |
212 | {\r | |
213 | }\r |