[mirror_edk2.git] / QuarkPlatformPkg / Pci / Dxe / PciHostBridge / PciHostBridge.h

/** @file\r
The Header file of the Pci Host Bridge Driver.\r
\r
Copyright (c) 2013-2015 Intel Corporation.\r
\r
SPDX-License-Identifier: BSD-2-Clause-Patent\r
\r
\r
**/\r
\r
#ifndef _PCI_HOST_BRIDGE_H_\r
#define _PCI_HOST_BRIDGE_H_\r
\r
\r
#include <PiDxe.h>\r
#include <IndustryStandard/Acpi.h>\r
#include <IndustryStandard/Pci.h>\r
#include <PciRootBridge.h>\r
#include <Library/UefiDriverEntryPoint.h>\r
#include <IndustryStandard/Pci22.h>\r
#include <Library/UefiLib.h>\r
#include <Guid/HobList.h>\r
#include <Library/UefiRuntimeServicesTableLib.h>\r
#include <Protocol/PciHostBridgeResourceAllocation.h>\r
\r
#define PCI_HOST_BRIDGE_SIGNATURE SIGNATURE_32 ('e', 'h', 's', 't')\r
typedef struct {\r
  UINTN                                             Signature;\r
  EFI_HANDLE                                        HostBridgeHandle;\r
  UINTN                                             RootBridgeCount;\r
  EFI_LIST_ENTRY                                    Head;\r
  BOOLEAN                                           ResourceSubmited;\r
  BOOLEAN                                           CanRestarted;\r
  EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL  ResAlloc;\r
} PCI_HOST_BRIDGE_INSTANCE;\r
\r
#define INSTANCE_FROM_RESOURCE_ALLOCATION_THIS(a) CR (a, PCI_HOST_BRIDGE_INSTANCE, ResAlloc, PCI_HOST_BRIDGE_SIGNATURE)\r
\r
typedef enum {\r
  SocketResourceRatioChanged,\r
  SocketResourceRatioNotChanged,\r
  SocketResourceAdjustMax\r
} SOCKET_RESOURCE_ADJUSTMENT_RESULT;\r
\r
//\r
// Driver Entry Point\r
//\r
EFI_STATUS\r
EFIAPI\r
InitializePciHostBridge (\r
  IN EFI_HANDLE         ImageHandle,\r
  IN EFI_SYSTEM_TABLE   *SystemTable\r
  )\r
/*++\r
\r
Routine Description:\r
\r
  Entry point of this driver.\r
\r
Arguments:\r
\r
  ImageHandle  -  Image handle of this driver.\r
  SystemTable  -  Pointer to standard EFI system table.\r
\r
Returns:\r
\r
  EFI_SUCCESS       -  Succeed.\r
  EFI_DEVICE_ERROR  -  Fail to install PCI_ROOT_BRIDGE_IO protocol.\r
\r
--*/\r
;\r
\r
//\r
//  HostBridge Resource Allocation interface\r
//\r
EFI_STATUS\r
EFIAPI\r
NotifyPhase (\r
  IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL   *This,\r
  IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE      Phase\r
  )\r
/*++\r
\r
Routine Description:\r
\r
  Enter a certain phase of the PCI enumeration process.\r
\r
Arguments:\r
\r
  This   -  The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL instance.\r
  Phase  -  The phase during enumeration.\r
\r
Returns:\r
\r
  EFI_SUCCESS            -  Succeed.\r
  EFI_INVALID_PARAMETER  -  Wrong phase parameter passed in.\r
  EFI_NOT_READY          -  Resources have not been submitted yet.\r
\r
--*/\r
;\r
\r
EFI_STATUS\r
EFIAPI\r
GetNextRootBridge (\r
  IN     EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,\r
  IN OUT EFI_HANDLE                                       *RootBridgeHandle\r
  )\r
/*++\r
\r
Routine Description:\r
\r
  Return the device handle of the next PCI root bridge that is associated with\r
  this Host Bridge.\r
\r
Arguments:\r
\r
  This              - The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ PROTOCOL instance.\r
  RootBridgeHandle  -  Returns the device handle of the next PCI Root Bridge.\r
                       On input, it holds the RootBridgeHandle returned by the most\r
                       recent call to GetNextRootBridge().The handle for the first\r
                       PCI Root Bridge is returned if RootBridgeHandle is NULL on input.\r
\r
Returns:\r
\r
  EFI_SUCCESS            -  Succeed.\r
  EFI_NOT_FOUND          -  Next PCI root bridge not found.\r
  EFI_INVALID_PARAMETER  -  Wrong parameter passed in.\r
\r
--*/\r
;\r
\r
EFI_STATUS\r
EFIAPI\r
GetAttributes (\r
  IN  EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,\r
  IN  EFI_HANDLE                                       RootBridgeHandle,\r
  OUT UINT64                                           *Attributes\r
  )\r
/*++\r
\r
Routine Description:\r
\r
  Returns the attributes of a PCI Root Bridge.\r
\r
Arguments:\r
\r
  This              -  The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ PROTOCOL instance\r
  RootBridgeHandle  -  The device handle of the PCI Root Bridge\r
                       that the caller is interested in\r
  Attributes        -  The pointer to attributes of the PCI Root Bridge\r
\r
Returns:\r
\r
  EFI_SUCCESS            -  Succeed.\r
  EFI_INVALID_PARAMETER  -  Attributes parameter passed in is NULL or\r
                            RootBridgeHandle is not an EFI_HANDLE\r
                            that was returned on a previous call to\r
                            GetNextRootBridge().\r
\r
--*/\r
;\r
\r
EFI_STATUS\r
EFIAPI\r
StartBusEnumeration (\r
  IN  EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,\r
  IN  EFI_HANDLE                                       RootBridgeHandle,\r
  OUT VOID                                             **Configuration\r
  )\r
/*++\r
\r
Routine Description:\r
\r
  This is the request from the PCI enumerator to set up\r
  the specified PCI Root Bridge for bus enumeration process.\r
\r
Arguments:\r
\r
  This              -  The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ PROTOCOL instance.\r
  RootBridgeHandle  -  The PCI Root Bridge to be set up.\r
  Configuration     -  Pointer to the pointer to the PCI bus resource descriptor.\r
\r
Returns:\r
\r
  EFI_SUCCESS            -  Succeed.\r
  EFI_OUT_OF_RESOURCES   -  Not enough pool to be allocated.\r
  EFI_INVALID_PARAMETER  -  RootBridgeHandle is not a valid handle.\r
\r
--*/\r
;\r
\r
EFI_STATUS\r
EFIAPI\r
SetBusNumbers (\r
  IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,\r
  IN EFI_HANDLE                                       RootBridgeHandle,\r
  IN VOID                                             *Configuration\r
  )\r
/*++\r
\r
Routine Description:\r
\r
  This function programs the PCI Root Bridge hardware so that\r
  it decodes the specified PCI bus range.\r
\r
Arguments:\r
\r
  This              -  The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ PROTOCOL instance.\r
  RootBridgeHandle  -  The PCI Root Bridge whose bus range is to be programmed.\r
  Configuration     -  The pointer to the PCI bus resource descriptor.\r
\r
Returns:\r
\r
  EFI_SUCCESS            -  Succeed.\r
  EFI_INVALID_PARAMETER  -  Wrong parameters passed in.\r
\r
--*/\r
;\r
\r
EFI_STATUS\r
EFIAPI\r
SubmitResources (\r
  IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,\r
  IN EFI_HANDLE                                       RootBridgeHandle,\r
  IN VOID                                             *Configuration\r
  )\r
/*++\r
\r
Routine Description:\r
\r
  Submits the I/O and memory resource requirements for the specified PCI Root Bridge.\r
\r
Arguments:\r
\r
  This              -  The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ PROTOCOL instance\r
  RootBridgeHandle  -  The PCI Root Bridge whose I/O and memory resource requirements\r
                       are being submitted\r
  Configuration     -  The pointer to the PCI I/O and PCI memory resource descriptor\r
\r
Returns:\r
\r
  EFI_SUCCESS            -  Succeed.\r
  EFI_INVALID_PARAMETER  -  Wrong parameters passed in.\r
\r
--*/\r
;\r
\r
EFI_STATUS\r
EFIAPI\r
GetProposedResources (\r
  IN  EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,\r
  IN  EFI_HANDLE                                       RootBridgeHandle,\r
  OUT VOID                                             **Configuration\r
  )\r
/*++\r
\r
Routine Description:\r
\r
  This function returns the proposed resource settings for the specified\r
  PCI Root Bridge.\r
\r
Arguments:\r
\r
  This              -  The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ PROTOCOL instance.\r
  RootBridgeHandle  -  The PCI Root Bridge handle.\r
  Configuration     -  The pointer to the pointer to the PCI I/O\r
                       and memory resource descriptor.\r
\r
Returns:\r
\r
  EFI_SUCCESS            -  Succeed.\r
  EFI_OUT_OF_RESOURCES   -  Not enough pool to be allocated.\r
  EFI_INVALID_PARAMETER  -  RootBridgeHandle is not a valid handle.\r
\r
--*/\r
;\r
\r
EFI_STATUS\r
EFIAPI\r
PreprocessController (\r
  IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL          *This,\r
  IN EFI_HANDLE                                                RootBridgeHandle,\r
  IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS               PciAddress,\r
  IN EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE              Phase\r
  )\r
/*++\r
\r
Routine Description:\r
\r
  This function is called for all the PCI controllers that the PCI\r
  bus driver finds. Can be used to Preprogram the controller.\r
\r
Arguments:\r
\r
  This              -  The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ PROTOCOL instance.\r
  RootBridgeHandle  -  The PCI Root Bridge handle.\r
  PciAddress        -  Address of the controller on the PCI bus.\r
  Phase             -  The Phase during resource allocation.\r
\r
Returns:\r
\r
  EFI_SUCCESS            -  Succeed.\r
  EFI_INVALID_PARAMETER  -  RootBridgeHandle is not a valid handle.\r
\r
--*/\r
;\r
\r
//\r
// Host Bridge Silicon specific hooks\r
//\r
UINT64\r
GetAllocAttributes (\r
  IN  UINTN        RootBridgeIndex\r
  )\r
/*++\r
\r
Routine Description:\r
\r
  Returns the Allocation attributes for the BNB Root Bridge.\r
\r
Arguments:\r
\r
  RootBridgeIndex  -  The root bridge number. 0 based.\r
\r
Returns:\r
\r
  EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM | EFI_PCI_HOST_BRIDGE_MEM64_DECODE\r
\r
--*/\r
;\r
\r
EFI_STATUS\r
GetHostBridgeMemApertures (\r
  IN  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL               *PciRootBridgeIo,\r
  OUT UINT32                                        *Mem32Base,\r
  OUT UINT32                                        *Mem32Limit,\r
  OUT UINT64                                        *Mem64Base,\r
  OUT UINT64                                        *Mem64Limit\r
  )\r
/*++\r
\r
Routine Description:\r
\r
  Returns memory apertures for the BNB Root Bridge.\r
\r
Arguments:\r
\r
  PciRootBridgeIo  -  Pointer to Efi Pci root bridge Io protocol interface instance.\r
  Mem32Base        -  Pointer to 32 bit memory base. This is the lowest 32 bit memory address\r
                      that is decoded by the Host Bridge.\r
  Mem32Limit       -  Pointer to 32 bit memory limit.This is the highest 32 bit memory address\r
                      that is decoded by the Host Bridge. The size of the 32 bit window is\r
                      (Mem32Limit - Mem32base + 1).\r
  Mem64Base        -  Pointer to 64 bit memory base. This is the lowest 64 bit memory address\r
                      that is decoded by the Host Bridge.\r
  Mem64Limit       -  Pointer to 64 bit memory limit.This is the highest 64 bit memory address\r
                      that is decoded by the Host Bridge. The size of the 64 bit window is\r
                      (Mem64Limit - Mem64base + 1). Set Mem64Limit < Mem64Base if the host bridge\r
                      does not support 64 bit memory addresses.\r
\r
Returns:\r
\r
  EFI_SUCCESS  -  Success.\r
\r
--*/\r
;\r
\r
UINT64\r
Power2MaxMemory (\r
  IN UINT64         MemoryLength\r
  )\r
/*++\r
\r
Routine Description:\r
\r
  Calculate maximum memory length that can be fit to a mtrr.\r
\r
Arguments:\r
\r
  MemoryLength  -  Input memory length.\r
\r
Returns:\r
\r
  Returned Maximum length.\r
\r
--*/\r
;\r
\r
#endif\r
Commit	Line	Data
b303605e MK	1	/** @file\r
	2	The Header file of the Pci Host Bridge Driver.\r
	3	\r
	4	Copyright (c) 2013-2015 Intel Corporation.\r
	5	\r
0eb3de2e	6	SPDX-License-Identifier: BSD-2-Clause-Patent\r
b303605e MK	7	\r
	8	\r
	9	**/\r
	10	\r
	11	#ifndef _PCI_HOST_BRIDGE_H_\r
	12	#define _PCI_HOST_BRIDGE_H_\r
	13	\r
	14	\r
	15	#include <PiDxe.h>\r
	16	#include <IndustryStandard/Acpi.h>\r
	17	#include <IndustryStandard/Pci.h>\r
	18	#include <PciRootBridge.h>\r
	19	#include <Library/UefiDriverEntryPoint.h>\r
	20	#include <IndustryStandard/Pci22.h>\r
	21	#include <Library/UefiLib.h>\r
	22	#include <Guid/HobList.h>\r
	23	#include <Library/UefiRuntimeServicesTableLib.h>\r
	24	#include <Protocol/PciHostBridgeResourceAllocation.h>\r
	25	\r
	26	#define PCI_HOST_BRIDGE_SIGNATURE SIGNATURE_32 ('e', 'h', 's', 't')\r
	27	typedef struct {\r
	28	UINTN Signature;\r
	29	EFI_HANDLE HostBridgeHandle;\r
	30	UINTN RootBridgeCount;\r
	31	EFI_LIST_ENTRY Head;\r
	32	BOOLEAN ResourceSubmited;\r
	33	BOOLEAN CanRestarted;\r
	34	EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL ResAlloc;\r
	35	} PCI_HOST_BRIDGE_INSTANCE;\r
	36	\r
	37	#define INSTANCE_FROM_RESOURCE_ALLOCATION_THIS(a) CR (a, PCI_HOST_BRIDGE_INSTANCE, ResAlloc, PCI_HOST_BRIDGE_SIGNATURE)\r
	38	\r
	39	typedef enum {\r
	40	SocketResourceRatioChanged,\r
	41	SocketResourceRatioNotChanged,\r
	42	SocketResourceAdjustMax\r
	43	} SOCKET_RESOURCE_ADJUSTMENT_RESULT;\r
	44	\r
	45	//\r
	46	// Driver Entry Point\r
	47	//\r
	48	EFI_STATUS\r
	49	EFIAPI\r
	50	InitializePciHostBridge (\r
	51	IN EFI_HANDLE ImageHandle,\r
	52	IN EFI_SYSTEM_TABLE *SystemTable\r
	53	)\r
	54	/*++\r
	55	\r
	56	Routine Description:\r
	57	\r
	58	Entry point of this driver.\r
	59	\r
	60	Arguments:\r
	61	\r
	62	ImageHandle - Image handle of this driver.\r
	63	SystemTable - Pointer to standard EFI system table.\r
	64	\r
	65	Returns:\r
	66	\r
	67	EFI_SUCCESS - Succeed.\r
	68	EFI_DEVICE_ERROR - Fail to install PCI_ROOT_BRIDGE_IO protocol.\r
	69	\r
	70	--*/\r
71	;\r
72	\r
73	//\r
74	// HostBridge Resource Allocation interface\r
75	//\r
76	EFI_STATUS\r
77	EFIAPI\r
78	NotifyPhase (\r
79	IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,\r
80	IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE Phase\r
81	)\r
82	/*++\r
83	\r
84	Routine Description:\r
85	\r
86	Enter a certain phase of the PCI enumeration process.\r
87	\r
88	Arguments:\r
89	\r
90	This - The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL instance.\r
91	Phase - The phase during enumeration.\r
92	\r
93	Returns:\r
94	\r
95	EFI_SUCCESS - Succeed.\r
96	EFI_INVALID_PARAMETER - Wrong phase parameter passed in.\r
97	EFI_NOT_READY - Resources have not been submitted yet.\r
98	\r
99	--*/\r
100	;\r
101	\r
102	EFI_STATUS\r
103	EFIAPI\r
104	GetNextRootBridge (\r
105	IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,\r
106	IN OUT EFI_HANDLE *RootBridgeHandle\r
107	)\r
108	/*++\r
109	\r
110	Routine Description:\r
111	\r
112	Return the device handle of the next PCI root bridge that is associated with\r
113	this Host Bridge.\r
114	\r
115	Arguments:\r
116	\r
117	This - The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ PROTOCOL instance.\r
118	RootBridgeHandle - Returns the device handle of the next PCI Root Bridge.\r
119	On input, it holds the RootBridgeHandle returned by the most\r
120	recent call to GetNextRootBridge().The handle for the first\r
121	PCI Root Bridge is returned if RootBridgeHandle is NULL on input.\r
122	\r
123	Returns:\r
124	\r
125	EFI_SUCCESS - Succeed.\r
126	EFI_NOT_FOUND - Next PCI root bridge not found.\r
127	EFI_INVALID_PARAMETER - Wrong parameter passed in.\r
128	\r
129	--*/\r
130	;\r
131	\r
132	EFI_STATUS\r
133	EFIAPI\r
134	GetAttributes (\r
135	IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,\r
136	IN EFI_HANDLE RootBridgeHandle,\r
137	OUT UINT64 *Attributes\r
138	)\r
139	/*++\r
140	\r
141	Routine Description:\r
142	\r
143	Returns the attributes of a PCI Root Bridge.\r
144	\r
145	Arguments:\r
146	\r
147	This - The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ PROTOCOL instance\r
148	RootBridgeHandle - The device handle of the PCI Root Bridge\r
149	that the caller is interested in\r
150	Attributes - The pointer to attributes of the PCI Root Bridge\r
151	\r
152	Returns:\r
153	\r
154	EFI_SUCCESS - Succeed.\r
155	EFI_INVALID_PARAMETER - Attributes parameter passed in is NULL or\r
156	RootBridgeHandle is not an EFI_HANDLE\r
157	that was returned on a previous call to\r
158	GetNextRootBridge().\r
159	\r
160	--*/\r
161	;\r
162	\r
163	EFI_STATUS\r
164	EFIAPI\r
165	StartBusEnumeration (\r
166	IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,\r
167	IN EFI_HANDLE RootBridgeHandle,\r
168	OUT VOID **Configuration\r
169	)\r
170	/*++\r
171	\r
172	Routine Description:\r
173	\r
174	This is the request from the PCI enumerator to set up\r
175	the specified PCI Root Bridge for bus enumeration process.\r
176	\r
177	Arguments:\r
178	\r
179	This - The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ PROTOCOL instance.\r
180	RootBridgeHandle - The PCI Root Bridge to be set up.\r
181	Configuration - Pointer to the pointer to the PCI bus resource descriptor.\r
182	\r
183	Returns:\r
184	\r
185	EFI_SUCCESS - Succeed.\r
186	EFI_OUT_OF_RESOURCES - Not enough pool to be allocated.\r
187	EFI_INVALID_PARAMETER - RootBridgeHandle is not a valid handle.\r
188	\r
189	--*/\r
190	;\r
191	\r
192	EFI_STATUS\r
193	EFIAPI\r
194	SetBusNumbers (\r
195	IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,\r
196	IN EFI_HANDLE RootBridgeHandle,\r
197	IN VOID *Configuration\r
198	)\r
199	/*++\r
200	\r
201	Routine Description:\r
202	\r
203	This function programs the PCI Root Bridge hardware so that\r
204	it decodes the specified PCI bus range.\r
205	\r
206	Arguments:\r
207	\r
208	This - The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ PROTOCOL instance.\r
209	RootBridgeHandle - The PCI Root Bridge whose bus range is to be programmed.\r
210	Configuration - The pointer to the PCI bus resource descriptor.\r
211	\r
212	Returns:\r
213	\r
214	EFI_SUCCESS - Succeed.\r
215	EFI_INVALID_PARAMETER - Wrong parameters passed in.\r
216	\r
217	--*/\r
218	;\r
219	\r
220	EFI_STATUS\r
221	EFIAPI\r
222	SubmitResources (\r
223	IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,\r
224	IN EFI_HANDLE RootBridgeHandle,\r
225	IN VOID *Configuration\r
226	)\r
227	/*++\r
228	\r
229	Routine Description:\r
230	\r
231	Submits the I/O and memory resource requirements for the specified PCI Root Bridge.\r
232	\r
233	Arguments:\r
234	\r
235	This - The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ PROTOCOL instance\r
236	RootBridgeHandle - The PCI Root Bridge whose I/O and memory resource requirements\r
237	are being submitted\r
238	Configuration - The pointer to the PCI I/O and PCI memory resource descriptor\r
239	\r
240	Returns:\r
241	\r
242	EFI_SUCCESS - Succeed.\r
243	EFI_INVALID_PARAMETER - Wrong parameters passed in.\r
244	\r
245	--*/\r
246	;\r
247	\r
248	EFI_STATUS\r
249	EFIAPI\r
250	GetProposedResources (\r
251	IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,\r
252	IN EFI_HANDLE RootBridgeHandle,\r
253	OUT VOID **Configuration\r
254	)\r
255	/*++\r
256	\r
257	Routine Description:\r
258	\r
259	This function returns the proposed resource settings for the specified\r
260	PCI Root Bridge.\r
261	\r
262	Arguments:\r
263	\r
264	This - The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ PROTOCOL instance.\r
265	RootBridgeHandle - The PCI Root Bridge handle.\r
266	Configuration - The pointer to the pointer to the PCI I/O\r
267	and memory resource descriptor.\r
268	\r
269	Returns:\r
270	\r
271	EFI_SUCCESS - Succeed.\r
272	EFI_OUT_OF_RESOURCES - Not enough pool to be allocated.\r
273	EFI_INVALID_PARAMETER - RootBridgeHandle is not a valid handle.\r
274	\r
275	--*/\r
276	;\r
277	\r
278	EFI_STATUS\r
279	EFIAPI\r
280	PreprocessController (\r
281	IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,\r
282	IN EFI_HANDLE RootBridgeHandle,\r
283	IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS PciAddress,\r
284	IN EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE Phase\r
285	)\r
286	/*++\r
287	\r
288	Routine Description:\r
289	\r
290	This function is called for all the PCI controllers that the PCI\r
291	bus driver finds. Can be used to Preprogram the controller.\r
292	\r
293	Arguments:\r
294	\r
295	This - The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ PROTOCOL instance.\r
296	RootBridgeHandle - The PCI Root Bridge handle.\r
297	PciAddress - Address of the controller on the PCI bus.\r
298	Phase - The Phase during resource allocation.\r
299	\r
300	Returns:\r
301	\r
302	EFI_SUCCESS - Succeed.\r
303	EFI_INVALID_PARAMETER - RootBridgeHandle is not a valid handle.\r
304	\r
305	--*/\r
306	;\r
307	\r
308	//\r
309	// Host Bridge Silicon specific hooks\r
310	//\r
311	UINT64\r
312	GetAllocAttributes (\r
313	IN UINTN RootBridgeIndex\r
314	)\r
315	/*++\r
316	\r
317	Routine Description:\r
318	\r
319	Returns the Allocation attributes for the BNB Root Bridge.\r
320	\r
321	Arguments:\r
322	\r
323	RootBridgeIndex - The root bridge number. 0 based.\r
324	\r
325	Returns:\r
326	\r
327	EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM \| EFI_PCI_HOST_BRIDGE_MEM64_DECODE\r
328	\r
329	--*/\r
330	;\r
331	\r
332	EFI_STATUS\r
333	GetHostBridgeMemApertures (\r
334	IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo,\r
335	OUT UINT32 *Mem32Base,\r
336	OUT UINT32 *Mem32Limit,\r
337	OUT UINT64 *Mem64Base,\r
338	OUT UINT64 *Mem64Limit\r
339	)\r
340	/*++\r
341	\r
342	Routine Description:\r
343	\r
344	Returns memory apertures for the BNB Root Bridge.\r
345	\r
346	Arguments:\r
347	\r
348	PciRootBridgeIo - Pointer to Efi Pci root bridge Io protocol interface instance.\r
349	Mem32Base - Pointer to 32 bit memory base. This is the lowest 32 bit memory address\r
350	that is decoded by the Host Bridge.\r
351	Mem32Limit - Pointer to 32 bit memory limit.This is the highest 32 bit memory address\r
352	that is decoded by the Host Bridge. The size of the 32 bit window is\r
353	(Mem32Limit - Mem32base + 1).\r
354	Mem64Base - Pointer to 64 bit memory base. This is the lowest 64 bit memory address\r
355	that is decoded by the Host Bridge.\r
356	Mem64Limit - Pointer to 64 bit memory limit.This is the highest 64 bit memory address\r
357	that is decoded by the Host Bridge. The size of the 64 bit window is\r
358	(Mem64Limit - Mem64base + 1). Set Mem64Limit < Mem64Base if the host bridge\r
359	does not support 64 bit memory addresses.\r
360	\r
361	Returns:\r
362	\r
363	EFI_SUCCESS - Success.\r
364	\r
365	--*/\r
366	;\r
367	\r
368	UINT64\r
369	Power2MaxMemory (\r
370	IN UINT64 MemoryLength\r
371	)\r
372	/*++\r
373	\r
374	Routine Description:\r
375	\r
376	Calculate maximum memory length that can be fit to a mtrr.\r
377	\r
378	Arguments:\r
379	\r
380	MemoryLength - Input memory length.\r
381	\r
382	Returns:\r
383	\r
384	Returned Maximum length.\r
385	\r
386	--*/\r
387	;\r
388	\r
389	#endif\r