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1/** @file\r
2The Header file of the Pci Host Bridge Driver.\r
3\r
4Copyright (c) 2013-2015 Intel Corporation.\r
5\r
6This program and the accompanying materials\r
7are licensed and made available under the terms and conditions of the BSD License\r
8which accompanies this distribution. The full text of the license may be found at\r
9http://opensource.org/licenses/bsd-license.php\r
10\r
11THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
12WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
13\r
14\r
15**/\r
16\r
17#ifndef _PCI_HOST_BRIDGE_H_\r
18#define _PCI_HOST_BRIDGE_H_\r
19\r
20\r
21#include <PiDxe.h>\r
22#include <IndustryStandard/Acpi.h>\r
23#include <IndustryStandard/Pci.h>\r
24#include <PciRootBridge.h>\r
25#include <Library/UefiDriverEntryPoint.h>\r
26#include <IndustryStandard/Pci22.h>\r
27#include <Library/UefiLib.h>\r
28#include <Guid/HobList.h>\r
29#include <Library/UefiRuntimeServicesTableLib.h>\r
30#include <Protocol/PciHostBridgeResourceAllocation.h>\r
31\r
32#define PCI_HOST_BRIDGE_SIGNATURE SIGNATURE_32 ('e', 'h', 's', 't')\r
33typedef struct {\r
34 UINTN Signature;\r
35 EFI_HANDLE HostBridgeHandle;\r
36 UINTN RootBridgeCount;\r
37 EFI_LIST_ENTRY Head;\r
38 BOOLEAN ResourceSubmited;\r
39 BOOLEAN CanRestarted;\r
40 EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL ResAlloc;\r
41} PCI_HOST_BRIDGE_INSTANCE;\r
42\r
43#define INSTANCE_FROM_RESOURCE_ALLOCATION_THIS(a) CR (a, PCI_HOST_BRIDGE_INSTANCE, ResAlloc, PCI_HOST_BRIDGE_SIGNATURE)\r
44\r
45typedef enum {\r
46 SocketResourceRatioChanged,\r
47 SocketResourceRatioNotChanged,\r
48 SocketResourceAdjustMax\r
49} SOCKET_RESOURCE_ADJUSTMENT_RESULT;\r
50\r
51//\r
52// Driver Entry Point\r
53//\r
54EFI_STATUS\r
55EFIAPI\r
56InitializePciHostBridge (\r
57 IN EFI_HANDLE ImageHandle,\r
58 IN EFI_SYSTEM_TABLE *SystemTable\r
59 )\r
60/*++\r
61\r
62Routine Description:\r
63\r
64 Entry point of this driver.\r
65\r
66Arguments:\r
67\r
68 ImageHandle - Image handle of this driver.\r
69 SystemTable - Pointer to standard EFI system table.\r
70\r
71Returns:\r
72\r
73 EFI_SUCCESS - Succeed.\r
74 EFI_DEVICE_ERROR - Fail to install PCI_ROOT_BRIDGE_IO protocol.\r
75\r
76--*/\r
77;\r
78\r
79//\r
80// HostBridge Resource Allocation interface\r
81//\r
82EFI_STATUS\r
83EFIAPI\r
84NotifyPhase (\r
85 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,\r
86 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE Phase\r
87 )\r
88/*++\r
89\r
90Routine Description:\r
91\r
92 Enter a certain phase of the PCI enumeration process.\r
93\r
94Arguments:\r
95\r
96 This - The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL instance.\r
97 Phase - The phase during enumeration.\r
98\r
99Returns:\r
100\r
101 EFI_SUCCESS - Succeed.\r
102 EFI_INVALID_PARAMETER - Wrong phase parameter passed in.\r
103 EFI_NOT_READY - Resources have not been submitted yet.\r
104\r
105--*/\r
106;\r
107\r
108EFI_STATUS\r
109EFIAPI\r
110GetNextRootBridge (\r
111 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,\r
112 IN OUT EFI_HANDLE *RootBridgeHandle\r
113 )\r
114/*++\r
115\r
116Routine Description:\r
117\r
118 Return the device handle of the next PCI root bridge that is associated with\r
119 this Host Bridge.\r
120\r
121Arguments:\r
122\r
123 This - The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ PROTOCOL instance.\r
124 RootBridgeHandle - Returns the device handle of the next PCI Root Bridge.\r
125 On input, it holds the RootBridgeHandle returned by the most\r
126 recent call to GetNextRootBridge().The handle for the first\r
127 PCI Root Bridge is returned if RootBridgeHandle is NULL on input.\r
128\r
129Returns:\r
130\r
131 EFI_SUCCESS - Succeed.\r
132 EFI_NOT_FOUND - Next PCI root bridge not found.\r
133 EFI_INVALID_PARAMETER - Wrong parameter passed in.\r
134\r
135--*/\r
136;\r
137\r
138EFI_STATUS\r
139EFIAPI\r
140GetAttributes (\r
141 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,\r
142 IN EFI_HANDLE RootBridgeHandle,\r
143 OUT UINT64 *Attributes\r
144 )\r
145/*++\r
146\r
147Routine Description:\r
148\r
149 Returns the attributes of a PCI Root Bridge.\r
150\r
151Arguments:\r
152\r
153 This - The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ PROTOCOL instance\r
154 RootBridgeHandle - The device handle of the PCI Root Bridge\r
155 that the caller is interested in\r
156 Attributes - The pointer to attributes of the PCI Root Bridge\r
157\r
158Returns:\r
159\r
160 EFI_SUCCESS - Succeed.\r
161 EFI_INVALID_PARAMETER - Attributes parameter passed in is NULL or\r
162 RootBridgeHandle is not an EFI_HANDLE\r
163 that was returned on a previous call to\r
164 GetNextRootBridge().\r
165\r
166--*/\r
167;\r
168\r
169EFI_STATUS\r
170EFIAPI\r
171StartBusEnumeration (\r
172 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,\r
173 IN EFI_HANDLE RootBridgeHandle,\r
174 OUT VOID **Configuration\r
175 )\r
176/*++\r
177\r
178Routine Description:\r
179\r
180 This is the request from the PCI enumerator to set up\r
181 the specified PCI Root Bridge for bus enumeration process.\r
182\r
183Arguments:\r
184\r
185 This - The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ PROTOCOL instance.\r
186 RootBridgeHandle - The PCI Root Bridge to be set up.\r
187 Configuration - Pointer to the pointer to the PCI bus resource descriptor.\r
188\r
189Returns:\r
190\r
191 EFI_SUCCESS - Succeed.\r
192 EFI_OUT_OF_RESOURCES - Not enough pool to be allocated.\r
193 EFI_INVALID_PARAMETER - RootBridgeHandle is not a valid handle.\r
194\r
195--*/\r
196;\r
197\r
198EFI_STATUS\r
199EFIAPI\r
200SetBusNumbers (\r
201 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,\r
202 IN EFI_HANDLE RootBridgeHandle,\r
203 IN VOID *Configuration\r
204 )\r
205/*++\r
206\r
207Routine Description:\r
208\r
209 This function programs the PCI Root Bridge hardware so that\r
210 it decodes the specified PCI bus range.\r
211\r
212Arguments:\r
213\r
214 This - The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ PROTOCOL instance.\r
215 RootBridgeHandle - The PCI Root Bridge whose bus range is to be programmed.\r
216 Configuration - The pointer to the PCI bus resource descriptor.\r
217\r
218Returns:\r
219\r
220 EFI_SUCCESS - Succeed.\r
221 EFI_INVALID_PARAMETER - Wrong parameters passed in.\r
222\r
223--*/\r
224;\r
225\r
226EFI_STATUS\r
227EFIAPI\r
228SubmitResources (\r
229 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,\r
230 IN EFI_HANDLE RootBridgeHandle,\r
231 IN VOID *Configuration\r
232 )\r
233/*++\r
234\r
235Routine Description:\r
236\r
237 Submits the I/O and memory resource requirements for the specified PCI Root Bridge.\r
238\r
239Arguments:\r
240\r
241 This - The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ PROTOCOL instance\r
242 RootBridgeHandle - The PCI Root Bridge whose I/O and memory resource requirements\r
243 are being submitted\r
244 Configuration - The pointer to the PCI I/O and PCI memory resource descriptor\r
245\r
246Returns:\r
247\r
248 EFI_SUCCESS - Succeed.\r
249 EFI_INVALID_PARAMETER - Wrong parameters passed in.\r
250\r
251--*/\r
252;\r
253\r
254EFI_STATUS\r
255EFIAPI\r
256GetProposedResources (\r
257 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,\r
258 IN EFI_HANDLE RootBridgeHandle,\r
259 OUT VOID **Configuration\r
260 )\r
261/*++\r
262\r
263Routine Description:\r
264\r
265 This function returns the proposed resource settings for the specified\r
266 PCI Root Bridge.\r
267\r
268Arguments:\r
269\r
270 This - The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ PROTOCOL instance.\r
271 RootBridgeHandle - The PCI Root Bridge handle.\r
272 Configuration - The pointer to the pointer to the PCI I/O\r
273 and memory resource descriptor.\r
274\r
275Returns:\r
276\r
277 EFI_SUCCESS - Succeed.\r
278 EFI_OUT_OF_RESOURCES - Not enough pool to be allocated.\r
279 EFI_INVALID_PARAMETER - RootBridgeHandle is not a valid handle.\r
280\r
281--*/\r
282;\r
283\r
284EFI_STATUS\r
285EFIAPI\r
286PreprocessController (\r
287 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,\r
288 IN EFI_HANDLE RootBridgeHandle,\r
289 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS PciAddress,\r
290 IN EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE Phase\r
291 )\r
292/*++\r
293\r
294Routine Description:\r
295\r
296 This function is called for all the PCI controllers that the PCI\r
297 bus driver finds. Can be used to Preprogram the controller.\r
298\r
299Arguments:\r
300\r
301 This - The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ PROTOCOL instance.\r
302 RootBridgeHandle - The PCI Root Bridge handle.\r
303 PciAddress - Address of the controller on the PCI bus.\r
304 Phase - The Phase during resource allocation.\r
305\r
306Returns:\r
307\r
308 EFI_SUCCESS - Succeed.\r
309 EFI_INVALID_PARAMETER - RootBridgeHandle is not a valid handle.\r
310\r
311--*/\r
312;\r
313\r
314//\r
315// Host Bridge Silicon specific hooks\r
316//\r
317UINT64\r
318GetAllocAttributes (\r
319 IN UINTN RootBridgeIndex\r
320 )\r
321/*++\r
322\r
323Routine Description:\r
324\r
325 Returns the Allocation attributes for the BNB Root Bridge.\r
326\r
327Arguments:\r
328\r
329 RootBridgeIndex - The root bridge number. 0 based.\r
330\r
331Returns:\r
332\r
333 EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM | EFI_PCI_HOST_BRIDGE_MEM64_DECODE\r
334\r
335--*/\r
336;\r
337\r
338EFI_STATUS\r
339GetHostBridgeMemApertures (\r
340 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo,\r
341 OUT UINT32 *Mem32Base,\r
342 OUT UINT32 *Mem32Limit,\r
343 OUT UINT64 *Mem64Base,\r
344 OUT UINT64 *Mem64Limit\r
345 )\r
346/*++\r
347\r
348Routine Description:\r
349\r
350 Returns memory apertures for the BNB Root Bridge.\r
351\r
352Arguments:\r
353\r
354 PciRootBridgeIo - Pointer to Efi Pci root bridge Io protocol interface instance.\r
355 Mem32Base - Pointer to 32 bit memory base. This is the lowest 32 bit memory address\r
356 that is decoded by the Host Bridge.\r
357 Mem32Limit - Pointer to 32 bit memory limit.This is the highest 32 bit memory address\r
358 that is decoded by the Host Bridge. The size of the 32 bit window is\r
359 (Mem32Limit - Mem32base + 1).\r
360 Mem64Base - Pointer to 64 bit memory base. This is the lowest 64 bit memory address\r
361 that is decoded by the Host Bridge.\r
362 Mem64Limit - Pointer to 64 bit memory limit.This is the highest 64 bit memory address\r
363 that is decoded by the Host Bridge. The size of the 64 bit window is\r
364 (Mem64Limit - Mem64base + 1). Set Mem64Limit < Mem64Base if the host bridge\r
365 does not support 64 bit memory addresses.\r
366\r
367Returns:\r
368\r
369 EFI_SUCCESS - Success.\r
370\r
371--*/\r
372;\r
373\r
374UINT64\r
375Power2MaxMemory (\r
376 IN UINT64 MemoryLength\r
377 )\r
378/*++\r
379\r
380Routine Description:\r
381\r
382 Calculate maximum memory length that can be fit to a mtrr.\r
383\r
384Arguments:\r
385\r
386 MemoryLength - Input memory length.\r
387\r
388Returns:\r
389\r
390 Returned Maximum length.\r
391\r
392--*/\r
393;\r
394\r
395#endif\r