[mirror_edk2.git] / QuarkPlatformPkg / Quark.fdf

## @file\r
# FDF file of Clanton Peak CRB platform with 32-bit DXE\r
#\r
# This package provides QuarkNcSocId platform specific modules.\r
# Copyright (c) 2013 - 2018 Intel Corporation.\r
#\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
# which accompanies this distribution.  The full text of the license may be found at\r
# http://opensource.org/licenses/bsd-license.php\r
#\r
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
#\r
##\r
\r
################################################################################\r
#\r
# Defines Section - statements that will be processed to create a Makefile.\r
#\r
################################################################################\r
[Defines]\r
#                  Address 0x100000000 (4 GB reset address)\r
#                                 Base                               Size\r
#                                      +---------------------------+\r
#                           FLASH_BASE | FD.Quark:                 | 0x800000 (8 MB)\r
#                           0xFF800000 | BaseAddress               |\r
#                                      +---------------------------+\r
#\r
# Flash offsets are 0 based, but are relative to FD.Quark BaseAddress, e.g. Payload Base is at 0x400000, Flash Base is at 0xFF800000 for 8 MB SPI part.\r
# 0xFF800000 + 0x400000 = 0xFFC00000.\r
#\r
#                          Address 0x0 (0xFF800000 for 8 MB SPI part)\r
#                                      +---------------------------+\r
#                FLASH_FV_PAYLOAD_BASE | Payload Image             | FLASH_FV_PAYLOAD_SIZE\r
#                           0x00400000 |                           | 0x00100000\r
#                                      +---------------------------+\r
#                   FLASH_FV_MAIN_BASE | FvMain Image (Compressed) | FLASH_FV_MAIN_SIZE\r
#                           0x00500000 |                           | 0x001E0000\r
#                                      +---------------------------+\r
#                      NVRAM_AREA_BASE | NVRAM Area=               | NVRAM_AREA_SIZE\r
#                           0x006E0000 | Variable + FTW Working +  |\r
#                                      | FTW Spare                 |\r
#                                      +---+-------------------+---+\r
#                 NVRAM_AREA_VARIABLE_BASE |                   | NVRAM_AREA_VARIABLE_SIZE\r
#                                          |                   |\r
#                                          +-------------------+\r
#                         FTW_WORKING_BASE |                   | FTW_WORKING_SIZE\r
#                                          |                   |\r
#                                          +-------------------+\r
#                           FTW_SPARE_BASE |                   | FTW_SPARE_SIZE\r
#                                          |                   |\r
#                                      +---+-------------------+---+\r
#                      RMU_BINARY_BASE | RMU Binary                | RMU_BINARY_SIZE\r
#                           0x00700000 |                           | 0x00008000\r
#                                      +---------------------------+\r
#                   PLATFORM_DATA_BASE | PlatformData Binary       | PLATFORM_DATA_SIZE\r
#                           0x00710000 |                           | 0x00001000\r
#                                      +---------------------------+\r
#                FVRECOVERY_IMAGE_BASE | FVRECOVERY Image          | FVRECOVERY_IMAGE_SIZE\r
#                             0x720000 |                           | 0x000E0000\r
#                                      +---------------------------+\r
\r
  #\r
  # Define value used to compute FLASH regions below reset vector location just below 4GB\r
  #\r
  DEFINE RESET_ADDRESS                           = 0x100000000       # 4 GB\r
\r
  #\r
  # Set size of FLASH to 8MB\r
  #\r
  DEFINE FLASH_SIZE                              = 0x800000\r
  DEFINE FLASH_BASE                              = $(RESET_ADDRESS) - $(FLASH_SIZE)                                                      # The base address of the Flash Device\r
\r
  #\r
  # Set FLASH block size to 4KB\r
  #\r
  DEFINE FLASH_BLOCKSIZE                         = 0x1000            # 4 KB\r
\r
  #\r
  # Misc settings\r
  #\r
  DEFINE FLASH_BLOCKSIZE_DATA                    = 0x00, 0x10, 0x00, 0x00                                                                # equivalent for DATA blocks\r
\r
  #\r
  # Start PAYLOAD at 4MB into 8MB FLASH\r
  #\r
  DEFINE FLASH_FV_PAYLOAD_BASE                   = 0x00400000\r
  DEFINE FLASH_FV_PAYLOAD_SIZE                   = 0x00100000\r
\r
  #\r
  # Put FVMAIN between PAYLOAD and RMU Binary\r
  #\r
  DEFINE FLASH_FV_MAIN_BASE                      = 0x00500000\r
  DEFINE FLASH_FV_MAIN_SIZE                      = 0x001E0000\r
\r
  #\r
  # Place NV Storage just above Platform Data Base\r
  #\r
  DEFINE NVRAM_AREA_VARIABLE_BASE                = 0x006E0000\r
  DEFINE NVRAM_AREA_SIZE                         = 0x00020000\r
\r
  DEFINE NVRAM_AREA_VARIABLE_SIZE                = 0x0000E000\r
  DEFINE FTW_WORKING_BASE                        = $(NVRAM_AREA_VARIABLE_BASE) + $(NVRAM_AREA_VARIABLE_SIZE)\r
  DEFINE FTW_WORKING_SIZE                        = 0x00002000\r
  DEFINE FTW_SPARE_BASE                          = $(FTW_WORKING_BASE) + $(FTW_WORKING_SIZE)\r
  DEFINE FTW_SPARE_SIZE                          = $(NVRAM_AREA_SIZE) - $(NVRAM_AREA_VARIABLE_SIZE) - $(FTW_WORKING_SIZE)\r
\r
  #\r
  # RMU Binary must be at fixed address 1MB below 4GB (0xFFF00000)\r
  #\r
  DEFINE RMU_BINARY_BASE                         = 0x00700000  # HW fixed address\r
  DEFINE RMU_BINARY_SIZE                         = 0x00008000  # HW fixed address, so fixed size\r
\r
  #\r
  # Platform Data Base must be 64KB above RMU\r
  #\r
  DEFINE VPD_BASE                                = 0x00708000\r
  DEFINE VPD_SIZE                                = 0x00001000\r
\r
  #\r
  # Place FV Recovery above NV Storage\r
  #\r
  DEFINE FVRECOVERY_IMAGE_SIZE                   = 0x000F0000\r
  DEFINE FVRECOVERY_IMAGE_BASE                   = $(FLASH_SIZE) - $(FVRECOVERY_IMAGE_SIZE)\r
\r
################################################################################\r
#\r
# FD Section\r
# The [FD] Section is made up of the definition statements and a\r
# description of what goes into  the Flash Device Image.  Each FD section\r
# defines one flash "device" image.  A flash device image may be one of\r
# the following: Removable media bootable image (like a boot floppy\r
# image,) an Option ROM image (that would be "flashed" into an add-in\r
# card,) a System "Flash"  image (that would be burned into a system's\r
# flash) or an Update ("Capsule") image that will be used to update and\r
# existing system flash.\r
#\r
################################################################################\r
[FD.Quark]\r
BaseAddress   = 0xFF800000                   #The base address of the Flash Device; set to same value as FLASH_BASE.\r
Size          = 0x800000                     #The size in bytes of the Flash Device; set to same value as FLASH_SIZE.\r
ErasePolarity = 1\r
BlockSize     = $(FLASH_BLOCKSIZE)\r
NumBlocks     = 0x800                        #The number of blocks for the Flash Device.\r
\r
SET gQuarkPlatformTokenSpaceGuid.PcdFlashAreaBaseAddress = $(FLASH_BASE)\r
SET gQuarkPlatformTokenSpaceGuid.PcdFlashAreaSize        = $(FLASH_SIZE)\r
\r
################################################################################\r
#\r
# Following are lists of FD Region layout which correspond to the locations of different\r
# images within the flash device.\r
#\r
# Regions must be defined in ascending order and may not overlap.\r
#\r
# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by\r
# the pipe "|" character, followed by the size of the region, also in hex with the leading\r
# "0x" characters. Like:\r
# Offset|Size\r
# PcdOffsetCName|PcdSizeCName\r
# RegionType <FV, DATA, or FILE>\r
#\r
################################################################################\r
\r
########################################################\r
# Quark Payload Image\r
########################################################\r
$(FLASH_FV_PAYLOAD_BASE)|$(FLASH_FV_PAYLOAD_SIZE)\r
gQuarkPlatformTokenSpaceGuid.PcdFlashFvPayloadBase|gQuarkPlatformTokenSpaceGuid.PcdFlashFvPayloadSize\r
FV = PAYLOAD\r
\r
########################################################\r
# Quark FVMAIN Image (Compressed)\r
########################################################\r
$(FLASH_FV_MAIN_BASE)|$(FLASH_FV_MAIN_SIZE)\r
gQuarkPlatformTokenSpaceGuid.PcdFlashFvMainBase|gQuarkPlatformTokenSpaceGuid.PcdFlashFvMainSize\r
FV = FVMAIN_COMPACT\r
\r
#############################################################################\r
# Quark NVRAM Area\r
# Quark NVRAM Area contains: Variable + FTW Working + FTW Spare\r
#############################################################################\r
$(NVRAM_AREA_VARIABLE_BASE)|$(NVRAM_AREA_VARIABLE_SIZE)\r
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize\r
#NV_VARIABLE_STORE\r
DATA = {\r
  ## This is the EFI_FIRMWARE_VOLUME_HEADER\r
  # ZeroVector []\r
  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
  # FileSystemGuid: gEfiSystemNvDataFvGuid         =\r
  #  { 0xFFF12B8D, 0x7696, 0x4C8B, { 0xA9, 0x85, 0x27, 0x47, 0x07, 0x5B, 0x4F, 0x50 }}\r
  0x8D, 0x2B, 0xF1, 0xFF, 0x96, 0x76, 0x8B, 0x4C,\r
  0xA9, 0x85, 0x27, 0x47, 0x07, 0x5B, 0x4F, 0x50,\r
  # FvLength: 0x20000\r
  0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00,\r
  #Signature "_FVH"       #Attributes\r
  0x5f, 0x46, 0x56, 0x48, 0xff, 0xfe, 0x04, 0x00,\r
  #HeaderLength #CheckSum #ExtHeaderOffset #Reserved #Revision\r
  0x48, 0x00, 0x19, 0xF9, 0x00, 0x00, 0x00, 0x02,\r
  #Blockmap[0]: 32 Blocks * 0x1000 Bytes / Block\r
  0x20, 0x00, 0x00, 0x00, $(FLASH_BLOCKSIZE_DATA),\r
  #Blockmap[1]: End\r
  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
  ## This is the VARIABLE_STORE_HEADER\r
  !if $(SECURE_BOOT_ENABLE)\r
    # Signature: gEfiAuthenticatedVariableGuid = { 0xaaf32c78, 0x947b, 0x439a, { 0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92 } }\r
    0x78, 0x2c, 0xf3, 0xaa, 0x7b, 0x94, 0x9a, 0x43,\r
    0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92,\r
  !else\r
    #  Signature: gEfiVariableGuid = { 0xddcf3616, 0x3275, 0x4164, { 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d }}\r
    0x16, 0x36, 0xcf, 0xdd, 0x75, 0x32, 0x64, 0x41,\r
    0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d,\r
  !endif\r
  #Size: 0x0E000 (gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize) - 0x48 (size of EFI_FIRMWARE_VOLUME_HEADER) = 0x0DFB8\r
  # This can speed up the Variable Dispatch a bit.\r
  0xB8, 0xDF, 0x00, 0x00,\r
  #FORMATTED: 0x5A #HEALTHY: 0xFE #Reserved: UINT16 #Reserved1: UINT32\r
  0x5A, 0xFE, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00\r
}\r
\r
$(FTW_WORKING_BASE)|$(FTW_WORKING_SIZE)\r
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize\r
#NV_FTW_WORKING\r
DATA = {\r
  # EFI_FAULT_TOLERANT_WORKING_BLOCK_HEADER->Signature = gEdkiiWorkingBlockSignatureGuid         =\r
  #  { 0x9e58292b, 0x7c68, 0x497d, { 0xa0, 0xce, 0x65,  0x0, 0xfd, 0x9f, 0x1b, 0x95 }}\r
  0x2b, 0x29, 0x58, 0x9e, 0x68, 0x7c, 0x7d, 0x49,\r
  0xa0, 0xce, 0x65,  0x0, 0xfd, 0x9f, 0x1b, 0x95,\r
  # Crc:UINT32            #WorkingBlockValid:1, WorkingBlockInvalid:1, Reserved\r
  0xE2, 0x33, 0xF2, 0x03, 0xFE, 0xFF, 0xFF, 0xFF,\r
  # WriteQueueSize: UINT64 #Size: 0x2000 - 0x20 (FTW_WORKING_HEADER) = 0x1FE0\r
  0xE0, 0x1F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00\r
}\r
\r
$(FTW_SPARE_BASE)|$(FTW_SPARE_SIZE)\r
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize\r
#NV_FTW_SPARE\r
\r
#########################################################\r
# Quark Remote Management Unit Binary\r
#########################################################\r
$(RMU_BINARY_BASE)|$(RMU_BINARY_SIZE)\r
INF  QuarkSocBinPkg/QuarkNorthCluster/Binary/QuarkMicrocode/QuarkMicrocode.inf\r
\r
#########################################################\r
# PlatformData Binary, default for standalone is none built-in so user selects.\r
#########################################################\r
$(VPD_BASE)|$(VPD_SIZE)\r
gEfiMdeModulePkgTokenSpaceGuid.PcdVpdBaseAddress\r
FILE = $(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/FV/8C3D856A-9BE6-468E-850A-24F7A8D38E08.bin\r
\r
#######################\r
# Quark FVRECOVERY Image\r
#######################\r
$(FVRECOVERY_IMAGE_BASE)|$(FVRECOVERY_IMAGE_SIZE)\r
gQuarkPlatformTokenSpaceGuid.PcdFlashFvRecoveryBase|gQuarkPlatformTokenSpaceGuid.PcdFlashFvRecoverySize\r
FV = FVRECOVERY\r
\r
################################################################################\r
#\r
# FV Section\r
#\r
# [FV] section is used to define what components or modules are placed within a flash\r
# device file.  This section also defines order the components and modules are positioned\r
# within the image.  The [FV] section consists of define statements, set statements and\r
# module statements.\r
#\r
################################################################################\r
[FV.FVRECOVERY]\r
BlockSize          = $(FLASH_BLOCKSIZE)\r
FvAlignment        = 16         #FV alignment and FV attributes setting.\r
ERASE_POLARITY     = 1\r
MEMORY_MAPPED      = TRUE\r
STICKY_WRITE       = TRUE\r
LOCK_CAP           = TRUE\r
LOCK_STATUS        = TRUE\r
WRITE_DISABLED_CAP = TRUE\r
WRITE_ENABLED_CAP  = TRUE\r
WRITE_STATUS       = TRUE\r
WRITE_LOCK_CAP     = TRUE\r
WRITE_LOCK_STATUS  = TRUE\r
READ_DISABLED_CAP  = TRUE\r
READ_ENABLED_CAP   = TRUE\r
READ_STATUS        = TRUE\r
READ_LOCK_CAP      = TRUE\r
READ_LOCK_STATUS   = TRUE\r
FvNameGuid         = 18D6D9F4-2EEF-4913-AEE6-BE61C6DA6CC8\r
\r
################################################################################\r
#\r
# The INF statements point to EDK component and EDK II module INF files, which will be placed into this FV image.\r
# Parsing tools will scan the INF file to determine the type of component or module.\r
# The component or module type is used to reference the standard rules\r
# defined elsewhere in the FDF file.\r
#\r
# The format for INF statements is:\r
# INF $(PathAndInfFileName)\r
#\r
################################################################################\r
\r
##\r
#  PEI Apriori file example, more PEIM module added later.\r
##\r
APRIORI PEI {\r
  INF  MdeModulePkg/Universal/PCD/Pei/Pcd.inf\r
  # PlatformConfigPei should be immediately after Pcd driver.\r
  INF  QuarkPlatformPkg/Platform/Pei/PlatformConfig/PlatformConfigPei.inf\r
  INF  MdeModulePkg/Universal/PcatSingleSegmentPciCfg2Pei/PcatSingleSegmentPciCfg2Pei.inf\r
  INF  MdeModulePkg/Universal/ReportStatusCodeRouter/Pei/ReportStatusCodeRouterPei.inf\r
  INF  MdeModulePkg/Universal/StatusCodeHandler/Pei/StatusCodeHandlerPei.inf\r
}\r
\r
##\r
#  SEC Phase modules\r
##\r
INF  UefiCpuPkg/SecCore/SecCore.inf\r
\r
!if $(CAPSULE_ENABLE) || $(RECOVERY_ENABLE)\r
  # FMP image decriptor\r
INF RuleOverride = FMP_IMAGE_DESC QuarkPlatformPkg/Feature/Capsule/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf\r
!endif\r
\r
INF  MdeModulePkg/Core/Pei/PeiMain.inf\r
\r
##\r
#  PEI Phase RAW Data files.\r
##\r
FILE FREEFORM = PCD(gEfiQuarkNcSocIdTokenSpaceGuid.PcdQuarkMicrocodeFile) {\r
  SECTION RAW = QuarkSocBinPkg/QuarkNorthCluster/Binary/QuarkMicrocode/RMU.bin\r
}\r
\r
INF  RuleOverride = NORELOC  MdeModulePkg/Universal/PCD/Pei/Pcd.inf\r
INF  QuarkPlatformPkg/Platform/Pei/PlatformConfig/PlatformConfigPei.inf\r
INF  RuleOverride = NORELOC  MdeModulePkg/Universal/ReportStatusCodeRouter/Pei/ReportStatusCodeRouterPei.inf\r
INF  RuleOverride = NORELOC  MdeModulePkg/Universal/StatusCodeHandler/Pei/StatusCodeHandlerPei.inf\r
INF  RuleOverride = NORELOC  MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf\r
INF  RuleOverride = NORELOC  MdeModulePkg/Universal/Variable/Pei/VariablePei.inf\r
INF  RuleOverride = NORELOC  UefiCpuPkg/CpuMpPei/CpuMpPei.inf\r
INF  RuleOverride = NORELOC  MdeModulePkg/Universal/CapsulePei/CapsulePei.inf\r
INF  RuleOverride = NORELOC  QuarkSocPkg/QuarkNorthCluster/MemoryInit/Pei/MemoryInitPei.inf\r
INF  RuleOverride = NORELOC  QuarkSocPkg/QuarkNorthCluster/Smm/Pei/SmmAccessPei/SmmAccessPei.inf\r
INF  RuleOverride = NORELOC  QuarkSocPkg/QuarkNorthCluster/Smm/Pei/SmmControlPei/SmmControlPei.inf\r
INF  QuarkPlatformPkg/Platform/Pei/PlatformInit/PlatformEarlyInit.inf\r
INF  MdeModulePkg/Universal/PcatSingleSegmentPciCfg2Pei/PcatSingleSegmentPciCfg2Pei.inf\r
INF  MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf\r
INF  UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationPei.inf\r
INF  UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume2Pei.inf\r
!if $(MEASURED_BOOT_ENABLE)\r
INF  SecurityPkg/Tcg/Tcg2Config/Tcg2ConfigPei.inf\r
INF  SecurityPkg/Tcg/TcgPei/TcgPei.inf\r
!endif\r
\r
!if $(RECOVERY_ENABLE)\r
FILE FV_IMAGE = 1E9D7604-EF45-46a0-BD8A-71AC78C17AC1 {\r
  SECTION PEI_DEPEX_EXP = {gEfiPeiMemoryDiscoveredPpiGuid AND gEfiPeiBootInRecoveryModePpiGuid}\r
  SECTION GUIDED A31280AD-481E-41B6-95E8-127F4C984779 {    # TIANO COMPRESS GUID\r
    SECTION FV_IMAGE = FVRECOVERY_COMPONENTS\r
  }\r
}\r
!endif\r
\r
!if $(RECOVERY_ENABLE)\r
\r
################################################################################\r
#\r
# FV Section\r
#\r
# [FV] section is used to define what components or modules are placed within a flash\r
# device file.  This section also defines order the components and modules are positioned\r
# within the image.  The [FV] section consists of define statements, set statements and\r
# module statements.\r
#\r
################################################################################\r
[FV.FVRECOVERY_COMPONENTS]\r
BlockSize          = $(FLASH_BLOCKSIZE)\r
FvAlignment        = 16         #FV alignment and FV attributes setting.\r
ERASE_POLARITY     = 1\r
MEMORY_MAPPED      = TRUE\r
STICKY_WRITE       = TRUE\r
LOCK_CAP           = TRUE\r
LOCK_STATUS        = TRUE\r
WRITE_DISABLED_CAP = TRUE\r
WRITE_ENABLED_CAP  = TRUE\r
WRITE_STATUS       = TRUE\r
WRITE_LOCK_CAP     = TRUE\r
WRITE_LOCK_STATUS  = TRUE\r
READ_DISABLED_CAP  = TRUE\r
READ_ENABLED_CAP   = TRUE\r
READ_STATUS        = TRUE\r
READ_LOCK_CAP      = TRUE\r
READ_LOCK_STATUS   = TRUE\r
\r
INF  QuarkSocPkg/QuarkSouthCluster/Usb/Common/Pei/UsbPei.inf\r
INF  MdeModulePkg/Bus/Pci/EhciPei/EhciPei.inf\r
INF  QuarkSocPkg/QuarkSouthCluster/Usb/Ohci/Pei/OhciPei.inf\r
INF  MdeModulePkg/Bus/Usb/UsbBusPei/UsbBusPei.inf\r
INF  MdeModulePkg/Bus/Usb/UsbBotPei/UsbBotPei.inf\r
INF  FatPkg/FatPei/FatPei.inf\r
INF  MdeModulePkg/Universal/Disk/CdExpressPei/CdExpressPei.inf\r
INF  SignedCapsulePkg/Universal/RecoveryModuleLoadPei/RecoveryModuleLoadPei.inf\r
\r
!endif\r
\r
################################################################################\r
#\r
# FV Section\r
#\r
# [FV] section is used to define what components or modules are placed within a flash\r
# device file.  This section also defines order the components and modules are positioned\r
# within the image.  The [FV] section consists of define statements, set statements and\r
# module statements.\r
#\r
################################################################################\r
[FV.FVMAIN]\r
BlockSize          = $(FLASH_BLOCKSIZE)\r
FvAlignment        = 16\r
ERASE_POLARITY     = 1\r
MEMORY_MAPPED      = TRUE\r
STICKY_WRITE       = TRUE\r
LOCK_CAP           = TRUE\r
LOCK_STATUS        = TRUE\r
WRITE_DISABLED_CAP = TRUE\r
WRITE_ENABLED_CAP  = TRUE\r
WRITE_STATUS       = TRUE\r
WRITE_LOCK_CAP     = TRUE\r
WRITE_LOCK_STATUS  = TRUE\r
READ_DISABLED_CAP  = TRUE\r
READ_ENABLED_CAP   = TRUE\r
READ_STATUS        = TRUE\r
READ_LOCK_CAP      = TRUE\r
READ_LOCK_STATUS   = TRUE\r
FvNameGuid         = 30D9ED01-38D2-418a-90D5-C561750BF80F\r
\r
##\r
#  DXE Phase modules\r
##\r
INF  MdeModulePkg/Core/Dxe/DxeMain.inf\r
INF  MdeModulePkg/Universal/PCD/Dxe/Pcd.inf\r
\r
!if $(SOURCE_DEBUG_ENABLE)\r
  INF  SourceLevelDebugPkg/DebugAgentDxe/DebugAgentDxe.inf\r
!endif\r
\r
#\r
# Early SoC / Platform modules\r
#\r
INF  QuarkPlatformPkg/Platform/Dxe/PlatformInit/PlatformInitDxe.inf\r
\r
##\r
#  EDK Core modules\r
##\r
INF  UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf\r
INF  MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf\r
INF  MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf\r
INF  MdeModulePkg/Universal/ReportStatusCodeRouter/Smm/ReportStatusCodeRouterSmm.inf\r
INF  MdeModulePkg/Universal/StatusCodeHandler/Smm/StatusCodeHandlerSmm.inf\r
INF  MdeModulePkg/Universal/SectionExtractionDxe/SectionExtractionDxe.inf\r
\r
INF  MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf\r
INF  UefiCpuPkg/CpuDxe/CpuDxe.inf\r
INF  MdeModulePkg/Universal/Metronome/Metronome.inf\r
INF  MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf\r
INF  MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf\r
INF  MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.inf\r
!if $(SECURE_BOOT_ENABLE)\r
  INF  SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDxe.inf\r
!endif\r
INF  MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.inf\r
INF  MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf\r
INF  MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf\r
INF  MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf\r
INF  MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf\r
INF  PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcatRealTimeClockRuntimeDxe.inf\r
INF  MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf\r
INF  MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf\r
\r
#\r
# Platform\r
#\r
INF  MdeModulePkg/Universal/BdsDxe/BdsDxe.inf\r
INF  MdeModulePkg/Application/UiApp/UiApp.inf\r
\r
INF  QuarkPlatformPkg/Pci/Dxe/PciHostBridge/PciHostBridge.inf\r
INF  QuarkPlatformPkg/Platform/SpiFvbServices/PlatformSpi.inf\r
INF  QuarkPlatformPkg/Platform/SpiFvbServices/PlatformSmmSpi.inf\r
INF  QuarkSocPkg/QuarkNorthCluster/QNCInit/Dxe/QNCInitDxe.inf\r
INF  PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.inf\r
INF  QuarkSocPkg/QuarkNorthCluster/Smm/Dxe/SmmAccessDxe/SmmAccess.inf\r
INF  QuarkSocPkg/QuarkNorthCluster/S3Support/Dxe/QncS3Support.inf\r
INF  QuarkSocPkg/QuarkNorthCluster/Spi/PchSpiRuntime.inf\r
INF  QuarkSocPkg/QuarkNorthCluster/Spi/PchSpiSmm.inf\r
INF  QuarkPlatformPkg/Platform/Dxe/Setup/DxePlatform.inf\r
\r
#\r
# ACPI\r
#\r
INF  QuarkPlatformPkg/Platform/Dxe/SaveMemoryConfig/SaveMemoryConfig.inf\r
INF  MdeModulePkg/Universal/Acpi/S3SaveStateDxe/S3SaveStateDxe.inf\r
#INF  MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/BootScriptExecutorDxe.inf\r
INF  QuarkPlatformPkg/Acpi/Dxe/BootScriptExecutorDxe/BootScriptExecutorDxe.inf\r
INF  MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf\r
INF  IntelFrameworkModulePkg/Universal/Acpi/AcpiS3SaveDxe/AcpiS3SaveDxe.inf\r
INF  QuarkPlatformPkg/Acpi/Dxe/AcpiPlatform/AcpiPlatform.inf\r
INF  RuleOverride = ACPITABLE QuarkPlatformPkg/Acpi/AcpiTables/AcpiTables.inf\r
\r
#\r
# SMM\r
#\r
INF  MdeModulePkg/Core/PiSmmCore/PiSmmIpl.inf\r
INF  MdeModulePkg/Core/PiSmmCore/PiSmmCore.inf\r
INF  UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf\r
INF  UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.inf\r
INF  QuarkSocPkg/QuarkNorthCluster/Smm/Dxe/SmmControlDxe/SmmControlDxe.inf\r
INF  QuarkSocPkg/QuarkNorthCluster/Smm/DxeSmm/QncSmmDispatcher/QNCSmmDispatcher.inf\r
INF  QuarkPlatformPkg/Acpi/DxeSmm/AcpiSmm/AcpiSmmPlatform.inf\r
INF  QuarkPlatformPkg/Acpi/DxeSmm/SmmPowerManagement/SmmPowerManagement.inf\r
INF  MdeModulePkg/Universal/LockBox/SmmLockBox/SmmLockBox.inf\r
INF  UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationSmm.inf\r
\r
#\r
# SMBIOS\r
#\r
INF   MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf\r
INF  QuarkPlatformPkg/Platform/Dxe/SmbiosMiscDxe/SmbiosMiscDxe.inf\r
INF  QuarkPlatformPkg/Platform/Dxe/MemorySubClass/MemorySubClass.inf\r
\r
#\r
# PCI\r
#\r
INF  QuarkPlatformPkg/Pci/Dxe/PciPlatform/PciPlatform.inf\r
INF  MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf\r
INF  QuarkSocPkg/QuarkSouthCluster/IohInit/Dxe/IohInitDxe.inf\r
!if $(SOURCE_DEBUG_ENABLE)\r
!else\r
INF  MdeModulePkg/Bus/Pci/PciSioSerialDxe/PciSioSerialDxe.inf\r
!endif\r
\r
#\r
# USB\r
#\r
!if $(PERFORMANCE_ENABLE)\r
!else\r
INF  MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf\r
INF  QuarkSocPkg/QuarkSouthCluster/Usb/Ohci/Dxe/OhciDxe.inf\r
INF  MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf\r
INF  MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf\r
INF  MdeModulePkg/Bus/Usb/UsbMouseDxe/UsbMouseDxe.inf\r
INF  MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf\r
!endif\r
\r
#\r
# SDIO\r
#\r
!if $(PERFORMANCE_ENABLE)\r
!else\r
INF  QuarkSocPkg/QuarkSouthCluster/Sdio/Dxe/SDControllerDxe/SDControllerDxe.inf\r
INF  QuarkSocPkg/QuarkSouthCluster/Sdio/Dxe/SDMediaDeviceDxe/SDMediaDeviceDxe.inf\r
!endif\r
\r
#\r
# Console\r
#\r
INF  MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf\r
INF  MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf\r
INF  MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf\r
\r
INF  MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf\r
INF  MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf\r
INF  MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf\r
INF  MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf\r
\r
#\r
# File System Modules\r
#\r
!if $(PERFORMANCE_ENABLE)\r
!else\r
INF  MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf\r
INF  MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf\r
INF  FatPkg/EnhancedFatDxe/Fat.inf\r
!endif\r
\r
#\r
# Performance Application\r
#\r
!if $(PERFORMANCE_ENABLE)\r
INF  ShellPkg/DynamicCommand/DpDynamicCommand/DpDynamicCommand.inf\r
!endif\r
\r
#\r
# Trusted Platform Module\r
#\r
!if $(MEASURED_BOOT_ENABLE)\r
INF  SecurityPkg/Tcg/MemoryOverwriteControl/TcgMor.inf\r
INF  SecurityPkg/Tcg/TcgDxe/TcgDxe.inf\r
INF  RuleOverride = DRIVER_ACPITABLE SecurityPkg/Tcg/TcgSmm/TcgSmm.inf\r
!endif\r
\r
!if $(CAPSULE_ENABLE)\r
INF  MdeModulePkg/Universal/EsrtFmpDxe/EsrtFmpDxe.inf\r
INF  SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareReportDxe.inf\r
!endif\r
\r
!if $(RECOVERY_ENABLE)\r
FILE FREEFORM = PCD(gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiRsa2048Sha256TestPublicKeyFileGuid) {\r
     SECTION RAW = BaseTools/Source/Python/Rsa2048Sha256Sign/TestSigningPublicKey.bin\r
     SECTION UI = "Rsa2048Sha256TestSigningPublicKey"\r
     }\r
!endif\r
\r
!if $(CAPSULE_ENABLE)\r
FILE FREEFORM = PCD(gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiPkcs7TestPublicKeyFileGuid) {\r
     SECTION RAW = BaseTools/Source/Python/Pkcs7Sign/TestRoot.cer\r
     SECTION UI = "Pkcs7TestRoot"\r
     }\r
!endif\r
\r
################################################################################\r
#\r
# FV Section\r
#\r
# [FV] section is used to define what components or modules are placed within a flash\r
# device file.  This section also defines order the components and modules are positioned\r
# within the image.  The [FV] section consists of define statements, set statements and\r
# module statements.\r
#\r
################################################################################\r
[FV.FVMAIN_COMPACT]\r
FvAlignment        = 16\r
ERASE_POLARITY     = 1\r
MEMORY_MAPPED      = TRUE\r
STICKY_WRITE       = TRUE\r
LOCK_CAP           = TRUE\r
LOCK_STATUS        = TRUE\r
WRITE_DISABLED_CAP = TRUE\r
WRITE_ENABLED_CAP  = TRUE\r
WRITE_STATUS       = TRUE\r
WRITE_LOCK_CAP     = TRUE\r
WRITE_LOCK_STATUS  = TRUE\r
READ_DISABLED_CAP  = TRUE\r
READ_ENABLED_CAP   = TRUE\r
READ_STATUS        = TRUE\r
READ_LOCK_CAP      = TRUE\r
READ_LOCK_STATUS   = TRUE\r
\r
FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {\r
  SECTION GUIDED A31280AD-481E-41B6-95E8-127F4C984779 {    # TIANO COMPRESS GUID\r
    SECTION FV_IMAGE = FVMAIN\r
  }\r
}\r
\r
################################################################################\r
#\r
# FV Section\r
#\r
# [FV] section is used to define what components or modules are placed within a flash\r
# device file.  This section also defines order the components and modules are positioned\r
# within the image.  The [FV] section consists of define statements, set statements and\r
# module statements.\r
#\r
################################################################################\r
[FV.PAYLOAD]\r
BlockSize          = $(FLASH_BLOCKSIZE)\r
FvAlignment        = 16         #FV alignment and FV attributes setting.\r
ERASE_POLARITY     = 1\r
MEMORY_MAPPED      = TRUE\r
STICKY_WRITE       = TRUE\r
LOCK_CAP           = TRUE\r
LOCK_STATUS        = TRUE\r
WRITE_DISABLED_CAP = TRUE\r
WRITE_ENABLED_CAP  = TRUE\r
WRITE_STATUS       = TRUE\r
WRITE_LOCK_CAP     = TRUE\r
WRITE_LOCK_STATUS  = TRUE\r
READ_DISABLED_CAP  = TRUE\r
READ_ENABLED_CAP   = TRUE\r
READ_STATUS        = TRUE\r
READ_LOCK_CAP      = TRUE\r
READ_LOCK_STATUS   = TRUE\r
\r
#\r
# Shell and Applications\r
#\r
INF  RuleOverride = TIANOCOMPRESSED ShellPkg/Application/Shell/Shell.inf\r
\r
!if $(CAPSULE_ENABLE) || $(RECOVERY_ENABLE)\r
\r
[FV.CapsuleDispatchFv]\r
FvAlignment        = 16\r
ERASE_POLARITY     = 1\r
MEMORY_MAPPED      = TRUE\r
STICKY_WRITE       = TRUE\r
LOCK_CAP           = TRUE\r
LOCK_STATUS        = TRUE\r
WRITE_DISABLED_CAP = TRUE\r
WRITE_ENABLED_CAP  = TRUE\r
WRITE_STATUS       = TRUE\r
WRITE_LOCK_CAP     = TRUE\r
WRITE_LOCK_STATUS  = TRUE\r
READ_DISABLED_CAP  = TRUE\r
READ_ENABLED_CAP   = TRUE\r
READ_STATUS        = TRUE\r
READ_LOCK_CAP      = TRUE\r
READ_LOCK_STATUS   = TRUE\r
\r
!if $(CAPSULE_ENABLE)\r
INF  SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareUpdateDxe.inf\r
!endif\r
\r
[FV.SystemFirmwareUpdateCargo]\r
FvAlignment        = 16\r
ERASE_POLARITY     = 1\r
MEMORY_MAPPED      = TRUE\r
STICKY_WRITE       = TRUE\r
LOCK_CAP           = TRUE\r
LOCK_STATUS        = TRUE\r
WRITE_DISABLED_CAP = TRUE\r
WRITE_ENABLED_CAP  = TRUE\r
WRITE_STATUS       = TRUE\r
WRITE_LOCK_CAP     = TRUE\r
WRITE_LOCK_STATUS  = TRUE\r
READ_DISABLED_CAP  = TRUE\r
READ_ENABLED_CAP   = TRUE\r
READ_STATUS        = TRUE\r
READ_LOCK_CAP      = TRUE\r
READ_LOCK_STATUS   = TRUE\r
\r
FILE RAW = 14D83A59-A810-4556-8192-1C0A593C065C { # PcdEdkiiSystemFirmwareFileGuid\r
    FD = Quark\r
  }\r
\r
FILE RAW = ce57b167-b0e4-41e8-a897-5f4feb781d40 { # gEdkiiSystemFmpCapsuleDriverFvFileGuid\r
    FV = CapsuleDispatchFv\r
  }\r
\r
FILE RAW = 812136D3-4D3A-433A-9418-29BB9BF78F6E { # gEdkiiSystemFmpCapsuleConfigFileGuid\r
    QuarkPlatformPkg/Feature/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini\r
  }\r
\r
!endif\r
\r
!if $(CAPSULE_ENABLE)\r
[FmpPayload.FmpPayloadSystemFirmwarePkcs7]\r
IMAGE_HEADER_INIT_VERSION = 0x02\r
IMAGE_TYPE_ID             = 62af20c0-7016-424a-9bf8-9ccc86584090 # PcdSystemFmpCapsuleImageTypeIdGuid\r
IMAGE_INDEX               = 0x1\r
HARDWARE_INSTANCE         = 0x0\r
MONOTONIC_COUNT           = 0x2\r
CERTIFICATE_GUID          = 4AAFD29D-68DF-49EE-8AA9-347D375665A7 # PKCS7\r
\r
FV = SystemFirmwareUpdateCargo\r
\r
[Capsule.QuarkFirmwareUpdateCapsuleFmpPkcs7]\r
CAPSULE_GUID                = 6dcbd5ed-e82d-4c44-bda1-7194199ad92a # gEfiFmpCapsuleGuid\r
CAPSULE_FLAGS               = PersistAcrossReset,InitiateReset\r
CAPSULE_HEADER_SIZE         = 0x20\r
CAPSULE_HEADER_INIT_VERSION = 0x1\r
\r
FMP_PAYLOAD = FmpPayloadSystemFirmwarePkcs7\r
!endif\r
\r
!if $(RECOVERY_ENABLE)\r
[FmpPayload.FmpPayloadSystemFirmwareRsa2048]\r
IMAGE_HEADER_INIT_VERSION = 0x02\r
IMAGE_TYPE_ID             = 62af20c0-7016-424a-9bf8-9ccc86584090 # PcdSystemFmpCapsuleImageTypeIdGuid\r
IMAGE_INDEX               = 0x1\r
HARDWARE_INSTANCE         = 0x0\r
MONOTONIC_COUNT           = 0x2\r
CERTIFICATE_GUID          = A7717414-C616-4977-9420-844712A735BF # RSA2048SHA256\r
\r
FV = SystemFirmwareUpdateCargo\r
\r
[Capsule.QuarkRec]\r
CAPSULE_GUID                = 6dcbd5ed-e82d-4c44-bda1-7194199ad92a # gEfiFmpCapsuleGuid\r
CAPSULE_FLAGS               = PersistAcrossReset,InitiateReset\r
CAPSULE_HEADER_SIZE         = 0x20\r
CAPSULE_HEADER_INIT_VERSION = 0x1\r
\r
FMP_PAYLOAD = FmpPayloadSystemFirmwareRsa2048\r
!endif\r
\r
################################################################################\r
#\r
# Rules are use with the [FV] section's module INF type to define\r
# how an FFS file is created for a given INF file. The following Rule are the default\r
# rules for the different module type. User can add the customized rules to define the\r
# content of the FFS file.\r
#\r
################################################################################\r
[Rule.Common.SEC]\r
  FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {\r
    TE  TE    Align = 8       $(INF_OUTPUT)/$(MODULE_NAME).efi\r
    RAW BIN   Align = 16      |.com\r
  }\r
\r
[Rule.Common.PEI_CORE]\r
  FILE PEI_CORE = $(NAMED_GUID)            {\r
    TE       TE               $(INF_OUTPUT)/$(MODULE_NAME).efi\r
    UI       STRING="$(MODULE_NAME)" Optional\r
    VERSION  STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
  }\r
\r
[Rule.Common.PEIM.NORELOC]\r
  FILE PEIM = $(NAMED_GUID) RELOCS_STRIPPED  {\r
     PEI_DEPEX PEI_DEPEX Optional        $(INF_OUTPUT)/$(MODULE_NAME).depex\r
     TE        TE                        $(INF_OUTPUT)/$(MODULE_NAME).efi\r
     UI        STRING="$(MODULE_NAME)" Optional\r
     VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
  }\r
\r
[Rule.Common.PEIM]\r
  FILE PEIM = $(NAMED_GUID)               {\r
     PEI_DEPEX PEI_DEPEX Optional        $(INF_OUTPUT)/$(MODULE_NAME).depex\r
     TE        TE                        $(INF_OUTPUT)/$(MODULE_NAME).efi\r
     UI        STRING="$(MODULE_NAME)" Optional\r
     VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
  }\r
\r
[Rule.Common.DXE_CORE]\r
  FILE DXE_CORE = $(NAMED_GUID) {\r
    PE32      PE32                     $(INF_OUTPUT)/$(MODULE_NAME).efi\r
    UI        STRING="$(MODULE_NAME)" Optional\r
    VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
  }\r
\r
[Rule.Common.UEFI_DRIVER]\r
  FILE DRIVER = $(NAMED_GUID) {\r
    DXE_DEPEX DXE_DEPEX Optional       $(INF_OUTPUT)/$(MODULE_NAME).depex\r
    PE32      PE32                     $(INF_OUTPUT)/$(MODULE_NAME).efi\r
    UI        STRING="$(MODULE_NAME)" Optional\r
    VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
  }\r
\r
[Rule.Common.DXE_DRIVER]\r
  FILE DRIVER = $(NAMED_GUID) {\r
    DXE_DEPEX DXE_DEPEX Optional       $(INF_OUTPUT)/$(MODULE_NAME).depex\r
    PE32      PE32                     $(INF_OUTPUT)/$(MODULE_NAME).efi\r
    UI        STRING="$(MODULE_NAME)" Optional\r
    VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
  }\r
\r
[Rule.Common.DXE_RUNTIME_DRIVER]\r
  FILE DRIVER = $(NAMED_GUID) {\r
    DXE_DEPEX DXE_DEPEX Optional       $(INF_OUTPUT)/$(MODULE_NAME).depex\r
    PE32      PE32                     $(INF_OUTPUT)/$(MODULE_NAME).efi\r
    UI        STRING="$(MODULE_NAME)" Optional\r
    VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
  }\r
\r
[Rule.Common.DXE_SMM_DRIVER]\r
  FILE SMM = $(NAMED_GUID) {\r
    SMM_DEPEX SMM_DEPEX Optional       $(INF_OUTPUT)/$(MODULE_NAME).depex\r
    PE32      PE32                     $(INF_OUTPUT)/$(MODULE_NAME).efi\r
    UI        STRING="$(MODULE_NAME)" Optional\r
    VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
  }\r
\r
[Rule.Common.DXE_SMM_DRIVER.DRIVER_ACPITABLE]\r
  FILE SMM = $(NAMED_GUID) {\r
    DXE_DEPEX DXE_DEPEX Optional       $(INF_OUTPUT)/$(MODULE_NAME).depex\r
    PE32      PE32                     $(INF_OUTPUT)/$(MODULE_NAME).efi\r
    RAW ACPI  Optional                |.acpi\r
    RAW ASL   Optional                |.aml\r
    UI        STRING="$(MODULE_NAME)" Optional\r
    VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
  }\r
\r
[Rule.Common.SMM_CORE]\r
  FILE SMM_CORE = $(NAMED_GUID) {\r
    PE32      PE32                     $(INF_OUTPUT)/$(MODULE_NAME).efi\r
    UI        STRING="$(MODULE_NAME)" Optional\r
    VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
  }\r
\r
[Rule.Common.UEFI_APPLICATION]\r
  FILE APPLICATION = $(NAMED_GUID) {\r
    PE32      PE32                     $(INF_OUTPUT)/$(MODULE_NAME).efi\r
    UI        STRING="$(MODULE_NAME)" Optional\r
    VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
  }\r
\r
[Rule.Common.UEFI_APPLICATION.TIANOCOMPRESSED]\r
  FILE APPLICATION = $(NAMED_GUID) {\r
    UI        STRING="$(MODULE_NAME)" Optional\r
    VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
    SECTION GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {  # TIANO COMPRESS GUID\r
      PE32      PE32                     $(INF_OUTPUT)/$(MODULE_NAME).efi\r
    }\r
  }\r
\r
[Rule.Common.UEFI_APPLICATION.UI]\r
  FILE APPLICATION = $(NAMED_GUID) {\r
    PE32      PE32                     $(INF_OUTPUT)/$(MODULE_NAME).efi\r
    UI        STRING="Enter Setup"\r
    VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
  }\r
\r
[Rule.Common.USER_DEFINED.ACPITABLE]\r
  FILE FREEFORM = $(NAMED_GUID) {\r
    RAW ACPI               |.acpi\r
    RAW ASL                |.aml\r
  }\r
\r
[Rule.Common.PEIM.FMP_IMAGE_DESC]\r
  FILE PEIM = $(NAMED_GUID) {\r
     RAW BIN                  |.acpi\r
     PEI_DEPEX PEI_DEPEX Optional        $(INF_OUTPUT)/$(MODULE_NAME).depex\r
     PE32      PE32    Align=4K          $(INF_OUTPUT)/$(MODULE_NAME).efi\r
     UI       STRING="$(MODULE_NAME)" Optional\r
     VERSION  STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
  }\r
\r