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1 | ## @file\r |
2 | # Package for support of Clanton Peak CRB platform\r | |
3 | #\r | |
4 | # This package provides QuarkNcSocId platform specific modules.\r | |
5 | # Copyright (c) 2013-2015 Intel Corporation.\r | |
6 | #\r | |
7 | # This program and the accompanying materials\r | |
8 | # are licensed and made available under the terms and conditions of the BSD License\r | |
9 | # which accompanies this distribution. The full text of the license may be found at\r | |
10 | # http://opensource.org/licenses/bsd-license.php\r | |
11 | #\r | |
12 | # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
13 | # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
14 | #\r | |
15 | ##\r | |
16 | \r | |
17 | \r | |
18 | ################################################################################\r | |
19 | #\r | |
20 | # Defines Section - statements that will be processed to create a Makefile.\r | |
21 | #\r | |
22 | ################################################################################\r | |
23 | \r | |
24 | [Defines]\r | |
25 | DEC_SPECIFICATION = 0x00010005\r | |
26 | PACKAGE_NAME = QuarkPlatformPkg\r | |
27 | PACKAGE_GUID = 46C1F476-A85E-49a8-B258-DD4396B87FEF\r | |
28 | PACKAGE_VERSION = 0.1\r | |
29 | \r | |
30 | \r | |
31 | ################################################################################\r | |
32 | #\r | |
33 | # Include Section - list of Include Paths that are provided by this package.\r | |
34 | # Comments are used for Keywords and Module Types.\r | |
35 | #\r | |
36 | # Supported Module Types:\r | |
37 | # SEC PEIM DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SMM_DRIVER DXE_SAL_DRIVER UEFI_DRIVER\r | |
38 | #\r | |
39 | ################################################################################\r | |
40 | [Includes]\r | |
41 | Include\r | |
42 | \r | |
43 | ################################################################################\r | |
44 | #\r | |
45 | # Library Class Header section - list of Library Class header files that are\r | |
46 | # provided by this package.\r | |
47 | #\r | |
48 | ################################################################################\r | |
49 | [LibraryClasses]\r | |
50 | \r | |
51 | ################################################################################\r | |
52 | #\r | |
53 | # Global Guid Definition section - list of Global Guid C Name Data Structures\r | |
54 | # that are provided by this package.\r | |
55 | #\r | |
56 | ################################################################################\r | |
57 | [Guids]\r | |
58 | gQuarkPlatformTokenSpaceGuid = { 0x199c1ef0, 0x6400, 0x41c5, { 0xb0, 0xa4, 0xff, 0xbf, 0x21, 0x9d, 0xcb, 0xae }}\r | |
59 | gEfiMemoryConfigDataGuid = { 0x80dbd530, 0xb74c, 0x4f11, { 0x8c, 0x03, 0x41, 0x86, 0x65, 0x53, 0x28, 0x31 }}\r | |
60 | gPowerManagementAcpiTableStorageGuid = { 0xc0cc43bd, 0xc920, 0x4064, { 0x93, 0x5b, 0x93, 0xb4, 0x47, 0x37, 0x94, 0x70 }}\r | |
61 | gPeiCapsuleOnFatFloppyDiskGuid = {0x2e3d2e75, 0x9b2e, 0x412d, {0xb4, 0xb1, 0x70, 0x41, 0x6b, 0x87, 0x0, 0xff }}\r | |
62 | gPeiCapsuleOnFatIdeDiskGuid = {0xb38573b6, 0x6200, 0x4ac5, {0xb5, 0x1d, 0x82, 0xe6, 0x59, 0x38, 0xd7, 0x83 }}\r | |
63 | gPeiCapsuleOnFatUsbDiskGuid = {0x0ffbce19, 0x324c, 0x4690, {0xa0, 0x09, 0x98, 0xc6, 0xae, 0x2e, 0xb1, 0x86 }}\r | |
64 | gPeiCapsuleOnDataCDGuid = {0x5cac0099, 0x0dc9, 0x48e5, {0x80, 0x68, 0xbb, 0x95, 0xf5, 0x40, 0x0a, 0x9f }}\r | |
65 | gEfiQuarkCapsuleGuid = { 0xd400d1e4, 0xa314, 0x442b, { 0x89, 0xed, 0xa9, 0x2e, 0x4c, 0x81, 0x97, 0xcb } }\r | |
66 | gQuarkVariableLockGuid = { 0xeef749c2, 0xc047, 0x4d6e, { 0xb1, 0xbc, 0xd3, 0x6e, 0xb3, 0xa5, 0x55, 0x9c }}\r | |
67 | \r | |
68 | ################################################################################\r | |
69 | #\r | |
70 | # Global Protocols Definition section - list of Global Protocols C Name Data\r | |
71 | # Structures that are provided by this package.\r | |
72 | #\r | |
73 | ################################################################################\r | |
74 | [Protocols]\r | |
75 | gEfiGlobalNvsAreaProtocolGuid = { 0x074E1E48, 0x8132, 0x47A1, { 0x8C, 0x2C, 0x3F, 0x14, 0xAD, 0x9A, 0x66, 0xDC }}\r | |
76 | gEfiSmmSpiReadyProtocolGuid = { 0x7a5dbc75, 0x5b2b, 0x4e67, { 0xbd, 0xe1, 0xd4, 0x8e, 0xee, 0x76, 0x15, 0x62 }}\r | |
77 | gEfiIioUdsProtocolGuid = { 0xa7ced760, 0xc71c, 0x4e1a, { 0xac, 0xb1, 0x89, 0x60, 0x4d, 0x52, 0x16, 0xcb }}\r | |
78 | \r | |
79 | ################################################################################\r | |
80 | #\r | |
81 | # PCD Declarations section - list of all PCDs Declared by this Package\r | |
82 | # Only this package should be providing the\r | |
83 | # declaration, other packages should not.\r | |
84 | #\r | |
85 | ################################################################################\r | |
86 | \r | |
87 | [PcdsFeatureFlag]\r | |
88 | gQuarkPlatformTokenSpaceGuid.WaitIfResetDueToError|FALSE|BOOLEAN|0x2000000F\r | |
89 | \r | |
90 | [PcdsFixedAtBuild]\r | |
91 | gQuarkPlatformTokenSpaceGuid.PcdFlashAreaBaseAddress|0xFF800000|UINT32|0x20000001\r | |
92 | gQuarkPlatformTokenSpaceGuid.PcdFlashAreaSize|0x800000|UINT32|0x20000002\r | |
93 | gQuarkPlatformTokenSpaceGuid.PcdFlashNvStorageBase|0xFFF30000|UINT32|0x20000003\r | |
94 | gQuarkPlatformTokenSpaceGuid.PcdFlashNvStorageSize|0x00020000|UINT32|0x20000004\r | |
95 | gQuarkPlatformTokenSpaceGuid.PcdFlashFvRecovery2Base|0xFFEF0400|UINT32|0x2000001C\r | |
96 | gQuarkPlatformTokenSpaceGuid.PcdFlashFvRecovery2Size|0x00007000|UINT32|0x2000001D\r | |
97 | gQuarkPlatformTokenSpaceGuid.PcdFlashQNCMicrocodeSize|0x00004000|UINT32|0x2000000C\r | |
98 | gQuarkPlatformTokenSpaceGuid.PcdPlatformDataBaseAddress|0xFFF10000|UINT32|0x2000001E\r | |
99 | gQuarkPlatformTokenSpaceGuid.PcdPlatformDataMaxLen|0x20000|UINT32|0x2000001F\r | |
100 | gQuarkPlatformTokenSpaceGuid.PcdHpetEnable|TRUE|BOOLEAN|0x20000018\r | |
101 | \r | |
102 | gQuarkPlatformTokenSpaceGuid.PcdFlashFvDefaultPayloadBase|0xFFC00400|UINT32|0x20000020\r | |
103 | gQuarkPlatformTokenSpaceGuid.PcdFlashFvDefaultPayloadSize|0x000F0000|UINT32|0x20000021\r | |
104 | gQuarkPlatformTokenSpaceGuid.PcdFlashFvDefaultMainBase|0xFFD00400|UINT32|0x20000022\r | |
105 | gQuarkPlatformTokenSpaceGuid.PcdFlashFvDefaultMainSize|0x000D0000|UINT32|0x20000023\r | |
106 | \r | |
107 | gQuarkPlatformTokenSpaceGuid.PcdMemorySize|0x80000000|UINT32|0x20000032\r | |
108 | # ECC scrub interval in miliseconds 1..255 (0 works as feature disable)\r | |
109 | gQuarkPlatformTokenSpaceGuid.PcdEccScrubInterval|0x00|UINT8|0x20000037\r | |
110 | # Number of 32B blocks read for ECC scrub 2..16\r | |
111 | gQuarkPlatformTokenSpaceGuid.PcdEccScrubBlkSize|0x02|UINT8|0x20000038\r | |
112 | gQuarkPlatformTokenSpaceGuid.PcdFlashNvMfh|0xFFF08000|UINT32|0x20000039\r | |
113 | gQuarkPlatformTokenSpaceGuid.PcdFlashFvFixedStage1AreaBase|0xFFF90000|UINT32|0x2000003A\r | |
114 | gQuarkPlatformTokenSpaceGuid.PcdFlashFvFixedStage1AreaSize|0x00040000|UINT32|0x2000003B\r | |
115 | gQuarkPlatformTokenSpaceGuid.PcdEsramStage1Base|0x80000000|UINT32|0x2000003C\r | |
116 | \r | |
117 | # Legacy Bridge protected BIOS range register configs, if == 0 then do nothing since register default.\r | |
118 | gQuarkPlatformTokenSpaceGuid.PcdLegacyProtectedBIOSRange0Pei|0x00000000|UINT32|0x2000003D\r | |
119 | gQuarkPlatformTokenSpaceGuid.PcdLegacyProtectedBIOSRange1Pei|0x00000000|UINT32|0x2000003E\r | |
120 | gQuarkPlatformTokenSpaceGuid.PcdLegacyProtectedBIOSRange2Pei|0x00000000|UINT32|0x2000004F\r | |
121 | \r | |
122 | # ACPI Power management settings.\r | |
123 | \r | |
124 | # Power Management flags.\r | |
125 | # PpmFlags[5] = PPM_C2 = C2 Capable, Enabled.\r | |
126 | gQuarkPlatformTokenSpaceGuid.PcdPpmFlags|0x00000020|UINT32|0xA00000CF\r | |
127 | \r | |
128 | # Madt Table Initialize settings.\r | |
129 | # Defines a flag to Enable/Disable interrupt override setting table0,\r | |
130 | # and the source Irq, Polarity, Triger Mode and global Irq of interrupt override setting table0\r | |
131 | gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable0Enable|0x01|UINT8|0xA0000100\r | |
132 | gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable0SourceIrq|0x00|UINT8|0xA0000101\r | |
133 | gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable0Polarity|0x00|UINT8|0xA0000102\r | |
134 | gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable0TrigerMode|0x00|UINT8|0xA0000103\r | |
135 | gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable0GlobalIrq|0x02|UINT32|0xA0000104\r | |
136 | \r | |
137 | # Madt Table Initialize settings.\r | |
138 | # Defines a flag to Enable/Disable interrupt override setting table1,\r | |
139 | # and the source Irq, Polarity, Triger Mode and global Irq of interrupt override setting table1\r | |
140 | gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable1Enable|0x01|UINT8|0xA0000105\r | |
141 | gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable1SourceIrq|0x09|UINT8|0xA0000106\r | |
142 | gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable1Polarity|0x01|UINT8|0xA0000107\r | |
143 | gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable1TrigerMode|0x03|UINT8|0xA0000108\r | |
144 | gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable1GlobalIrq|0x09|UINT32|0xA0000109\r | |
145 | \r | |
146 | # Madt Table Initialize settings.\r | |
147 | # Defines a flag to Enable/Disable interrupt override setting table2,\r | |
148 | # and the source Irq, Polarity, Triger Mode and global Irq of interrupt override setting table2\r | |
149 | gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable2Enable|0x0|UINT8|0xA000010F\r | |
150 | gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable2SourceIrq|0x0|UINT8|0xA0000110\r | |
151 | gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable2Polarity|0x0|UINT8|0xA0000111\r | |
152 | gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable2TrigerMode|0x0|UINT8|0xA0000112\r | |
153 | gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable2GlobalIrq|0x0|UINT32|0xA0000113\r | |
154 | \r | |
155 | # Madt Table Initialize settings.\r | |
156 | # Defines a flag to Enable/Disable interrupt override setting table3,\r | |
157 | # and the source Irq, Polarity, Triger Mode and global Irq of interrupt override setting table3\r | |
158 | gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable3Enable|0x0|UINT8|0xA0000114\r | |
159 | gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable3SourceIrq|0x0|UINT8|0xA0000115\r | |
160 | gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable3Polarity|0x0|UINT8|0xA0000116\r | |
161 | gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable3TrigerMode|0x0|UINT8|0xA0000117\r | |
162 | gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable3GlobalIrq|0x0|UINT32|0xA0000118\r | |
163 | \r | |
164 | # Madt Table Initialize settings.\r | |
165 | # Defines a flag to Enable/Disable interrupt override setting table4,\r | |
166 | # and the source Irq, Polarity, Triger Mode and global Irq of interrupt override setting table4\r | |
167 | gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable4Enable|0x0|UINT8|0xA0000119\r | |
168 | gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable4SourceIrq|0x0|UINT8|0xA000011A\r | |
169 | gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable4Polarity|0x0|UINT8|0xA0000120\r | |
170 | gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable4TrigerMode|0x0|UINT8|0xA0000121\r | |
171 | gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable4GlobalIrq|0x0|UINT32|0xA0000122\r | |
172 | \r | |
173 | # Madt Table Initialize settings.\r | |
174 | # Defines a flag to Enable/Disable interrupt override setting table5,\r | |
175 | # and the source Irq, Polarity, Triger Mode and global Irq of interrupt override setting table5\r | |
176 | gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable5Enable|0x0|UINT8|0xA0000123\r | |
177 | gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable5SourceIrq|0x0|UINT8|0xA0000124\r | |
178 | gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable5Polarity|0x0|UINT8|0xA0000125\r | |
179 | gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable5TrigerMode|0x0|UINT8|0xA0000126\r | |
180 | gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable5GlobalIrq|0x0|UINT32|0xA0000127\r | |
181 | \r | |
182 | # Madt Table Initialize settings.\r | |
183 | # Defines a flag to Enable/Disable interrupt override setting table6,\r | |
184 | # and the source Irq, Polarity, Triger Mode and global Irq of interrupt override setting table6\r | |
185 | gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable6Enable|0x0|UINT8|0xA0000128\r | |
186 | gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable6SourceIrq|0x0|UINT8|0xA0000129\r | |
187 | gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable6Polarity|0x0|UINT8|0xA000012A\r | |
188 | gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable6TrigerMode|0x0|UINT8|0xA000012B\r | |
189 | gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable6GlobalIrq|0x0|UINT32|0xA000012C\r | |
190 | \r | |
191 | # Madt Table Initialize settings.\r | |
192 | # Defines a flag to Enable/Disable interrupt override setting table7,\r | |
193 | # and the source Irq, Polarity, Triger Mode and global Irq of interrupt override setting table7\r | |
194 | gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable7Enable|0x0|UINT8|0xA000012D\r | |
195 | gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable7SourceIrq|0x0|UINT8|0xA000012E\r | |
196 | gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable7Polarity|0x0|UINT8|0xA000012F\r | |
197 | gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable7TrigerMode|0x0|UINT8|0xA0000130\r | |
198 | gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable7GlobalIrq|0x0|UINT32|0xA0000131\r | |
199 | \r | |
200 | # Madt Table Initialize settings.\r | |
201 | # Defines a flag to Enable/Disable interrupt override setting table8,\r | |
202 | # and the source Irq, Polarity, Triger Mode and global Irq of interrupt override setting table8\r | |
203 | gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable8Enable|0x0|UINT8|0xA0000132\r | |
204 | gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable8SourceIrq|0x0|UINT8|0xA0000133\r | |
205 | gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable8Polarity|0x0|UINT8|0xA0000134\r | |
206 | gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable8TrigerMode|0x0|UINT8|0xA0000135\r | |
207 | gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable8GlobalIrq|0x0|UINT32|0xA0000136\r | |
208 | \r | |
209 | # Madt Table Initialize settings.\r | |
210 | # Defines a flag to Enable/Disable interrupt override setting table9,\r | |
211 | # and the source Irq, Polarity, Triger Mode and global Irq of interrupt override setting table9\r | |
212 | gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable9Enable|0x0|UINT8|0xA0000137\r | |
213 | gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable9SourceIrq|0x0|UINT8|0xA0000138\r | |
214 | gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable9Polarity|0x0|UINT8|0xA0000139\r | |
215 | gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable9TrigerMode|0x0|UINT8|0xA000013A\r | |
216 | gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable9GlobalIrq|0x0|UINT32|0xA000013B\r | |
217 | \r | |
218 | # Madt Table Initialize settings.\r | |
219 | # Defines a flag to Enable/Disable interrupt override setting table10,\r | |
220 | # and the source Irq, Polarity, Triger Mode and global Irq of interrupt override setting table10\r | |
221 | gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable10Enable|0x0|UINT8|0xA000013C\r | |
222 | gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable10SourceIrq|0x0|UINT8|0xA000013D\r | |
223 | gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable10Polarity|0x0|UINT8|0xA000013E\r | |
224 | gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable10TrigerMode|0x0|UINT8|0xA000013F\r | |
225 | gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable10GlobalIrq|0x0|UINT32|0xA0000140\r | |
226 | \r | |
227 | # Madt Table Initialize settings.\r | |
228 | # Defines a flag to Enable/Disable interrupt override setting table11,\r | |
229 | # and the source Irq, Polarity, Triger Mode and global Irq of interrupt override setting table11\r | |
230 | gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable11Enable|0x0|UINT8|0xA0000141\r | |
231 | gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable11SourceIrq|0x0|UINT8|0xA0000142\r | |
232 | gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable11Polarity|0x0|UINT8|0xA0000143\r | |
233 | gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable11TrigerMode|0x0|UINT8|0xA0000144\r | |
234 | gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable11GlobalIrq|0x0|UINT32|0xA0000145\r | |
235 | \r | |
236 | # Madt Table Initialize settings.\r | |
237 | # Defines a flag to Enable/Disable interrupt override setting table12,\r | |
238 | # and the source Irq, Polarity, Triger Mode and global Irq of interrupt override setting table12\r | |
239 | gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable12Enable|0x0|UINT8|0xA0000146\r | |
240 | gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable12SourceIrq|0x0|UINT8|0xA0000147\r | |
241 | gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable12Polarity|0x0|UINT8|0xA0000148\r | |
242 | gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable12TrigerMode|0x0|UINT8|0xA0000149\r | |
243 | gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable12GlobalIrq|0x0|UINT32|0xA000014A\r | |
244 | \r | |
245 | # Madt Table Initialize settings.\r | |
246 | # Defines a flag to Enable/Disable interrupt override setting table13,\r | |
247 | # and the source Irq, Polarity, Triger Mode and global Irq of interrupt override setting table13\r | |
248 | gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable13Enable|0x0|UINT8|0xA000014B\r | |
249 | gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable13SourceIrq|0x0|UINT8|0xA000014C\r | |
250 | gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable13Polarity|0x0|UINT8|0xA000014D\r | |
251 | gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable13TrigerMode|0x0|UINT8|0xA000014E\r | |
252 | gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable13GlobalIrq|0x0|UINT32|0xA000014F\r | |
253 | \r | |
254 | # Madt Table Initialize settings.\r | |
255 | # Defines a flag to Enable/Disable interrupt override setting table14,\r | |
256 | # and the source Irq, Polarity, Triger Mode and global Irq of interrupt override setting table14\r | |
257 | gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable14Enable|0x0|UINT8|0xA0000150\r | |
258 | gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable14SourceIrq|0x0|UINT8|0xA0000151\r | |
259 | gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable14Polarity|0x0|UINT8|0xA0000152\r | |
260 | gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable14TrigerMode|0x0|UINT8|0xA0000153\r | |
261 | gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable14GlobalIrq|0x0|UINT32|0xA0000154\r | |
262 | \r | |
263 | # Madt Table Initialize settings.\r | |
264 | # Defines a flag to Enable/Disable interrupt override setting table15,\r | |
265 | # and the source Irq, Polarity, Triger Mode and global Irq of interrupt override setting table15\r | |
266 | gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable15Enable|0x0|UINT8|0xA0000155\r | |
267 | gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable15SourceIrq|0x0|UINT8|0xA0000156\r | |
268 | gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable15Polarity|0x0|UINT8|0xA0000157\r | |
269 | gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable15TrigerMode|0x0|UINT8|0xA0000158\r | |
270 | gQuarkPlatformTokenSpaceGuid.PcdInterruptOverrideSettingTable15GlobalIrq|0x0|UINT32|0xA0000159\r | |
271 | \r | |
272 | # Madt Table Initialize settings.\r | |
273 | # Defines a bunch of Pcds for IO APIC setting:\r | |
274 | # IoApicAddress, GlobalInterruptBase, IoApicId, NmiEnable, NmiSource, Polarity and TrigerMode\r | |
275 | gQuarkPlatformTokenSpaceGuid.PcdIoApicSettingIoApicAddress|0xFEC00000|UINT32|0xA0000170\r | |
276 | gQuarkPlatformTokenSpaceGuid.PcdIoApicSettingGlobalInterruptBase|0x0|UINT32|0xA0000171\r | |
277 | gQuarkPlatformTokenSpaceGuid.PcdIoApicSettingIoApicId|0x01|UINT8|0xA0000172\r | |
278 | gQuarkPlatformTokenSpaceGuid.PcdIoApicSettingNmiEnable|0x0|UINT8|0xA0000173\r | |
279 | gQuarkPlatformTokenSpaceGuid.PcdIoApicSettingNmiSource|0x0|UINT8|0xA0000174\r | |
280 | gQuarkPlatformTokenSpaceGuid.PcdIoApicSettingPolarity|0x0|UINT8|0xA0000175\r | |
281 | gQuarkPlatformTokenSpaceGuid.PcdIoApicSettingTrigerMode|0x0|UINT8|0xA0000176\r | |
282 | \r | |
283 | # Madt Table Initialize settings.\r | |
284 | # Defines a bunch of Pcds for Local APIC setting:\r | |
285 | # NmiEnabelApicIdMask, AddressOverrideEnable, Polarity, TrigerMode, LocalApicLint, LocalApicAddress and LocalApicAddressOverride\r | |
286 | gQuarkPlatformTokenSpaceGuid.PcdLocalApicSettingNmiEnabelApicIdMask|0x03|UINT8|0xA0000177\r | |
287 | gQuarkPlatformTokenSpaceGuid.PcdLocalApicSettingAddressOverrideEnable|0x00|UINT8|0xA0000178\r | |
288 | gQuarkPlatformTokenSpaceGuid.PcdLocalApicSettingPolarity|0x01|UINT8|0xA0000179\r | |
289 | gQuarkPlatformTokenSpaceGuid.PcdLocalApicSettingTrigerMode|0x01|UINT8|0xA000017A\r | |
290 | gQuarkPlatformTokenSpaceGuid.PcdLocalApicSettingLocalApicLint|0x01|UINT8|0xA000017B\r | |
291 | gQuarkPlatformTokenSpaceGuid.PcdLocalApicAddressOverride|0x00|UINT64|0xA000017C\r | |
292 | \r | |
293 | # PCDs for auto provisioning of UEFI SecureBoot.\r | |
294 | gQuarkPlatformTokenSpaceGuid.PcdPkX509File |{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }|VOID*|0xA0000180\r | |
295 | gQuarkPlatformTokenSpaceGuid.PcdKekX509File |{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }|VOID*|0xA0000181\r | |
296 | gQuarkPlatformTokenSpaceGuid.PcdKekRsa2048File |{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }|VOID*|0xA0000182\r | |
297 | gQuarkPlatformTokenSpaceGuid.PcdDbX509File |{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }|VOID*|0xA0000183\r | |
298 | gQuarkPlatformTokenSpaceGuid.PcdDbxX509File |{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }|VOID*|0xA0000184\r | |
299 | \r | |
300 | [PcdsFixedAtBuild, PcdsPatchableInModule]\r | |
301 | ## This PCD points to the file name GUID of the BootManagerMenuApp\r | |
302 | # Platform can customize the PCD to point to different application for Boot Manager Menu\r | |
303 | gQuarkPlatformTokenSpaceGuid.PcdBootManagerMenuFile|{ 0xdc, 0x5b, 0xc2, 0xee, 0xf2, 0x67, 0x95, 0x4d, 0xb1, 0xd5, 0xf8, 0x1b, 0x20, 0x39, 0xd1, 0x1d }|VOID*|0x00000003\r | |
304 | \r | |
305 | #BIOS Information (Type 0), please refer spec SMBIOS 2.4, section 3.3.1 ,for following SMBIOS relates comments.\r | |
306 | \r | |
307 | # String number of the BIOS Vendors Name\r | |
308 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSBiosVendor|"Intel Corp."|VOID*|0xA0000033\r | |
309 | # String number of the BIOS Release Data\r | |
310 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSBiosReleaseDate|"01/01/2014"|VOID*|0xA0000035\r | |
311 | # Segment location of BIOS starting address.\r | |
312 | # Note: The size of the runtime BIOS image can be computed by subtracting the Starting Address Segment from 10000h and multiplying the result by 16.\r | |
313 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSBiosStartAddress|0xE000|UINT16|0xA0000036\r | |
314 | #Defines which functions the BIOS supports. PCI, PCMCIA, Flash, etc. See 3.3.1.1.\r | |
315 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSBiosChar|0x03037C099880|UINT64|0xA0000037\r | |
316 | #Defines which functions the BIOS supports. etc.See 3.3.1.2.1.\r | |
317 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSBiosCharEx1|0x03|UINT8|0xA0000038\r | |
318 | #Defines which functions the BIOS supports. etc.See 3.3.1.2.2.\r | |
319 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSBiosCharEx2|0x03|UINT8|0xA0000039\r | |
320 | \r | |
321 | # System Information (Type 1), Section 3.3.2\r | |
322 | # System Manufacturer String\r | |
323 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemManufacturer|"Intel Corp."|VOID*|0xA000003A\r | |
324 | # System Product String\r | |
325 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemProductName|"QUARK"|VOID*|0xA000003B\r | |
326 | # System Version\r | |
327 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemVersion|"1.0"|VOID*|0xA000003C\r | |
328 | # System SerialNumber String\r | |
329 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSerialNumber|"Unknown"|VOID*|0xA000003D\r | |
330 | # System UUID\r | |
331 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemUuid|{0x23, 0xef, 0xff, 0x13,0x54, 0x86, 0xda, 0x46, 0xa4, 0x7, 0x39, 0xc9, 0x12, 0x2, 0xd3, 0x56}|VOID*|0xA000003E\r | |
332 | # Manufacturer String\r | |
333 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSKUNumber|"System SKUNumber"|VOID*|0xA000003F\r | |
334 | # System Family String\r | |
335 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemFamily|"X1000"|VOID*|0xA0000040\r | |
336 | \r | |
337 | # Base Board (or Module) Information (Type 2), Section 3.3.3\r | |
338 | # Board Manufacturer String\r | |
339 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSBoardManufacturer|"Intel Corp."|VOID*|0xA0000041\r | |
340 | # Board Product Name| String\r | |
341 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSBoardProductName|"QUARK"|VOID*|0xA0000042\r | |
342 | # Board Version String\r | |
343 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSBoardVersion|"FAB-D"|VOID*|0xA0000043\r | |
344 | # Board Serial Number\r | |
345 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSBoardSerialNumber|"3"|VOID*|0xA0000044\r | |
346 | # System Enclosure or Chassis(Type 3) Section 3.3.4\r | |
347 | # Chassis Manufacturer String\r | |
348 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSChassisManufacturer|"Chassis Manufacturer"|VOID*|0xA0000045\r | |
349 | # ChassisVersion\r | |
350 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSChassisVersion|"Chassis Version"|VOID*|0xA0000046\r | |
351 | # Chassis SerialNumber String\r | |
352 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSChassisSerialNumber|"Chassis Serial Number"|VOID*|0xA0000047\r | |
353 | # Chassis Asset Tag\r | |
354 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSChassisAssetTag|"Chassis Asset Tag"|VOID*|0xA0000051\r | |
355 | # Chassis Type\r | |
356 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSChassisType|0x00000003|UINT8|0xA0000048\r | |
357 | # Identifies the state of the enclosure when it was last booted. See 3.3.4.2 for definitions.\r | |
358 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSChassisBootupState|0x03|UINT8|0xA0000049\r | |
359 | # Identifies the state of the enclosures power supply (or supplies) when last booted. See 3.3.4.2 for definitions.\r | |
360 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSChassisPowerSupplyState|0x03|UINT8|0xA000004A\r | |
361 | # Identifies the enclosures physical security status when last booted. See 3.3.4.3 for definitions.\r | |
362 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSChassisSecurityState|0x01|UINT8|0xA000004B\r | |
363 | # Contains OEM- or BIOS vendor-specific information.\r | |
364 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSChassisOemDefined|0x0|UINT32|0xA000004C\r | |
365 | # The height of the enclosure, in 'U's. A U is a standard unit of measure for the height of a rack or rack-mountable component\r | |
366 | # and is equal to 1.75 inches or 4.445 cm. A value of 00h indicates that the enclosure height is unspecified.\r | |
367 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSChassisHeight|0x0|UINT8|0xA000004D\r | |
368 | # Identifies the number of power cords associated with the enclosure or chassis. A value of 00h indicates that the number is unspecified.\r | |
369 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSChassisNumberPowerCords|0x0|UINT8|0xA000004E\r | |
370 | # Identifies the number of Contained Element records that follow, in the range 0 to 255.\r | |
371 | # Each Contained Element group comprises m bytes, as specified by the Contained Element Record Length field that follows.\r | |
372 | # If no Contained Elements are included, this field is set to 0.\r | |
373 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSChassisElementCount|0x0|UINT8|0xA000004F\r | |
374 | # Identifies the byte length of each Contained Element record that follow, in the range 0 to 255.\r | |
375 | # If no Contained Elements are included, this field is set to 0. For v2.3.2 and later of this specification,\r | |
376 | # this field is set to at least 03h when Contained Elements are specified.\r | |
377 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSChassisElementRecordLength|0x0|UINT8|0xA0000050\r | |
378 | \r | |
379 | # Defines the number of connectors existent on the board\r | |
380 | # The valid range is between 0 and 16\r | |
381 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSConnectorNumber|16|UINT8|0xA0000060\r | |
382 | \r | |
383 | # Defines the designator of port1 internal connector\r | |
384 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort1InternalConnectorDesignator|"X14 "|VOID*|0xA0000061\r | |
385 | # Defines the designator of port1 external connector\r | |
386 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort1ExternalConnectorDesignator|"Keyboard"|VOID*|0xA0000062\r | |
387 | # Defines the type of port1 internal connector\r | |
388 | # The valid range is between 0 to 0xFF, and 0 here means EfiPortConnectorTypeNone\r | |
389 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort1InternalConnectorType|0x0F|UINT8|0xA0000063\r | |
390 | # Defines the type of port1 external connector\r | |
391 | # The valid range is between 0 to 0xFF, and 0x0F here means EfiPortConnectorTypePS2\r | |
392 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort1ExternalConnectorType|0x0F|UINT8|0xA0000064\r | |
393 | # Defines the type of port1\r | |
394 | # The valid range is between 0 to 0xFF, and 0x0D here means EfiPortTypeKeyboard\r | |
395 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort1Type|0x0D|UINT8|0xA0000065\r | |
396 | \r | |
397 | # Defines the designator of port2 internal connector\r | |
398 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort2InternalConnectorDesignator|"X15 "|VOID*|0xA0000066\r | |
399 | # Defines the designator of port2 external connector\r | |
400 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort2ExternalConnectorDesignator|"Mouse"|VOID*|0xA0000067\r | |
401 | # Defines the type of port2 internal connector\r | |
402 | # The valid range is between 0 to 0xFF, and 0 here means EfiPortConnectorTypeNone\r | |
403 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort2InternalConnectorType|0x0F|UINT8|0xA0000068\r | |
404 | # Defines the type of port2 external connector\r | |
405 | # The valid range is between 0 to 0xFF, and 0x0F here means EfiPortConnectorTypePS2\r | |
406 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort2ExternalConnectorType|0x0F|UINT8|0xA0000069\r | |
407 | # Defines the type of port2\r | |
408 | # The valid range is between 0 to 0xFF, and 0x0E here means EfiPortTypeMouse\r | |
409 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort2Type|0x0E|UINT8|0xA000006A\r | |
410 | \r | |
411 | # Defines the designator of port3 internal connector\r | |
412 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort3InternalConnectorDesignator|"X16 "|VOID*|0xA000006B\r | |
413 | # Defines the designator of port3 external connector\r | |
414 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort3ExternalConnectorDesignator|"COM 1"|VOID*|0xA000006C\r | |
415 | # Defines the type of port3 internal connector\r | |
416 | # The valid range is between 0 to 0xFF, and 0xFF here means EfiPortConnectorTypeOther\r | |
417 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort3InternalConnectorType|0xFF|UINT8|0xA000006D\r | |
418 | # Defines the type of port3 external connector\r | |
419 | # The valid range is between 0 to 0xFF, and 0 here means EfiPortConnectorTypeNone\r | |
420 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort3ExternalConnectorType|0x0|UINT8|0xA000006E\r | |
421 | # Defines the type of port3\r | |
422 | # The valid range is between 0 to 0xFF, and 0x09 here means EfiPortTypeSerial16550ACompatible\r | |
423 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort3Type|0x09|UINT8|0xA000006F\r | |
424 | \r | |
425 | # Defines the designator of port4 internal connector\r | |
426 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort4InternalConnectorDesignator|"X17 "|VOID*|0xA0000070\r | |
427 | # Defines the designator of port4 external connector\r | |
428 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort4ExternalConnectorDesignator|"COM 2"|VOID*|0xA0000071\r | |
429 | # Defines the type of port4 internal connector\r | |
430 | # The valid range is between 0 to 0xFF, and 0xFF here means EfiPortConnectorTypeOther\r | |
431 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort4InternalConnectorType|0xFF|UINT8|0xA0000072\r | |
432 | # Defines the type of port4 external connector\r | |
433 | # The valid range is between 0 to 0xFF, and 0 here means EfiPortConnectorTypeNone\r | |
434 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort4ExternalConnectorType|0x0|UINT8|0xA0000073\r | |
435 | # Defines the type of port4\r | |
436 | # The valid range is between 0 to 0xFF, and 0x09 here means EfiPortTypeSerial16550ACompatible\r | |
437 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort4Type|0x09|UINT8|0xA0000074\r | |
438 | \r | |
439 | # Defines the designator of port5 internal connector\r | |
440 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort5InternalConnectorDesignator|"X18 "|VOID*|0xA0000075\r | |
441 | # Defines the designator of port5 external connector\r | |
442 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort5ExternalConnectorDesignator|"COM 3"|VOID*|0xA0000076\r | |
443 | # Defines the type of port5 internal connector\r | |
444 | # The valid range is between 0 to 0xFF, and 0xFF here means EfiPortConnectorTypeOther\r | |
445 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort5InternalConnectorType|0xFF|UINT8|0xA0000077\r | |
446 | # Defines the type of port5 external connector\r | |
447 | # The valid range is between 0 to 0xFF, and 0 here means EfiPortConnectorTypeNone\r | |
448 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort5ExternalConnectorType|0x0|UINT8|0xA0000078\r | |
449 | # Defines the type of port5\r | |
450 | # The valid range is between 0 to 0xFF, and 0x09 here means EfiPortTypeSerial16550ACompatible\r | |
451 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort5Type|0x09|UINT8|0xA0000079\r | |
452 | \r | |
453 | # Defines the designator of port6 internal connector\r | |
454 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort6InternalConnectorDesignator|"X19 "|VOID*|0xA000007A\r | |
455 | # Defines the designator of port6 external connector\r | |
456 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort6ExternalConnectorDesignator|"COM 4"|VOID*|0xA000007B\r | |
457 | # Defines the type of port6 internal connector\r | |
458 | # The valid range is between 0 to 0xFF, and 0xFF here means EfiPortConnectorTypeOther\r | |
459 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort6InternalConnectorType|0xFF|UINT8|0xA000007C\r | |
460 | # Defines the type of port6 external connector\r | |
461 | # The valid range is between 0 to 0xFF, and 0 here means EfiPortConnectorTypeNone\r | |
462 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort6ExternalConnectorType|0x0|UINT8|0xA000007D\r | |
463 | # Defines the type of port6\r | |
464 | # The valid range is between 0 to 0xFF, and 0x09 here means EfiPortTypeSerial16550ACompatible\r | |
465 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort6Type|0x09|UINT8|0xA000007E\r | |
466 | \r | |
467 | # Defines the designator of port7 internal connector\r | |
468 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort7InternalConnectorDesignator|"J4A2"|VOID*|0xA000007F\r | |
469 | # Defines the designator of port7 external connector\r | |
470 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort7ExternalConnectorDesignator|"LPT 1"|VOID*|0xA0000080\r | |
471 | # Defines the type of port7 internal connector\r | |
472 | # The valid range is between 0 to 0xFF, and 0 here means EfiPortConnectorTypeNone\r | |
473 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort7InternalConnectorType|0x0|UINT8|0xA0000081\r | |
474 | # Defines the type of port7 external connector\r | |
475 | # The valid range is between 0 to 0xFF, and 0x12 here means EfiPortConnectorTypeDB25Male\r | |
476 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort7ExternalConnectorType|0x04|UINT8|0xA0000082\r | |
477 | # Defines the type of port7\r | |
478 | # The valid range is between 0 to 0xFF, and 0x10 here means EfiPortTypeEcpEpp\r | |
479 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort7Type|0x05|UINT8|0xA0000083\r | |
480 | \r | |
481 | # Defines the designator of port8 internal connector\r | |
482 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort8InternalConnectorDesignator|"X20 "|VOID*|0xA0000084\r | |
483 | # Defines the designator of port8 external connector\r | |
484 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort8ExternalConnectorDesignator|"USB1"|VOID*|0xA0000085\r | |
485 | # Defines the type of port8 internal connector\r | |
486 | # The valid range is between 0 to 0xFF, and 0 here means EfiPortConnectorTypeNone\r | |
487 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort8InternalConnectorType|0x0|UINT8|0xA0000086\r | |
488 | # Defines the type of port8 external connector\r | |
489 | # The valid range is between 0 to 0xFF, and 0x12 here means EfiPortConnectorTypeUsb\r | |
490 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort8ExternalConnectorType|0x12|UINT8|0xA0000087\r | |
491 | # Defines the type of port8\r | |
492 | # The valid range is between 0 to 0xFF, and 0x10 here means EfiPortTypeUsb\r | |
493 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort8Type|0x10|UINT8|0xA0000088\r | |
494 | \r | |
495 | # Defines the designator of port9 internal connector\r | |
496 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort9InternalConnectorDesignator|"X21 "|VOID*|0xA0000089\r | |
497 | # Defines the designator of port9 external connector\r | |
498 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort9ExternalConnectorDesignator|"USB2"|VOID*|0xA000008A\r | |
499 | # Defines the type of port9 internal connector\r | |
500 | # The valid range is between 0 to 0xFF, and 0 here means EfiPortConnectorTypeNone\r | |
501 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort9InternalConnectorType|0x0|UINT8|0xA000008B\r | |
502 | # Defines the type of port9 external connector\r | |
503 | # The valid range is between 0 to 0xFF, and 0x12 here means EfiPortConnectorTypeUsb\r | |
504 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort9ExternalConnectorType|0x12|UINT8|0xA000008C\r | |
505 | # Defines the type of port9\r | |
506 | # The valid range is between 0 to 0xFF, and 0x10 here means EfiPortTypeUsb\r | |
507 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort9Type|0x10|UINT8|0xA000008D\r | |
508 | \r | |
509 | # Defines the designator of port10 internal connector\r | |
510 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort10InternalConnectorDesignator|"X22 "|VOID*|0xA000008E\r | |
511 | # Defines the designator of port10 external connector\r | |
512 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort10ExternalConnectorDesignator|"USB3"|VOID*|0xA000008F\r | |
513 | # Defines the type of port10 internal connector\r | |
514 | # The valid range is between 0 to 0xFF, and 0 here means EfiPortConnectorTypeNone\r | |
515 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort10InternalConnectorType|0x0|UINT8|0xA0000090\r | |
516 | # Defines the type of port10 external connector\r | |
517 | # The valid range is between 0 to 0xFF, and 0x12 here means EfiPortConnectorTypeUsb\r | |
518 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort10ExternalConnectorType|0x12|UINT8|0xA0000091\r | |
519 | # Defines the type of port10\r | |
520 | # The valid range is between 0 to 0xFF, and 0x10 here means EfiPortTypeUsb\r | |
521 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort10Type|0x10|UINT8|0xA0000092\r | |
522 | \r | |
523 | # Defines the designator of port11 internal connector\r | |
524 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort11InternalConnectorDesignator|"X23 "|VOID*|0xA0000093\r | |
525 | # Defines the designator of port11 external connector\r | |
526 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort11ExternalConnectorDesignator|"USB4"|VOID*|0xA0000094\r | |
527 | # Defines the type of port11 internal connector\r | |
528 | # The valid range is between 0 to 0xFF, and 0 here means EfiPortConnectorTypeNone\r | |
529 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort11InternalConnectorType|0x0|UINT8|0xA0000095\r | |
530 | # Defines the type of port11 external connector\r | |
531 | # The valid range is between 0 to 0xFF, and 0x12 here means EfiPortConnectorTypeUsb\r | |
532 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort11ExternalConnectorType|0x12|UINT8|0xA0000096\r | |
533 | # Defines the type of port11\r | |
534 | # The valid range is between 0 to 0xFF, and 0x10 here means EfiPortTypeUsb\r | |
535 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort11Type|0x10|UINT8|0xA0000097\r | |
536 | \r | |
537 | # Defines the designator of port12 internal connector\r | |
538 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort12InternalConnectorDesignator|"X28 "|VOID*|0xA0000098\r | |
539 | # Defines the designator of port12 external connector\r | |
540 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort12ExternalConnectorDesignator|"RJ-45 Type"|VOID*|0xA0000099\r | |
541 | # Defines the type of port12 internal connector\r | |
542 | # The valid range is between 0 to 0xFF, and 0 here means EfiPortConnectorTypeNone\r | |
543 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort12InternalConnectorType|0x0|UINT8|0xA000009A\r | |
544 | # Defines the type of port12 external connector\r | |
545 | # The valid range is between 0 to 0xFF, and 0x0B here means EfiPortConnectorTypeRJ45\r | |
546 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort12ExternalConnectorType|0x0B|UINT8|0xA000009B\r | |
547 | # Defines the type of port12\r | |
548 | # The valid range is between 0 to 0xFF, and 0x1F here means EfiPortTypeNetworkPort\r | |
549 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort12Type|0x1F|UINT8|0xA000009C\r | |
550 | \r | |
551 | # Defines the designator of port13 internal connector\r | |
552 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort13InternalConnectorDesignator|"J1G1"|VOID*|0xA000009D\r | |
553 | # Defines the designator of port13 external connector\r | |
554 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort13ExternalConnectorDesignator|"Floppy"|VOID*|0xA000009E\r | |
555 | # Defines the type of port13 internal connector\r | |
556 | # The valid range is between 0 to 0xFF, and 0x16 here means EfiPortConnectorTypeOnboardFloppy\r | |
557 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort13InternalConnectorType|0x17|UINT8|0xA000009F\r | |
558 | # Defines the type of port13 external connector\r | |
559 | # The valid range is between 0 to 0xFF, and 0 here means EfiPortConnectorTypeNone\r | |
560 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort13ExternalConnectorType|0x0|UINT8|0xA00000A0\r | |
561 | # Defines the type of port13\r | |
562 | # The valid range is between 0 to 0xFF, and 0xFF here means EfiPortTypeOther\r | |
563 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort13Type|0xFF|UINT8|0xA00000A1\r | |
564 | \r | |
565 | # Defines the designator of port14 internal connector\r | |
566 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort14InternalConnectorDesignator|"J2H2"|VOID*|0xA00000A2\r | |
567 | # Defines the designator of port14 external connector\r | |
568 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort14ExternalConnectorDesignator|"IDE"|VOID*|0xA00000A3\r | |
569 | # Defines the type of port14 internal connector\r | |
570 | # The valid range is between 0 to 0xFF, and 0x16 here means EfiPortConnectorTypeOnboardIde\r | |
571 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort14InternalConnectorType|0x16|UINT8|0xA00000A4\r | |
572 | # Defines the type of port14 external connector\r | |
573 | # The valid range is between 0 to 0xFF, and 0 here means EfiPortConnectorTypeNone\r | |
574 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort14ExternalConnectorType|0x0|UINT8|0xA00000A5\r | |
575 | # Defines the type of port14\r | |
576 | # The valid range is between 0 to 0xFF, and 0xFF here means EfiPortTypeOther\r | |
577 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort14Type|0xFF|UINT8|0xA00000A6\r | |
578 | \r | |
579 | # Defines the designator of port15 internal connector\r | |
580 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort15InternalConnectorDesignator|"X29 "|VOID*|0xA00000A7\r | |
581 | # Defines the designator of port15 external connector\r | |
582 | \r | |
583 | # Defines the type of port15 internal connector\r | |
584 | # The valid range is between 0 to 0xFF, and 0x16 here means EfiPortConnectorTypeOnboardIde\r | |
585 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort15InternalConnectorType|0x16|UINT8|0xA00000A9\r | |
586 | # Defines the type of port15 external connector\r | |
587 | # The valid range is between 0 to 0xFF, and 0 here means EfiPortConnectorTypeNone\r | |
588 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort15ExternalConnectorType|0x0|UINT8|0xA00000AA\r | |
589 | # Defines the type of port15\r | |
590 | # The valid range is between 0 to 0xFF, and 0xFF here means EfiPortTypeOther\r | |
591 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort15Type|0xFF|UINT8|0xA00000AB\r | |
592 | \r | |
593 | # Defines the designator of port16 internal connector\r | |
594 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort16InternalConnectorDesignator|"X30 "|VOID*|0xA00000AC\r | |
595 | # Defines the designator of port16 external connector\r | |
596 | \r | |
597 | # Defines the type of port16 internal connector\r | |
598 | # The valid range is between 0 to 0xFF, and 0x16 here means EfiPortConnectorTypeOnboardIde\r | |
599 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort16InternalConnectorType|0x16|UINT8|0xA00000AE\r | |
600 | # Defines the type of port16 external connector\r | |
601 | # The valid range is between 0 to 0xFF, and 0 here means EfiPortConnectorTypeNone\r | |
602 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort16ExternalConnectorType|0x0|UINT8|0xA00000AF\r | |
603 | # Defines the type of port16\r | |
604 | # The valid range is between 0 to 0xFF, and 0xFF here means EfiPortTypeOther\r | |
605 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSPort16Type|0xFF|UINT8|0xA00000B0\r | |
606 | \r | |
607 | # Defines the number of the slots existent on board\r | |
608 | # The valid range is between 0 and 14\r | |
609 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlotNumber|5|UINT8|0xA000023F\r | |
610 | # Defines the designation of system slot1\r | |
611 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot1Designation|"PCI SLOT1"|VOID*|0xA0000240\r | |
612 | # Defines the type of system slot1\r | |
613 | # The valid range is between 0x01 to 0xA5, and 0x06 here means EfiSlotTypePci\r | |
614 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot1Type|0x6|UINT8|0xA0000241\r | |
615 | # Defines the data bus width of system slot1\r | |
616 | # The valid range is between 0x01 to 0x07, and 0x05 here means EfiSlotDataBusWidth32Bit\r | |
617 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot1DataBusWidth|0x5|UINT8|0xA0000242\r | |
618 | # Defines the usage of system slot1\r | |
619 | # The valid range is between 0x01 to 0x04, and 0x03 here means EfiSlotUsageAvailable\r | |
620 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot1Usage|0x3|UINT8|0xA0000243\r | |
621 | # Defines the length of system slot1\r | |
622 | # The valid range is between 0x01 to 0x04, and 0x04 here means EfiSlotLengthLong\r | |
623 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot1Length|0x4|UINT8|0xA0000244\r | |
624 | # Defines the ID of system slot1, a number of UINT16\r | |
625 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot1Id|0x01|UINT16|0xA0000245\r | |
626 | # Defines the characteristics of system slot1 , a bit mask of EFI_MISC_SLOT_CHARACTERISTICS\r | |
627 | # typedef struct {\r | |
628 | # UINT32 CharacteristicsUnknown :1;\r | |
629 | # UINT32 Provides50Volts :1;\r | |
630 | # UINT32 Provides33Volts :1;\r | |
631 | # UINT32 SharedSlot :1;\r | |
632 | # UINT32 PcCard16Supported :1;\r | |
633 | # UINT32 CardBusSupported :1;\r | |
634 | # UINT32 ZoomVideoSupported :1;\r | |
635 | # UINT32 ModemRingResumeSupported:1;\r | |
636 | # UINT32 PmeSignalSupported :1;\r | |
637 | # UINT32 HotPlugDevicesSupported :1;\r | |
638 | # UINT32 SmbusSignalSupported :1;\r | |
639 | # UINT32 Reserved :21;\r | |
640 | # } EFI_MISC_SLOT_CHARACTERISTICS;\r | |
641 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot1Characteristics|0x504|UINT32|0xA0000246\r | |
642 | \r | |
643 | # Defines the designation of system slot2\r | |
644 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot2Designation|"PCI-Express 1"|VOID*|0xA0000247\r | |
645 | \r | |
646 | # Defines the type of system slot2\r | |
647 | # The valid range is between 0x01 to 0xA5, and 0x06 here means EfiSlotTypePci\r | |
648 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot2Type|0xA5|UINT8|0xA0000248\r | |
649 | # Defines the data bus width of system slot2\r | |
650 | # The valid range is between 0x01 to 0x07, and 0x05 here means EfiSlotDataBusWidth32Bit\r | |
651 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot2DataBusWidth|0x5|UINT8|0xA0000249\r | |
652 | # Defines the usage of system slot2\r | |
653 | # The valid range is between 0x01 to 0x04, and 0x03 here means EfiSlotUsageAvailable\r | |
654 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot2Usage|0x3|UINT8|0xA000024A\r | |
655 | # Defines the length of system slot2\r | |
656 | # The valid range is between 0x01 to 0x04, and 0x04 here means EfiSlotLengthLong\r | |
657 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot2Length|0x4|UINT8|0xA000024B\r | |
658 | # Defines the ID of system slot2, a number of UINT16\r | |
659 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot2Id|0x02|UINT16|0xA000024C\r | |
660 | # Defines the characteristics of system slot2 , a bit mask of EFI_MISC_SLOT_CHARACTERISTICS\r | |
661 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot2Characteristics|0x504|UINT32|0xA000024D\r | |
662 | \r | |
663 | # Defines the designation of system slot3\r | |
664 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot3Designation|"PCI-Express 2"|VOID*|0xA000024E\r | |
665 | # Defines the type of system slot3\r | |
666 | # The valid range is between 0x01 to 0xA5, and 0x06 here means EfiSlotTypePci\r | |
667 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot3Type|0xA5|UINT8|0xA000024F\r | |
668 | # Defines the data bus width of system slot3\r | |
669 | # The valid range is between 0x01 to 0x07, and 0x05 here means EfiSlotDataBusWidth32Bit\r | |
670 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot3DataBusWidth|0x5|UINT8|0xA0000250\r | |
671 | # Defines the usage of system slot3\r | |
672 | # The valid range is between 0x01 to 0x04, and 0x03 here means EfiSlotUsageAvailable\r | |
673 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot3Usage|0x3|UINT8|0xA0000251\r | |
674 | # Defines the length of system slot3\r | |
675 | # The valid range is between 0x01 to 0x04, and 0x04 here means EfiSlotLengthLong\r | |
676 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot3Length|0x4|UINT8|0xA0000252\r | |
677 | # Defines the ID of system slot3, a number of UINT16\r | |
678 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot3Id|0x03|UINT16|0xA0000253\r | |
679 | # Defines the characteristics of system slot3 , a bit mask of EFI_MISC_SLOT_CHARACTERISTICS\r | |
680 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot3Characteristics|0x504|UINT32|0xA000254\r | |
681 | \r | |
682 | # Defines the designation of system slot4\r | |
683 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot4Designation|"PCI-Express 3"|VOID*|0xA0000255\r | |
684 | # Defines the type of system slot4\r | |
685 | # The valid range is between 0x01 to 0xA5, and 0xA5 here means EfiSlotTypePciExpress\r | |
686 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot4Type|0xA5|UINT8|0xA0000256\r | |
687 | # Defines the data bus width of system slot4\r | |
688 | # The valid range is between 0x01 to 0x07, and 0x05 here means EfiSlotDataBusWidth32Bit\r | |
689 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot4DataBusWidth|0x5|UINT8|0xA0000257\r | |
690 | # Defines the usage of system slot4\r | |
691 | # The valid range is between 0x01 to 0x04, and 0x03 here means EfiSlotUsageAvailable\r | |
692 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot4Usage|0x3|UINT8|0xA0000258\r | |
693 | # Defines the length of system slot4\r | |
694 | # The valid range is between 0x01 to 0x04, and 0x04 here means EfiSlotLengthLong\r | |
695 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot4Length|0x4|UINT8|0xA0000259\r | |
696 | # Defines the ID of system slot4, a number of UINT16\r | |
697 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot4Id|0x04|UINT16|0xA0000260\r | |
698 | # Defines the characteristics of system slot4 , a bit mask of EFI_MISC_SLOT_CHARACTERISTICS\r | |
699 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot4Characteristics|0x504|UINT32|0xA0000261\r | |
700 | \r | |
701 | # Defines the designation of system slot5\r | |
702 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot5Designation|"Mini PCI-E"|VOID*|0xA0000262\r | |
703 | # Defines the type of system slot5\r | |
704 | # The valid range is between 0x01 to 0xA5, and 0xA5 here means EfiSlotTypePciExpress\r | |
705 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot5Type|0xA5|UINT8|0xA0000263\r | |
706 | # Defines the data bus width of system slot5\r | |
707 | # The valid range is between 0x01 to 0x07, and 0x05 here means EfiSlotDataBusWidth32Bit\r | |
708 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot5DataBusWidth|0x5|UINT8|0xA0000264\r | |
709 | # Defines the usage of system slot5\r | |
710 | # The valid range is between 0x01 to 0x04, and 0x03 here means EfiSlotUsageAvailable\r | |
711 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot5Usage|0x3|UINT8|0xA0000265\r | |
712 | # Defines the length of system slot5\r | |
713 | # The valid range is between 0x01 to 0x04, and 0x04 here means EfiSlotLengthLong\r | |
714 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot5Length|0x4|UINT8|0xA0000266\r | |
715 | # Defines the ID of system slot5, a number of UINT16\r | |
716 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot5Id|0x05|UINT16|0xA0000267\r | |
717 | # Defines the characteristics of system slot5 , a bit mask of EFI_MISC_SLOT_CHARACTERISTICS\r | |
718 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot5Characteristics|0x504|UINT32|0xA0000268\r | |
719 | \r | |
720 | # Defines the designation of system slot6\r | |
721 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot6Designation|"NONE"|VOID*|0xA0000269\r | |
722 | # Defines the type of system slot6\r | |
723 | # The valid range is between 0x01 to 0xA5, and 0x02 here means EfiSlotTypeUnknown\r | |
724 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot6Type|0x2|UINT8|0xA000026A\r | |
725 | # Defines the data bus width of system slot6\r | |
726 | # The valid range is between 0x01 to 0x07, and 0x02 here means EfiSlotDataBusWidthUnknown\r | |
727 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot6DataBusWidth|0x2|UINT8|0xA000026B\r | |
728 | # Defines the usage of system slot6\r | |
729 | # The valid range is between 0x01 to 0x04, and 0x02 here means EfiSlotUsageUnknown\r | |
730 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot6Usage|0x2|UINT8|0xA000026C\r | |
731 | # Defines the length of system slot6\r | |
732 | # The valid range is between 0x01 to 0x04, and 0x02 here means EfiSlotLengthUnknown\r | |
733 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot6Length|0x2|UINT8|0xA000026D\r | |
734 | # Defines the ID of system slot6, a number of UINT16\r | |
735 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot6Id|0x0|UINT16|0xA000026E\r | |
736 | # Defines the characteristics of system slot6 , a bit mask of EFI_MISC_SLOT_CHARACTERISTICS\r | |
737 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot6Characteristics|0x0|UINT32|0xA000026F\r | |
738 | \r | |
739 | # Defines the designation of system slot7\r | |
740 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot7Designation|"NONE"|VOID*|0xA0000270\r | |
741 | # Defines the type of system slot7\r | |
742 | # The valid range is between 0x01 to 0xA5, and 0x02 here means EfiSlotTypeUnknown\r | |
743 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot7Type|0x2|UINT8|0xA0000271\r | |
744 | # Defines the data bus width of system slot7\r | |
745 | # The valid range is between 0x01 to 0x07, and 0x02 here means EfiSlotDataBusWidthUnknown\r | |
746 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot7DataBusWidth|0x2|UINT8|0xA0000272\r | |
747 | # Defines the usage of system slot7\r | |
748 | # The valid range is between 0x01 to 0x04, and 0x02 here means EfiSlotUsageUnknown\r | |
749 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot7Usage|0x2|UINT8|0xA0000273\r | |
750 | # Defines the length of system slot7\r | |
751 | # The valid range is between 0x01 to 0x04, and 0x02 here means EfiSlotLengthUnknown\r | |
752 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot7Length|0x2|UINT8|0xA0000274\r | |
753 | # Defines the ID of system slot7, a number of UINT16\r | |
754 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot7Id|0x0|UINT16|0xA0000275\r | |
755 | # Defines the characteristics of system slot7 , a bit mask of EFI_MISC_SLOT_CHARACTERISTICS\r | |
756 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot7Characteristics|0x0|UINT32|0xA0000276\r | |
757 | \r | |
758 | # Defines the designation of system slot8\r | |
759 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot8Designation|"NONE"|VOID*|0xA0000277\r | |
760 | # Defines the type of system slot8\r | |
761 | # The valid range is between 0x01 to 0xA5, and 0x02 here means EfiSlotTypeUnknown\r | |
762 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot8Type|0x2|UINT8|0xA0000278\r | |
763 | # Defines the data bus width of system slot8\r | |
764 | # The valid range is between 0x01 to 0x07, and 0x02 here means EfiSlotDataBusWidthUnknown\r | |
765 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot8DataBusWidth|0x2|UINT8|0xA0000279\r | |
766 | # Defines the usage of system slot8\r | |
767 | # The valid range is between 0x01 to 0x04, and 0x02 here means EfiSlotUsageUnknown\r | |
768 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot8Usage|0x2|UINT8|0xA000027A\r | |
769 | # Defines the length of system slot8\r | |
770 | # The valid range is between 0x01 to 0x04, and 0x02 here means EfiSlotLengthUnknown\r | |
771 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot8Length|0x2|UINT8|0xA000027B\r | |
772 | # Defines the ID of system slot8, a number of UINT16\r | |
773 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot8Id|0x0|UINT16|0xA000027C\r | |
774 | # Defines the characteristics of system slot8 , a bit mask of EFI_MISC_SLOT_CHARACTERISTICS\r | |
775 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot8Characteristics|0x0|UINT32|0xA000027D\r | |
776 | \r | |
777 | # Defines the designation of system slot9\r | |
778 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot9Designation|"NONE"|VOID*|0xA000027E\r | |
779 | # Defines the type of system slot9\r | |
780 | # The valid range is between 0x01 to 0xA5, and 0x02 here means EfiSlotTypeUnknown\r | |
781 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot9Type|0x2|UINT8|0xA000027F\r | |
782 | # Defines the data bus width of system slot9\r | |
783 | # The valid range is between 0x01 to 0x07, and 0x02 here means EfiSlotDataBusWidthUnknown\r | |
784 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot9DataBusWidth|0x2|UINT8|0xA0000280\r | |
785 | # Defines the usage of system slot9\r | |
786 | # The valid range is between 0x01 to 0x04, and 0x02 here means EfiSlotUsageUnknown\r | |
787 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot9Usage|0x2|UINT8|0xA0000281\r | |
788 | # Defines the length of system slot9\r | |
789 | # The valid range is between 0x01 to 0x04, and 0x02 here means EfiSlotLengthUnknown\r | |
790 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot9Length|0x2|UINT8|0xA0000282\r | |
791 | # Defines the ID of system slot9, a number of UINT16\r | |
792 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot9Id|0x0|UINT16|0xA0000283\r | |
793 | # Defines the characteristics of system slot9 , a bit mask of EFI_MISC_SLOT_CHARACTERISTICS\r | |
794 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot9Characteristics|0x0|UINT32|0xA0000284\r | |
795 | \r | |
796 | # Defines the designation of system slot10\r | |
797 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot10Designation|"None"|VOID*|0xA0000285\r | |
798 | # Defines the type of system slot10\r | |
799 | # The valid range is between 0x01 to 0xA5, and 0x02 here means EfiSlotTypeUnknown\r | |
800 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot10Type|0x2|UINT8|0xA0000286\r | |
801 | # Defines the data bus width of system slot10\r | |
802 | # The valid range is between 0x01 to 0x07, and 0x02 here means EfiSlotDataBusWidthUnknown\r | |
803 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot10DataBusWidth|0x2|UINT8|0xA0000287\r | |
804 | # Defines the usage of system slot10\r | |
805 | # The valid range is between 0x01 to 0x04, and 0x02 here means EfiSlotUsageUnknown\r | |
806 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot10Usage|0x2|UINT8|0xA0000288\r | |
807 | # Defines the length of system slot10\r | |
808 | # The valid range is between 0x01 to 0x04, and 0x02 here means EfiSlotLengthUnknown\r | |
809 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot10Length|0x2|UINT8|0xA0000289\r | |
810 | # Defines the ID of system slot10, a number of UINT16\r | |
811 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot10Id|0x0|UINT16|0xA000028A\r | |
812 | # Defines the characteristics of system slot10 , a bit mask of EFI_MISC_SLOT_CHARACTERISTICS\r | |
813 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot10Characteristics|0x0|UINT32|0xA000028B\r | |
814 | \r | |
815 | # Defines the designation of system slot11\r | |
816 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot11Designation|"None"|VOID*|0xA000028C\r | |
817 | # Defines the type of system slot11\r | |
818 | # The valid range is between 0x01 to 0xA5, and 0x02 here means EfiSlotTypeUnknown\r | |
819 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot11Type|0x2|UINT8|0xA000028D\r | |
820 | # Defines the data bus width of system slot11\r | |
821 | # The valid range is between 0x01 to 0x07, and 0x02 here means EfiSlotDataBusWidthUnknown\r | |
822 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot11DataBusWidth|0x2|UINT8|0xA000028E\r | |
823 | # Defines the usage of system slot11\r | |
824 | # The valid range is between 0x01 to 0x04, and 0x02 here means EfiSlotUsageUnknown\r | |
825 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot11Usage|0x2|UINT8|0xA000028F\r | |
826 | # Defines the length of system slot11\r | |
827 | # The valid range is between 0x01 to 0x04, and 0x02 here means EfiSlotLengthUnknown\r | |
828 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot11Length|0x2|UINT8|0xA0000290\r | |
829 | # Defines the ID of system slot11, a number of UINT16\r | |
830 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot11Id|0x0|UINT16|0xA00000EE\r | |
831 | # Defines the characteristics of system slot11 , a bit mask of EFI_MISC_SLOT_CHARACTERISTICS\r | |
832 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot11Characteristics|0x0|UINT32|0xA0000291\r | |
833 | \r | |
834 | # Defines the designation of system slot12\r | |
835 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot12Designation|"None"|VOID*|0xA0000292\r | |
836 | # Defines the type of system slot12\r | |
837 | # The valid range is between 0x01 to 0xA5, and 0x02 here means EfiSlotTypeUnknown\r | |
838 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot12Type|0x2|UINT8|0xA0000293\r | |
839 | # Defines the data bus width of system slot12\r | |
840 | # The valid range is between 0x01 to 0x07, and 0x02 here means EfiSlotDataBusWidthUnknown\r | |
841 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot12DataBusWidth|0x2|UINT8|0xA0000294\r | |
842 | # Defines the usage of system slot12\r | |
843 | # The valid range is between 0x01 to 0x04, and 0x02 here means EfiSlotUsageUnknown\r | |
844 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot12Usage|0x2|UINT8|0xA0000295\r | |
845 | # Defines the length of system slot12\r | |
846 | # The valid range is between 0x01 to 0x04, and 0x02 here means EfiSlotLengthUnknown\r | |
847 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot12Length|0x2|UINT8|0xA0000296\r | |
848 | # Defines the ID of system slot12, a number of UINT16\r | |
849 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot12Id|0x0|UINT16|0xA0000297\r | |
850 | # Defines the characteristics of system slot12 , a bit mask of EFI_MISC_SLOT_CHARACTERISTICS\r | |
851 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot12Characteristics|0x0|UINT32|0xA0000298\r | |
852 | \r | |
853 | # Defines the designation of system slot13\r | |
854 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot13Designation|"None"|VOID*|0xA0000299\r | |
855 | # Defines the type of system slot13\r | |
856 | # The valid range is between 0x01 to 0xA5, and 0x02 here means EfiSlotTypeUnknown\r | |
857 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot13Type|0x2|UINT8|0xA000029A\r | |
858 | # Defines the data bus width of system slot13\r | |
859 | # The valid range is between 0x01 to 0x07, and 0x02 here means EfiSlotDataBusWidthUnknown\r | |
860 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot13DataBusWidth|0x2|UINT8|0xA000029B\r | |
861 | # Defines the usage of system slot13\r | |
862 | # The valid range is between 0x01 to 0x04, and 0x02 here means EfiSlotUsageUnknown\r | |
863 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot13Usage|0x2|UINT8|0xA000029C\r | |
864 | # Defines the length of system slot13\r | |
865 | # The valid range is between 0x01 to 0x04, and 0x02 here means EfiSlotLengthUnknown\r | |
866 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot13Length|0x2|UINT8|0xA000029D\r | |
867 | # Defines the ID of system slot13, a number of UINT16\r | |
868 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot13Id|0x0|UINT16|0xA000029E\r | |
869 | # Defines the characteristics of system slot13 , a bit mask of EFI_MISC_SLOT_CHARACTERISTICS\r | |
870 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot13Characteristics|0x0|UINT32|0xA000029F\r | |
871 | \r | |
872 | # Defines the designation of system slot14\r | |
873 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot14Designation|"None"|VOID*|0xA00002A0\r | |
874 | # Defines the type of system slot14\r | |
875 | # The valid range is between 0x01 to 0xA5, and 0x02 here means EfiSlotTypeUnknown\r | |
876 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot14Type|0x2|UINT8|0xA00002A1\r | |
877 | # Defines the data bus width of system slot14\r | |
878 | # The valid range is between 0x01 to 0x07, and 0x02 here means EfiSlotDataBusWidthUnknown\r | |
879 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot14DataBusWidth|0x2|UINT8|0xA00002A2\r | |
880 | # Defines the usage of system slot14\r | |
881 | # The valid range is between 0x01 to 0x04, and 0x02 here means EfiSlotUsageUnknown\r | |
882 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot14Usage|0x2|UINT8|0xA00002A3\r | |
883 | # Defines the length of system slot14\r | |
884 | # The valid range is between 0x01 to 0x04, and 0x02 here means EfiSlotLengthUnknown\r | |
885 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot14Length|0x2|UINT8|0xA00002A4\r | |
886 | # Defines the ID of system slot14, a number of UINT16\r | |
887 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot14Id|0x0|UINT16|0xA00002A5\r | |
888 | # Defines the characteristics of system slot14 , a bit mask of EFI_MISC_SLOT_CHARACTERISTICS\r | |
889 | gQuarkPlatformTokenSpaceGuid.PcdSMBIOSSystemSlot14Characteristics|0x0|UINT32|0xA00002A6\r | |
890 | \r | |
891 | gQuarkPlatformTokenSpaceGuid.PcdFlashFvPayloadBase|0xFFC00400|UINT32|0xA00002A7\r | |
892 | gQuarkPlatformTokenSpaceGuid.PcdFlashFvPayloadSize|0x000F0000|UINT32|0xA00002A8\r | |
893 | gQuarkPlatformTokenSpaceGuid.PcdFlashFvMainBase|0xFFD00400|UINT32|0xA00002A9\r | |
894 | gQuarkPlatformTokenSpaceGuid.PcdFlashFvMainSize|0x000D0000|UINT32|0xA00002AA\r | |
895 | gQuarkPlatformTokenSpaceGuid.PcdFlashFvRecoveryBase|0xFFEC0400|UINT32|0xA00002AB\r | |
896 | gQuarkPlatformTokenSpaceGuid.PcdFlashFvRecoverySize|0x0003F000|UINT32|0xA00002AC\r | |
897 | \r | |
898 | [PcdsDynamic, PcdsDynamicEx]\r | |
899 | ## Provides the ability to enable the Fast Boot feature of the BIOS. This\r | |
900 | # enables the system to boot faster but may only enumerate the hardware\r | |
901 | # that is required to boot the system.<BR>\r | |
902 | #\r | |
903 | # @Prompt Fast Boot Support\r | |
904 | #\r | |
905 | gQuarkPlatformTokenSpaceGuid.PcdEnableFastBoot|FALSE|BOOLEAN|0xB000004\r | |
906 | \r | |
907 | ## Determines if the user is physically present. This information is collected and shared\r | |
908 | # with all other modules using a dynamic PCD.<BR>\r | |
909 | #\r | |
910 | # @Prompt The User is Physically Present\r | |
911 | #\r | |
912 | gQuarkPlatformTokenSpaceGuid.PcdUserIsPhysicallyPresent|FALSE|BOOLEAN|0xB000006\r | |
913 | \r | |
914 | ## The Quark SOC X1000 Based Platform Type.<BR>\r | |
915 | # 0x0000 - Unknown<BR>\r | |
916 | # 0x0001 - Quark Emulation<BR>\r | |
917 | # 0x0002 - ClantonPeak SVP<BR>\r | |
918 | # 0x0003 - KipsBay<BR>\r | |
919 | # 0x0004 - CrossHill<BR>\r | |
920 | # 0x0005 - ClantonHill<BR>\r | |
921 | # 0x0006 - Galileo Gen 1<BR>\r | |
922 | # 0x0007 - Reserved<BR>\r | |
923 | # 0x0008 - Galileo Gen 2<BR>\r | |
924 | #\r | |
925 | # @Prompt The Quark SOC X1000 Based Platform Type\r | |
926 | #\r | |
927 | gQuarkPlatformTokenSpaceGuid.PcdPlatformType|0x0008|UINT16|0xB000007\r | |
928 | \r | |
929 | ## The Quark SOC X1000 Based Platform Type Name.<BR>\r | |
930 | #\r | |
931 | # @Prompt The Quark SOC X1000 Based Platform Type Name\r | |
932 | #\r | |
933 | gQuarkPlatformTokenSpaceGuid.PcdPlatformTypeName|L"GalileoGen2"|VOID*|0xB000008\r | |
934 | \r | |
935 | ## The size, in bytes, of the SPI FLASH part attached to Quark SOC X1000\r | |
936 | #\r | |
937 | # @Prompt The SPI FALSH Part Size\r | |
938 | #\r | |
939 | gQuarkPlatformTokenSpaceGuid.PcdSpiFlashDeviceSize|0|UINT32|0xB000009\r |