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1 | /** @file\r |
2 | This file contains the descriptor definination of OHCI spec\r | |
3 | \r | |
4 | Copyright (c) 2013-2015 Intel Corporation.\r | |
5 | \r | |
6 | This program and the accompanying materials\r | |
7 | are licensed and made available under the terms and conditions of the BSD License\r | |
8 | which accompanies this distribution. The full text of the license may be found at\r | |
9 | http://opensource.org/licenses/bsd-license.php\r | |
10 | \r | |
11 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
12 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
13 | \r | |
14 | **/\r | |
15 | \r | |
16 | \r | |
17 | \r | |
18 | #ifndef _DESCRIPTOR_H\r | |
19 | #define _DESCRIPTOR_H\r | |
20 | \r | |
21 | #define ED_FUNC_ADD 0x0001\r | |
22 | #define ED_ENDPT_NUM 0x0002\r | |
23 | #define ED_DIR 0x0004\r | |
24 | #define ED_SPEED 0x0008\r | |
25 | #define ED_SKIP 0x0010\r | |
26 | #define ED_FORMAT 0x0020\r | |
27 | #define ED_MAX_PACKET 0x0040\r | |
28 | #define ED_TDTAIL_PTR 0x0080\r | |
29 | #define ED_HALTED 0x0100\r | |
30 | #define ED_DTTOGGLE 0x0200\r | |
31 | #define ED_TDHEAD_PTR 0x0400\r | |
32 | #define ED_NEXT_EDPTR 0x0800\r | |
33 | #define ED_PDATA 0x1000\r | |
34 | #define ED_ZERO 0x2000\r | |
35 | \r | |
36 | #define TD_BUFFER_ROUND 0x0001\r | |
37 | #define TD_DIR_PID 0x0002\r | |
38 | #define TD_DELAY_INT 0x0004\r | |
39 | #define TD_DT_TOGGLE 0x0008\r | |
40 | #define TD_ERROR_CNT 0x0010\r | |
41 | #define TD_COND_CODE 0x0020\r | |
42 | #define TD_CURR_BUFFER_PTR 0x0040\r | |
43 | #define TD_NEXT_PTR 0x0080\r | |
44 | #define TD_BUFFER_END_PTR 0x0100\r | |
45 | #define TD_PDATA 0x0200\r | |
46 | \r | |
47 | #define ED_FROM_TD_DIR 0x0\r | |
48 | #define ED_OUT_DIR 0x1\r | |
49 | #define ED_IN_DIR 0x2\r | |
50 | #define ED_FROM_TD_ALSO_DIR 0x3\r | |
51 | \r | |
52 | #define TD_SETUP_PID 0x00\r | |
53 | #define TD_OUT_PID 0x01\r | |
54 | #define TD_IN_PID 0x02\r | |
55 | #define TD_NODATA_PID 0x03\r | |
56 | \r | |
57 | #define HI_SPEED 0\r | |
58 | #define LO_SPEED 1\r | |
59 | \r | |
60 | #define TD_NO_ERROR 0x00\r | |
61 | #define TD_CRC_ERROR 0x01\r | |
62 | #define TD_BITSTUFFING_ERROR 0x02\r | |
63 | #define TD_TOGGLE_ERROR 0x03\r | |
64 | #define TD_DEVICE_STALL 0x04\r | |
65 | #define TD_NO_RESPONSE 0x05\r | |
66 | #define TD_PIDCHK_FAIL 0x06\r | |
67 | #define TD_PID_UNEXPECTED 0x07\r | |
68 | #define TD_DATA_OVERRUN 0x08\r | |
69 | #define TD_DATA_UNDERRUN 0x09\r | |
70 | #define TD_BUFFER_OVERRUN 0x0C\r | |
71 | #define TD_BUFFER_UNDERRUN 0x0D\r | |
72 | #define TD_TOBE_PROCESSED 0x0E\r | |
73 | #define TD_TOBE_PROCESSED_2 0x0F\r | |
74 | \r | |
75 | #define TD_NO_DELAY 0x7\r | |
76 | \r | |
77 | #define TD_INT 0x1\r | |
78 | #define TD_CTL 0x2\r | |
79 | #define TD_BLK 0x3\r | |
80 | \r | |
81 | typedef struct {\r | |
82 | UINT32 Reserved:18;\r | |
83 | UINT32 BufferRounding:1;\r | |
84 | UINT32 DirPID:2;\r | |
85 | UINT32 DelayInterrupt:3;\r | |
86 | UINT32 DataToggle:2;\r | |
87 | UINT32 ErrorCount:2;\r | |
88 | UINT32 ConditionCode:4;\r | |
89 | } TD_DESCRIPTOR_WORD0;\r | |
90 | \r | |
91 | typedef struct _TD_DESCRIPTOR {\r | |
92 | TD_DESCRIPTOR_WORD0 Word0;\r | |
93 | UINT32 CurrBufferPointer; // 32-bit Physical Address of buffer\r | |
94 | UINT32 NextTD; // 32-bit Physical Address of TD_DESCRIPTOR\r | |
95 | UINT32 BufferEndPointer; // 32-bit Physical Address of buffer\r | |
96 | UINT32 NextTDPointer; // 32-bit Physical Address of TD_DESCRIPTOR\r | |
97 | UINT32 DataBuffer; // 32-bit Physical Address of buffer\r | |
98 | UINT32 ActualSendLength;\r | |
99 | UINT32 Reserved;\r | |
100 | } TD_DESCRIPTOR;\r | |
101 | \r | |
102 | typedef struct {\r | |
103 | UINT32 FunctionAddress:7;\r | |
104 | UINT32 EndPointNum:4;\r | |
105 | UINT32 Direction:2;\r | |
106 | UINT32 Speed:1;\r | |
107 | UINT32 Skip:1;\r | |
108 | UINT32 Format:1;\r | |
109 | UINT32 MaxPacketSize:11;\r | |
110 | UINT32 FreeSpace:5;\r | |
111 | } ED_DESCRIPTOR_WORD0;\r | |
112 | \r | |
113 | typedef struct {\r | |
114 | UINT32 Halted:1;\r | |
115 | UINT32 ToggleCarry:1;\r | |
116 | UINT32 Zero:2;\r | |
117 | UINT32 TdHeadPointer:28;\r | |
118 | } ED_DESCRIPTOR_WORD2;\r | |
119 | \r | |
120 | typedef struct _ED_DESCRIPTOR {\r | |
121 | ED_DESCRIPTOR_WORD0 Word0;\r | |
122 | UINT32 TdTailPointer; // 32-bit Physical Address of TD_DESCRIPTOR\r | |
123 | ED_DESCRIPTOR_WORD2 Word2;\r | |
124 | UINT32 NextED; // 32-bit Physical Address of ED_DESCRIPTOR\r | |
125 | } ED_DESCRIPTOR;\r | |
126 | \r | |
127 | #define TD_PTR(p) ((TD_DESCRIPTOR *)(UINTN)((p) << 4))\r | |
128 | #define ED_PTR(p) ((ED_DESCRIPTOR *)(UINTN)((p) << 4))\r | |
129 | #define RIGHT_SHIFT_4(p) ((UINT32)(p) >> 4)\r | |
130 | \r | |
131 | typedef enum {\r | |
132 | CONTROL_LIST,\r | |
133 | BULK_LIST,\r | |
134 | INTERRUPT_LIST,\r | |
135 | ISOCHRONOUS_LIST\r | |
136 | } DESCRIPTOR_LIST_TYPE;\r | |
137 | \r | |
138 | #endif\r |