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1 | /** @file\r |
2 | The OHCI register operation routines.\r | |
3 | \r | |
4 | Copyright (c) 2013-2015 Intel Corporation.\r | |
5 | \r | |
6 | This program and the accompanying materials\r | |
7 | are licensed and made available under the terms and conditions of the BSD License\r | |
8 | which accompanies this distribution. The full text of the license may be found at\r | |
9 | http://opensource.org/licenses/bsd-license.php\r | |
10 | \r | |
11 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
12 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
13 | \r | |
14 | **/\r | |
15 | \r | |
16 | \r | |
17 | #include "Ohci.h"\r | |
18 | \r | |
19 | /**\r | |
20 | \r | |
21 | Get OHCI operational reg value\r | |
22 | \r | |
23 | @param PciIo PciIo protocol instance\r | |
24 | @param Offset Offset of the operational reg\r | |
25 | \r | |
26 | @retval Value of the register\r | |
27 | \r | |
28 | **/\r | |
29 | UINT32\r | |
30 | OhciGetOperationalReg (\r | |
31 | IN EFI_PCI_IO_PROTOCOL *PciIo,\r | |
32 | IN UINT32 Offset\r | |
33 | )\r | |
34 | {\r | |
35 | UINT32 Value;\r | |
36 | EFI_STATUS Status;\r | |
37 | \r | |
38 | Status = PciIo->Mem.Read(PciIo, EfiPciIoWidthUint32, OHC_BAR_INDEX, Offset, 1, &Value);\r | |
39 | \r | |
40 | return Value;\r | |
41 | }\r | |
42 | /**\r | |
43 | \r | |
44 | Set OHCI operational reg value\r | |
45 | \r | |
46 | @param PciIo PCI Bus Io protocol instance\r | |
47 | @param Offset Offset of the operational reg\r | |
48 | @param Value Value to set\r | |
49 | \r | |
50 | @retval EFI_SUCCESS Value set to the reg\r | |
51 | \r | |
52 | **/\r | |
53 | \r | |
54 | \r | |
55 | EFI_STATUS\r | |
56 | OhciSetOperationalReg (\r | |
57 | IN EFI_PCI_IO_PROTOCOL *PciIo,\r | |
58 | IN UINT32 Offset,\r | |
59 | IN VOID *Value\r | |
60 | )\r | |
61 | {\r | |
62 | EFI_STATUS Status;\r | |
63 | \r | |
64 | Status = PciIo->Mem.Write(PciIo, EfiPciIoWidthUint32, OHC_BAR_INDEX, Offset, 1, Value);\r | |
65 | \r | |
66 | return Status;\r | |
67 | }\r | |
68 | /**\r | |
69 | \r | |
70 | Get HcRevision reg value\r | |
71 | \r | |
72 | @param PciIo PCI Bus Io protocol instance\r | |
73 | \r | |
74 | @retval Value of the register\r | |
75 | \r | |
76 | **/\r | |
77 | \r | |
78 | \r | |
79 | UINT32\r | |
80 | OhciGetHcRevision (\r | |
81 | IN EFI_PCI_IO_PROTOCOL *PciIo\r | |
82 | )\r | |
83 | {\r | |
84 | return OhciGetOperationalReg (PciIo, HC_REVISION);\r | |
85 | }\r | |
86 | /**\r | |
87 | \r | |
88 | Set HcReset reg value\r | |
89 | \r | |
90 | @param Ohc UHC private data\r | |
91 | @param Field Field to set\r | |
92 | @param Value Value to set\r | |
93 | \r | |
94 | @retval EFI_SUCCESS Value set\r | |
95 | \r | |
96 | **/\r | |
97 | \r | |
98 | EFI_STATUS\r | |
99 | OhciSetHcReset (\r | |
100 | IN USB_OHCI_HC_DEV *Ohc,\r | |
101 | IN UINT32 Field,\r | |
102 | IN UINT32 Value\r | |
103 | )\r | |
104 | {\r | |
105 | EFI_STATUS Status;\r | |
106 | HcRESET Reset;\r | |
107 | \r | |
108 | Status = EFI_SUCCESS;\r | |
109 | *(UINT32 *) &Reset = OhciGetOperationalReg (Ohc->PciIo, USBHOST_OFFSET_UHCHR);\r | |
110 | \r | |
111 | if (Field & RESET_SYSTEM_BUS) {\r | |
112 | Reset.FSBIR = Value;\r | |
113 | }\r | |
114 | \r | |
115 | if (Field & RESET_HOST_CONTROLLER) {\r | |
116 | Reset.FHR = Value;\r | |
117 | }\r | |
118 | \r | |
119 | if (Field & RESET_CLOCK_GENERATION) {\r | |
120 | Reset.CGR = Value;\r | |
121 | }\r | |
122 | \r | |
123 | if (Field & RESET_SSE_GLOBAL) {\r | |
124 | Reset.SSE = Value;\r | |
125 | }\r | |
126 | \r | |
127 | if (Field & RESET_PSPL) {\r | |
128 | Reset.PSPL = Value;\r | |
129 | }\r | |
130 | \r | |
131 | if (Field & RESET_PCPL) {\r | |
132 | Reset.PCPL = Value;\r | |
133 | }\r | |
134 | \r | |
135 | if (Field & RESET_SSEP1) {\r | |
136 | Reset.SSEP1 = Value;\r | |
137 | }\r | |
138 | \r | |
139 | if (Field & RESET_SSEP2) {\r | |
140 | Reset.SSEP2 = Value;\r | |
141 | }\r | |
142 | \r | |
143 | if (Field & RESET_SSEP3) {\r | |
144 | Reset.SSEP3 = Value;\r | |
145 | }\r | |
146 | \r | |
147 | OhciSetOperationalReg (Ohc->PciIo, USBHOST_OFFSET_UHCHR, &Reset);\r | |
148 | \r | |
149 | return EFI_SUCCESS;\r | |
150 | }\r | |
151 | \r | |
152 | /**\r | |
153 | \r | |
154 | Get specific field of HcReset reg value\r | |
155 | \r | |
156 | @param Ohc UHC private data\r | |
157 | @param Field Field to get\r | |
158 | \r | |
159 | @retval Value of the field\r | |
160 | \r | |
161 | **/\r | |
162 | \r | |
163 | UINT32\r | |
164 | OhciGetHcReset (\r | |
165 | IN USB_OHCI_HC_DEV *Ohc,\r | |
166 | IN UINT32 Field\r | |
167 | )\r | |
168 | {\r | |
169 | HcRESET Reset;\r | |
170 | UINT32 Value;\r | |
171 | \r | |
172 | \r | |
173 | *(UINT32 *) &Reset = OhciGetOperationalReg (Ohc->PciIo, USBHOST_OFFSET_UHCHR);\r | |
174 | Value = 0;\r | |
175 | \r | |
176 | switch (Field) {\r | |
177 | case RESET_SYSTEM_BUS:\r | |
178 | Value = Reset.FSBIR;\r | |
179 | break;\r | |
180 | \r | |
181 | case RESET_HOST_CONTROLLER:\r | |
182 | Value = Reset.FHR;\r | |
183 | break;\r | |
184 | \r | |
185 | case RESET_CLOCK_GENERATION:\r | |
186 | Value = Reset.CGR;\r | |
187 | break;\r | |
188 | \r | |
189 | case RESET_SSE_GLOBAL:\r | |
190 | Value = Reset.SSE;\r | |
191 | break;\r | |
192 | \r | |
193 | case RESET_PSPL:\r | |
194 | Value = Reset.PSPL;\r | |
195 | break;\r | |
196 | \r | |
197 | case RESET_PCPL:\r | |
198 | Value = Reset.PCPL;\r | |
199 | break;\r | |
200 | \r | |
201 | case RESET_SSEP1:\r | |
202 | Value = Reset.SSEP1;\r | |
203 | break;\r | |
204 | \r | |
205 | case RESET_SSEP2:\r | |
206 | Value = Reset.SSEP2;\r | |
207 | break;\r | |
208 | \r | |
209 | case RESET_SSEP3:\r | |
210 | Value = Reset.SSEP3;\r | |
211 | break;\r | |
212 | \r | |
213 | default:\r | |
214 | ASSERT (FALSE);\r | |
215 | }\r | |
216 | \r | |
217 | \r | |
218 | return Value;\r | |
219 | }\r | |
220 | \r | |
221 | /**\r | |
222 | \r | |
223 | Set HcControl reg value\r | |
224 | \r | |
225 | @param Ohc UHC private data\r | |
226 | @param Field Field to set\r | |
227 | @param Value Value to set\r | |
228 | \r | |
229 | @retval EFI_SUCCESS Value set\r | |
230 | \r | |
231 | **/\r | |
232 | \r | |
233 | EFI_STATUS\r | |
234 | OhciSetHcControl (\r | |
235 | IN USB_OHCI_HC_DEV *Ohc,\r | |
236 | IN UINTN Field,\r | |
237 | IN UINT32 Value\r | |
238 | )\r | |
239 | {\r | |
240 | EFI_STATUS Status;\r | |
241 | HcCONTROL Control;\r | |
242 | \r | |
243 | \r | |
244 | \r | |
245 | *(UINT32 *) &Control = OhciGetOperationalReg (Ohc->PciIo, HC_CONTROL);\r | |
246 | \r | |
247 | if (Field & CONTROL_BULK_RATIO) {\r | |
248 | Control.ControlBulkRatio = Value;\r | |
249 | }\r | |
250 | \r | |
251 | if (Field & HC_FUNCTIONAL_STATE) {\r | |
252 | Control.FunctionalState = Value;\r | |
253 | }\r | |
254 | \r | |
255 | if (Field & PERIODIC_ENABLE) {\r | |
256 | Control.PeriodicEnable = Value;\r | |
257 | }\r | |
258 | \r | |
259 | if (Field & CONTROL_ENABLE) {\r | |
260 | Control.ControlEnable = Value;\r | |
261 | }\r | |
262 | \r | |
263 | if (Field & ISOCHRONOUS_ENABLE) {\r | |
264 | Control.IsochronousEnable = Value;\r | |
265 | }\r | |
266 | \r | |
267 | if (Field & BULK_ENABLE) {\r | |
268 | Control.BulkEnable = Value;\r | |
269 | }\r | |
270 | \r | |
271 | if (Field & INTERRUPT_ROUTING) {\r | |
272 | Control.InterruptRouting = Value;\r | |
273 | }\r | |
274 | \r | |
275 | Status = OhciSetOperationalReg (Ohc->PciIo, HC_CONTROL, &Control);\r | |
276 | \r | |
277 | return Status;\r | |
278 | }\r | |
279 | \r | |
280 | \r | |
281 | /**\r | |
282 | \r | |
283 | Get specific field of HcControl reg value\r | |
284 | \r | |
285 | @param Ohc UHC private data\r | |
286 | @param Field Field to get\r | |
287 | \r | |
288 | @retval Value of the field\r | |
289 | \r | |
290 | **/\r | |
291 | \r | |
292 | \r | |
293 | UINT32\r | |
294 | OhciGetHcControl (\r | |
295 | IN USB_OHCI_HC_DEV *Ohc,\r | |
296 | IN UINTN Field\r | |
297 | )\r | |
298 | {\r | |
299 | HcCONTROL Control;\r | |
300 | \r | |
301 | *(UINT32 *) &Control = OhciGetOperationalReg (Ohc->PciIo, HC_CONTROL);\r | |
302 | \r | |
303 | switch (Field) {\r | |
304 | case CONTROL_BULK_RATIO:\r | |
305 | return Control.ControlBulkRatio;\r | |
306 | break;\r | |
307 | case PERIODIC_ENABLE:\r | |
308 | return Control.PeriodicEnable;\r | |
309 | break;\r | |
310 | case CONTROL_ENABLE:\r | |
311 | return Control.ControlEnable;\r | |
312 | break;\r | |
313 | case BULK_ENABLE:\r | |
314 | return Control.BulkEnable;\r | |
315 | break;\r | |
316 | case ISOCHRONOUS_ENABLE:\r | |
317 | return Control.IsochronousEnable;\r | |
318 | break;\r | |
319 | case HC_FUNCTIONAL_STATE:\r | |
320 | return Control.FunctionalState;\r | |
321 | break;\r | |
322 | case INTERRUPT_ROUTING:\r | |
323 | return Control.InterruptRouting;\r | |
324 | break;\r | |
325 | default:\r | |
326 | ASSERT (FALSE);\r | |
327 | }\r | |
328 | \r | |
329 | return 0;\r | |
330 | }\r | |
331 | \r | |
332 | /**\r | |
333 | \r | |
334 | Set HcCommand reg value\r | |
335 | \r | |
336 | @param Ohc UHC private data\r | |
337 | @param Field Field to set\r | |
338 | @param Value Value to set\r | |
339 | \r | |
340 | @retval EFI_SUCCESS Value set\r | |
341 | \r | |
342 | **/\r | |
343 | \r | |
344 | EFI_STATUS\r | |
345 | OhciSetHcCommandStatus (\r | |
346 | IN USB_OHCI_HC_DEV *Ohc,\r | |
347 | IN UINTN Field,\r | |
348 | IN UINT32 Value\r | |
349 | )\r | |
350 | {\r | |
351 | EFI_STATUS Status;\r | |
352 | HcCOMMAND_STATUS CommandStatus;\r | |
353 | \r | |
354 | ZeroMem (&CommandStatus, sizeof (HcCOMMAND_STATUS));\r | |
355 | \r | |
356 | if(Field & HC_RESET){\r | |
357 | CommandStatus.HcReset = Value;\r | |
358 | }\r | |
359 | \r | |
360 | if(Field & CONTROL_LIST_FILLED){\r | |
361 | CommandStatus.ControlListFilled = Value;\r | |
362 | }\r | |
363 | \r | |
364 | if(Field & BULK_LIST_FILLED){\r | |
365 | CommandStatus.BulkListFilled = Value;\r | |
366 | }\r | |
367 | \r | |
368 | if(Field & CHANGE_OWNER_REQUEST){\r | |
369 | CommandStatus.ChangeOwnerRequest = Value;\r | |
370 | }\r | |
371 | \r | |
372 | if(Field & SCHEDULE_OVERRUN_COUNT){\r | |
373 | CommandStatus.ScheduleOverrunCount = Value;\r | |
374 | }\r | |
375 | \r | |
376 | Status = OhciSetOperationalReg (Ohc->PciIo, HC_COMMAND_STATUS, &CommandStatus);\r | |
377 | \r | |
378 | return Status;\r | |
379 | }\r | |
380 | \r | |
381 | /**\r | |
382 | \r | |
383 | Get specific field of HcCommand reg value\r | |
384 | \r | |
385 | @param Ohc UHC private data\r | |
386 | @param Field Field to get\r | |
387 | \r | |
388 | @retval Value of the field\r | |
389 | \r | |
390 | **/\r | |
391 | \r | |
392 | UINT32\r | |
393 | OhciGetHcCommandStatus (\r | |
394 | IN USB_OHCI_HC_DEV *Ohc,\r | |
395 | IN UINTN Field\r | |
396 | )\r | |
397 | {\r | |
398 | HcCOMMAND_STATUS CommandStatus;\r | |
399 | \r | |
400 | *(UINT32 *) &CommandStatus = OhciGetOperationalReg (Ohc->PciIo, HC_COMMAND_STATUS);\r | |
401 | \r | |
402 | switch (Field){\r | |
403 | case HC_RESET:\r | |
404 | return CommandStatus.HcReset;\r | |
405 | break;\r | |
406 | case CONTROL_LIST_FILLED:\r | |
407 | return CommandStatus.ControlListFilled;\r | |
408 | break;\r | |
409 | case BULK_LIST_FILLED:\r | |
410 | return CommandStatus.BulkListFilled;\r | |
411 | break;\r | |
412 | case CHANGE_OWNER_REQUEST:\r | |
413 | return CommandStatus.ChangeOwnerRequest;\r | |
414 | break;\r | |
415 | case SCHEDULE_OVERRUN_COUNT:\r | |
416 | return CommandStatus.ScheduleOverrunCount;\r | |
417 | break;\r | |
418 | default:\r | |
419 | ASSERT (FALSE);\r | |
420 | }\r | |
421 | \r | |
422 | return 0;\r | |
423 | }\r | |
424 | \r | |
425 | /**\r | |
426 | \r | |
427 | Clear specific fields of Interrupt Status\r | |
428 | \r | |
429 | @param Ohc UHC private data\r | |
430 | @param Field Field to clear\r | |
431 | \r | |
432 | @retval EFI_SUCCESS Fields cleared\r | |
433 | \r | |
434 | **/\r | |
435 | \r | |
436 | EFI_STATUS\r | |
437 | OhciClearInterruptStatus (\r | |
438 | IN USB_OHCI_HC_DEV *Ohc,\r | |
439 | IN UINTN Field\r | |
440 | )\r | |
441 | {\r | |
442 | EFI_STATUS Status;\r | |
443 | HcINTERRUPT_STATUS InterruptStatus;\r | |
444 | \r | |
445 | ZeroMem (&InterruptStatus, sizeof (HcINTERRUPT_STATUS));\r | |
446 | \r | |
447 | if(Field & SCHEDULE_OVERRUN){\r | |
448 | InterruptStatus.SchedulingOverrun = 1;\r | |
449 | }\r | |
450 | \r | |
451 | if(Field & WRITEBACK_DONE_HEAD){\r | |
452 | InterruptStatus.WriteBackDone = 1;\r | |
453 | }\r | |
454 | if(Field & START_OF_FRAME){\r | |
455 | InterruptStatus.Sof = 1;\r | |
456 | }\r | |
457 | \r | |
458 | if(Field & RESUME_DETECT){\r | |
459 | InterruptStatus.ResumeDetected = 1;\r | |
460 | }\r | |
461 | \r | |
462 | if(Field & UNRECOVERABLE_ERROR){\r | |
463 | InterruptStatus.UnrecoverableError = 1;\r | |
464 | }\r | |
465 | \r | |
466 | if(Field & FRAME_NUMBER_OVERFLOW){\r | |
467 | InterruptStatus.FrameNumOverflow = 1;\r | |
468 | }\r | |
469 | \r | |
470 | if(Field & ROOTHUB_STATUS_CHANGE){\r | |
471 | InterruptStatus.RHStatusChange = 1;\r | |
472 | }\r | |
473 | \r | |
474 | if(Field & OWNERSHIP_CHANGE){\r | |
475 | InterruptStatus.OwnerChange = 1;\r | |
476 | }\r | |
477 | \r | |
478 | Status = OhciSetOperationalReg (Ohc->PciIo, HC_INTERRUPT_STATUS, &InterruptStatus);\r | |
479 | \r | |
480 | return Status;\r | |
481 | }\r | |
482 | \r | |
483 | /**\r | |
484 | \r | |
485 | Get fields of HcInterrupt reg value\r | |
486 | \r | |
487 | @param Ohc UHC private data\r | |
488 | @param Field Field to get\r | |
489 | \r | |
490 | @retval Value of the field\r | |
491 | \r | |
492 | **/\r | |
493 | \r | |
494 | UINT32\r | |
495 | OhciGetHcInterruptStatus (\r | |
496 | IN USB_OHCI_HC_DEV *Ohc,\r | |
497 | IN UINTN Field\r | |
498 | )\r | |
499 | {\r | |
500 | HcINTERRUPT_STATUS InterruptStatus;\r | |
501 | \r | |
502 | *(UINT32 *) &InterruptStatus = OhciGetOperationalReg (Ohc->PciIo, HC_INTERRUPT_STATUS);\r | |
503 | \r | |
504 | switch (Field){\r | |
505 | case SCHEDULE_OVERRUN:\r | |
506 | return InterruptStatus.SchedulingOverrun;\r | |
507 | break;\r | |
508 | \r | |
509 | case WRITEBACK_DONE_HEAD:\r | |
510 | return InterruptStatus.WriteBackDone;\r | |
511 | break;\r | |
512 | \r | |
513 | case START_OF_FRAME:\r | |
514 | return InterruptStatus.Sof;\r | |
515 | break;\r | |
516 | \r | |
517 | case RESUME_DETECT:\r | |
518 | return InterruptStatus.ResumeDetected;\r | |
519 | break;\r | |
520 | \r | |
521 | case UNRECOVERABLE_ERROR:\r | |
522 | return InterruptStatus.UnrecoverableError;\r | |
523 | break;\r | |
524 | \r | |
525 | case FRAME_NUMBER_OVERFLOW:\r | |
526 | return InterruptStatus.FrameNumOverflow;\r | |
527 | break;\r | |
528 | \r | |
529 | case ROOTHUB_STATUS_CHANGE:\r | |
530 | return InterruptStatus.RHStatusChange;\r | |
531 | break;\r | |
532 | \r | |
533 | case OWNERSHIP_CHANGE:\r | |
534 | return InterruptStatus.OwnerChange;\r | |
535 | break;\r | |
536 | \r | |
537 | default:\r | |
538 | ASSERT (FALSE);\r | |
539 | }\r | |
540 | \r | |
541 | return 0;\r | |
542 | }\r | |
543 | \r | |
544 | /**\r | |
545 | \r | |
546 | Set Interrupt Control reg value\r | |
547 | \r | |
548 | @param Ohc UHC private data\r | |
549 | @param StatEnable Enable or Disable\r | |
550 | @param Field Field to set\r | |
551 | @param Value Value to set\r | |
552 | \r | |
553 | @retval EFI_SUCCESS Value set\r | |
554 | \r | |
555 | **/\r | |
556 | \r | |
557 | EFI_STATUS\r | |
558 | OhciSetInterruptControl (\r | |
559 | IN USB_OHCI_HC_DEV *Ohc,\r | |
560 | IN BOOLEAN StatEnable,\r | |
561 | IN UINTN Field,\r | |
562 | IN UINT32 Value\r | |
563 | )\r | |
564 | {\r | |
565 | EFI_STATUS Status;\r | |
566 | HcINTERRUPT_CONTROL InterruptState;\r | |
567 | \r | |
568 | \r | |
569 | ZeroMem (&InterruptState, sizeof (HcINTERRUPT_CONTROL));\r | |
570 | \r | |
571 | if(Field & SCHEDULE_OVERRUN) {\r | |
572 | InterruptState.SchedulingOverrunInt = Value;\r | |
573 | }\r | |
574 | \r | |
575 | if(Field & WRITEBACK_DONE_HEAD) {\r | |
576 | InterruptState.WriteBackDoneInt = Value;\r | |
577 | }\r | |
578 | if(Field & START_OF_FRAME) {\r | |
579 | InterruptState.SofInt = Value;\r | |
580 | }\r | |
581 | \r | |
582 | if(Field & RESUME_DETECT) {\r | |
583 | InterruptState.ResumeDetectedInt = Value;\r | |
584 | }\r | |
585 | \r | |
586 | if(Field & UNRECOVERABLE_ERROR) {\r | |
587 | InterruptState.UnrecoverableErrorInt = Value;\r | |
588 | }\r | |
589 | \r | |
590 | if(Field & FRAME_NUMBER_OVERFLOW) {\r | |
591 | InterruptState.FrameNumOverflowInt = Value;\r | |
592 | }\r | |
593 | \r | |
594 | if(Field & ROOTHUB_STATUS_CHANGE) {\r | |
595 | InterruptState.RHStatusChangeInt = Value;\r | |
596 | }\r | |
597 | \r | |
598 | if(Field & OWNERSHIP_CHANGE) {\r | |
599 | InterruptState.OwnerChangedInt = Value;\r | |
600 | }\r | |
601 | \r | |
602 | if(Field & MASTER_INTERRUPT) {\r | |
603 | InterruptState.MasterInterruptEnable = Value;\r | |
604 | }\r | |
605 | \r | |
606 | if (StatEnable) {\r | |
607 | Status = OhciSetOperationalReg (Ohc->PciIo, HC_INTERRUPT_ENABLE, &InterruptState);\r | |
608 | } else {\r | |
609 | Status = OhciSetOperationalReg (Ohc->PciIo, HC_INTERRUPT_DISABLE, &InterruptState);\r | |
610 | }\r | |
611 | \r | |
612 | return Status;\r | |
613 | }\r | |
614 | \r | |
615 | /**\r | |
616 | \r | |
617 | Get field of HcInterruptControl reg value\r | |
618 | \r | |
619 | @param Ohc UHC private data\r | |
620 | @param Field Field to get\r | |
621 | \r | |
622 | @retval Value of the field\r | |
623 | \r | |
624 | **/\r | |
625 | \r | |
626 | UINT32\r | |
627 | OhciGetHcInterruptControl (\r | |
628 | IN USB_OHCI_HC_DEV *Ohc,\r | |
629 | IN UINTN Field\r | |
630 | )\r | |
631 | {\r | |
632 | HcINTERRUPT_CONTROL InterruptState;\r | |
633 | \r | |
634 | *(UINT32 *) &InterruptState = OhciGetOperationalReg (Ohc->PciIo, HC_INTERRUPT_ENABLE);\r | |
635 | \r | |
636 | switch (Field){\r | |
637 | case SCHEDULE_OVERRUN:\r | |
638 | return InterruptState.SchedulingOverrunInt;\r | |
639 | break;\r | |
640 | \r | |
641 | case WRITEBACK_DONE_HEAD:\r | |
642 | return InterruptState.WriteBackDoneInt;\r | |
643 | break;\r | |
644 | \r | |
645 | case START_OF_FRAME:\r | |
646 | return InterruptState.SofInt;\r | |
647 | break;\r | |
648 | \r | |
649 | case RESUME_DETECT:\r | |
650 | return InterruptState.ResumeDetectedInt;\r | |
651 | break;\r | |
652 | \r | |
653 | case UNRECOVERABLE_ERROR:\r | |
654 | return InterruptState.UnrecoverableErrorInt;\r | |
655 | break;\r | |
656 | \r | |
657 | case FRAME_NUMBER_OVERFLOW:\r | |
658 | return InterruptState.FrameNumOverflowInt;\r | |
659 | break;\r | |
660 | \r | |
661 | case ROOTHUB_STATUS_CHANGE:\r | |
662 | return InterruptState.RHStatusChangeInt;\r | |
663 | break;\r | |
664 | \r | |
665 | case OWNERSHIP_CHANGE:\r | |
666 | return InterruptState.OwnerChangedInt;\r | |
667 | break;\r | |
668 | \r | |
669 | case MASTER_INTERRUPT:\r | |
670 | return InterruptState.MasterInterruptEnable;\r | |
671 | break;\r | |
672 | \r | |
673 | default:\r | |
674 | ASSERT (FALSE);\r | |
675 | }\r | |
676 | \r | |
677 | return 0;\r | |
678 | }\r | |
679 | \r | |
680 | /**\r | |
681 | \r | |
682 | Set memory pointer of specific type\r | |
683 | \r | |
684 | @param Ohc UHC private data\r | |
685 | @param PointerType Type of the pointer to set\r | |
686 | @param Value Value to set\r | |
687 | \r | |
688 | @retval EFI_SUCCESS Memory pointer set\r | |
689 | \r | |
690 | **/\r | |
691 | \r | |
692 | EFI_STATUS\r | |
693 | OhciSetMemoryPointer(\r | |
694 | IN USB_OHCI_HC_DEV *Ohc,\r | |
695 | IN UINT32 PointerType,\r | |
696 | IN VOID *Value\r | |
697 | )\r | |
698 | {\r | |
699 | EFI_STATUS Status;\r | |
700 | UINT32 Verify;\r | |
701 | \r | |
702 | Status = OhciSetOperationalReg (Ohc->PciIo, PointerType, &Value);\r | |
703 | \r | |
704 | if (EFI_ERROR (Status)) {\r | |
705 | return Status;\r | |
706 | }\r | |
707 | \r | |
708 | Verify = OhciGetOperationalReg (Ohc->PciIo, PointerType);\r | |
709 | \r | |
710 | while (Verify != (UINT32)(UINTN) Value) {\r | |
711 | gBS->Stall(1000);\r | |
712 | Verify = OhciGetOperationalReg (Ohc->PciIo, PointerType);\r | |
713 | };\r | |
714 | \r | |
715 | \r | |
716 | return Status;\r | |
717 | }\r | |
718 | \r | |
719 | /**\r | |
720 | \r | |
721 | Get memory pointer of specific type\r | |
722 | \r | |
723 | @param Ohc UHC private data\r | |
724 | @param PointerType Type of pointer\r | |
725 | \r | |
726 | @retval Memory pointer of the specific type\r | |
727 | \r | |
728 | **/\r | |
729 | \r | |
730 | VOID *\r | |
731 | OhciGetMemoryPointer (\r | |
732 | IN USB_OHCI_HC_DEV *Ohc,\r | |
733 | IN UINT32 PointerType\r | |
734 | )\r | |
735 | {\r | |
736 | \r | |
737 | return (VOID *)(UINTN) OhciGetOperationalReg (Ohc->PciIo, PointerType);\r | |
738 | }\r | |
739 | \r | |
740 | \r | |
741 | /**\r | |
742 | \r | |
743 | Set Frame Interval value\r | |
744 | \r | |
745 | @param Ohc UHC private data\r | |
746 | @param Field Field to set\r | |
747 | @param Value Value to set\r | |
748 | \r | |
749 | @retval EFI_SUCCESS Value set\r | |
750 | \r | |
751 | **/\r | |
752 | \r | |
753 | EFI_STATUS\r | |
754 | OhciSetFrameInterval (\r | |
755 | IN USB_OHCI_HC_DEV *Ohc,\r | |
756 | IN UINTN Field,\r | |
757 | IN UINT32 Value\r | |
758 | )\r | |
759 | {\r | |
760 | EFI_STATUS Status;\r | |
761 | HcFRM_INTERVAL FrameInterval;\r | |
762 | \r | |
763 | \r | |
764 | *(UINT32 *) &FrameInterval = OhciGetOperationalReg(Ohc->PciIo, HC_FRM_INTERVAL);\r | |
765 | \r | |
766 | if (Field & FRAME_INTERVAL) {\r | |
767 | FrameInterval.FrmIntervalToggle = !FrameInterval.FrmIntervalToggle;\r | |
768 | FrameInterval.FrameInterval = Value;\r | |
769 | }\r | |
770 | \r | |
771 | if (Field & FS_LARGEST_DATA_PACKET) {\r | |
772 | FrameInterval.FSMaxDataPacket = Value;\r | |
773 | }\r | |
774 | \r | |
775 | if (Field & FRMINT_TOGGLE) {\r | |
776 | FrameInterval.FrmIntervalToggle = Value;\r | |
777 | }\r | |
778 | \r | |
779 | Status = OhciSetOperationalReg (\r | |
780 | Ohc->PciIo,\r | |
781 | HC_FRM_INTERVAL,\r | |
782 | &FrameInterval\r | |
783 | );\r | |
784 | \r | |
785 | return Status;\r | |
786 | }\r | |
787 | \r | |
788 | \r | |
789 | /**\r | |
790 | \r | |
791 | Get field of frame interval reg value\r | |
792 | \r | |
793 | @param Ohc UHC private data\r | |
794 | @param Field Field to get\r | |
795 | \r | |
796 | @retval Value of the field\r | |
797 | \r | |
798 | **/\r | |
799 | \r | |
800 | UINT32\r | |
801 | OhciGetFrameInterval (\r | |
802 | IN USB_OHCI_HC_DEV *Ohc,\r | |
803 | IN UINTN Field\r | |
804 | )\r | |
805 | {\r | |
806 | HcFRM_INTERVAL FrameInterval;\r | |
807 | \r | |
808 | *(UINT32 *) &FrameInterval = OhciGetOperationalReg (Ohc->PciIo, HC_FRM_INTERVAL);\r | |
809 | \r | |
810 | switch (Field){\r | |
811 | case FRAME_INTERVAL:\r | |
812 | return FrameInterval.FrameInterval;\r | |
813 | break;\r | |
814 | \r | |
815 | case FS_LARGEST_DATA_PACKET:\r | |
816 | return FrameInterval.FSMaxDataPacket;\r | |
817 | break;\r | |
818 | \r | |
819 | case FRMINT_TOGGLE:\r | |
820 | return FrameInterval.FrmIntervalToggle;\r | |
821 | break;\r | |
822 | \r | |
823 | default:\r | |
824 | ASSERT (FALSE);\r | |
825 | }\r | |
826 | \r | |
827 | return 0;\r | |
828 | }\r | |
829 | \r | |
830 | /**\r | |
831 | \r | |
832 | Set Frame Remaining reg value\r | |
833 | \r | |
834 | @param Ohc UHC private data\r | |
835 | @param Value Value to set\r | |
836 | \r | |
837 | @retval EFI_SUCCESS Value set\r | |
838 | \r | |
839 | **/\r | |
840 | \r | |
841 | EFI_STATUS\r | |
842 | OhciSetFrameRemaining (\r | |
843 | IN USB_OHCI_HC_DEV *Ohc,\r | |
844 | IN UINT32 Value\r | |
845 | )\r | |
846 | {\r | |
847 | EFI_STATUS Status;\r | |
848 | HcFRAME_REMAINING FrameRemaining;\r | |
849 | \r | |
850 | \r | |
851 | *(UINT32 *) &FrameRemaining = OhciGetOperationalReg (Ohc->PciIo, HC_FRM_REMAINING);\r | |
852 | \r | |
853 | FrameRemaining.FrameRemaining = Value;\r | |
854 | FrameRemaining.FrameRemainingToggle = !FrameRemaining.FrameRemainingToggle;\r | |
855 | \r | |
856 | Status = OhciSetOperationalReg (Ohc->PciIo, HC_FRM_REMAINING, &FrameRemaining);\r | |
857 | \r | |
858 | return Status;\r | |
859 | }\r | |
860 | /**\r | |
861 | \r | |
862 | Get value of frame remaining reg\r | |
863 | \r | |
864 | @param Ohc UHC private data\r | |
865 | @param Field Field to get\r | |
866 | \r | |
867 | @retval Value of frame remaining reg\r | |
868 | \r | |
869 | **/\r | |
870 | UINT32\r | |
871 | OhciGetFrameRemaining (\r | |
872 | IN USB_OHCI_HC_DEV *Ohc,\r | |
873 | IN UINTN Field\r | |
874 | )\r | |
875 | \r | |
876 | {\r | |
877 | HcFRAME_REMAINING FrameRemaining;\r | |
878 | \r | |
879 | \r | |
880 | *(UINT32 *) &FrameRemaining = OhciGetOperationalReg (Ohc->PciIo, HC_FRM_REMAINING);\r | |
881 | \r | |
882 | switch (Field){\r | |
883 | case FRAME_REMAINING:\r | |
884 | return FrameRemaining.FrameRemaining;\r | |
885 | break;\r | |
886 | \r | |
887 | case FRAME_REMAIN_TOGGLE:\r | |
888 | return FrameRemaining.FrameRemainingToggle;\r | |
889 | break;\r | |
890 | \r | |
891 | default:\r | |
892 | ASSERT (FALSE);\r | |
893 | }\r | |
894 | \r | |
895 | return 0;\r | |
896 | }\r | |
897 | \r | |
898 | /**\r | |
899 | \r | |
900 | Set frame number reg value\r | |
901 | \r | |
902 | @param Ohc UHC private data\r | |
903 | @param Value Value to set\r | |
904 | \r | |
905 | @retval EFI_SUCCESS Value set\r | |
906 | \r | |
907 | **/\r | |
908 | \r | |
909 | EFI_STATUS\r | |
910 | OhciSetFrameNumber(\r | |
911 | IN USB_OHCI_HC_DEV *Ohc,\r | |
912 | IN UINT32 Value\r | |
913 | )\r | |
914 | {\r | |
915 | EFI_STATUS Status;\r | |
916 | \r | |
917 | Status = OhciSetOperationalReg (Ohc->PciIo, HC_FRM_NUMBER, &Value);\r | |
918 | \r | |
919 | return Status;\r | |
920 | }\r | |
921 | \r | |
922 | /**\r | |
923 | \r | |
924 | Get frame number reg value\r | |
925 | \r | |
926 | @param Ohc UHC private data\r | |
927 | \r | |
928 | @retval Value of frame number reg\r | |
929 | \r | |
930 | **/\r | |
931 | \r | |
932 | UINT32\r | |
933 | OhciGetFrameNumber (\r | |
934 | IN USB_OHCI_HC_DEV *Ohc\r | |
935 | )\r | |
936 | {\r | |
937 | return OhciGetOperationalReg(Ohc->PciIo, HC_FRM_NUMBER);\r | |
938 | }\r | |
939 | \r | |
940 | /**\r | |
941 | \r | |
942 | Set period start reg value\r | |
943 | \r | |
944 | @param Ohc UHC private data\r | |
945 | @param Value Value to set\r | |
946 | \r | |
947 | @retval EFI_SUCCESS Value set\r | |
948 | \r | |
949 | **/\r | |
950 | \r | |
951 | EFI_STATUS\r | |
952 | OhciSetPeriodicStart (\r | |
953 | IN USB_OHCI_HC_DEV *Ohc,\r | |
954 | IN UINT32 Value\r | |
955 | )\r | |
956 | {\r | |
957 | EFI_STATUS Status;\r | |
958 | \r | |
959 | \r | |
960 | Status = OhciSetOperationalReg (Ohc->PciIo, HC_PERIODIC_START, &Value);\r | |
961 | \r | |
962 | return Status;\r | |
963 | }\r | |
964 | \r | |
965 | \r | |
966 | /**\r | |
967 | \r | |
968 | Get periodic start reg value\r | |
969 | \r | |
970 | @param Ohc UHC private data\r | |
971 | \r | |
972 | @param Value of periodic start reg\r | |
973 | \r | |
974 | **/\r | |
975 | \r | |
976 | UINT32\r | |
977 | OhciGetPeriodicStart (\r | |
978 | IN USB_OHCI_HC_DEV *Ohc\r | |
979 | )\r | |
980 | {\r | |
981 | return OhciGetOperationalReg(Ohc->PciIo, HC_PERIODIC_START);\r | |
982 | }\r | |
983 | \r | |
984 | \r | |
985 | /**\r | |
986 | \r | |
987 | Set Ls Threshold reg value\r | |
988 | \r | |
989 | @param Ohc UHC private data\r | |
990 | @param Value Value to set\r | |
991 | \r | |
992 | @retval EFI_SUCCESS Value set\r | |
993 | \r | |
994 | **/\r | |
995 | \r | |
996 | EFI_STATUS\r | |
997 | OhciSetLsThreshold (\r | |
998 | IN USB_OHCI_HC_DEV *Ohc,\r | |
999 | IN UINT32 Value\r | |
1000 | )\r | |
1001 | {\r | |
1002 | EFI_STATUS Status;\r | |
1003 | \r | |
1004 | \r | |
1005 | Status = OhciSetOperationalReg (Ohc->PciIo, HC_LS_THREASHOLD, &Value);\r | |
1006 | \r | |
1007 | return Status;\r | |
1008 | }\r | |
1009 | \r | |
1010 | \r | |
1011 | /**\r | |
1012 | \r | |
1013 | Get Ls Threshold reg value\r | |
1014 | \r | |
1015 | @param Ohc UHC private data\r | |
1016 | \r | |
1017 | @retval Value of Ls Threshold reg\r | |
1018 | \r | |
1019 | **/\r | |
1020 | \r | |
1021 | UINT32\r | |
1022 | OhciGetLsThreshold (\r | |
1023 | IN USB_OHCI_HC_DEV *Ohc\r | |
1024 | )\r | |
1025 | {\r | |
1026 | return OhciGetOperationalReg(Ohc->PciIo, HC_LS_THREASHOLD);\r | |
1027 | }\r | |
1028 | \r | |
1029 | /**\r | |
1030 | \r | |
1031 | Set Root Hub Descriptor reg value\r | |
1032 | \r | |
1033 | @param Ohc UHC private data\r | |
1034 | @param Field Field to set\r | |
1035 | @param Value Value to set\r | |
1036 | \r | |
1037 | @retval EFI_SUCCESS Value set\r | |
1038 | \r | |
1039 | **/\r | |
1040 | EFI_STATUS\r | |
1041 | OhciSetRootHubDescriptor (\r | |
1042 | IN USB_OHCI_HC_DEV *Ohc,\r | |
1043 | IN UINTN Field,\r | |
1044 | IN UINT32 Value\r | |
1045 | )\r | |
1046 | {\r | |
1047 | EFI_STATUS Status;\r | |
1048 | HcRH_DESC_A DescriptorA;\r | |
1049 | HcRH_DESC_B DescriptorB;\r | |
1050 | \r | |
1051 | \r | |
1052 | if (Field & (RH_DEV_REMOVABLE | RH_PORT_PWR_CTRL_MASK)) {\r | |
1053 | *(UINT32 *) &DescriptorB = OhciGetOperationalReg (Ohc->PciIo, HC_RH_DESC_B);\r | |
1054 | \r | |
1055 | if(Field & RH_DEV_REMOVABLE) {\r | |
1056 | DescriptorB.DeviceRemovable = Value;\r | |
1057 | }\r | |
1058 | if(Field & RH_PORT_PWR_CTRL_MASK) {\r | |
1059 | DescriptorB.PortPowerControlMask = Value;\r | |
1060 | }\r | |
1061 | \r | |
1062 | Status = OhciSetOperationalReg (Ohc->PciIo, HC_RH_DESC_B, &DescriptorB);\r | |
1063 | \r | |
1064 | return Status;\r | |
1065 | }\r | |
1066 | \r | |
1067 | *(UINT32 *)&DescriptorA = OhciGetOperationalReg (Ohc->PciIo, HC_RH_DESC_A);\r | |
1068 | \r | |
1069 | if(Field & RH_NUM_DS_PORTS) {\r | |
1070 | DescriptorA.NumDownStrmPorts = Value;\r | |
1071 | }\r | |
1072 | if(Field & RH_NO_PSWITCH) {\r | |
1073 | DescriptorA.NoPowerSwitch = Value;\r | |
1074 | }\r | |
1075 | if(Field & RH_PSWITCH_MODE) {\r | |
1076 | DescriptorA.PowerSwitchMode = Value;\r | |
1077 | }\r | |
1078 | if(Field & RH_DEVICE_TYPE) {\r | |
1079 | DescriptorA.DeviceType = Value;\r | |
1080 | }\r | |
1081 | if(Field & RH_OC_PROT_MODE) {\r | |
1082 | DescriptorA.OverCurrentProtMode = Value;\r | |
1083 | }\r | |
1084 | if(Field & RH_NOC_PROT) {\r | |
1085 | DescriptorA.NoOverCurrentProtMode = Value;\r | |
1086 | }\r | |
1087 | if(Field & RH_NO_POTPGT) {\r | |
1088 | DescriptorA.PowerOnToPowerGoodTime = Value;\r | |
1089 | }\r | |
1090 | \r | |
1091 | Status = OhciSetOperationalReg (Ohc->PciIo, HC_RH_DESC_A, &DescriptorA);\r | |
1092 | \r | |
1093 | return Status;\r | |
1094 | }\r | |
1095 | \r | |
1096 | \r | |
1097 | /**\r | |
1098 | \r | |
1099 | Get Root Hub Descriptor reg value\r | |
1100 | \r | |
1101 | @param Ohc UHC private data\r | |
1102 | @param Field Field to get\r | |
1103 | \r | |
1104 | @retval Value of the field\r | |
1105 | \r | |
1106 | **/\r | |
1107 | \r | |
1108 | UINT32\r | |
1109 | OhciGetRootHubDescriptor (\r | |
1110 | IN USB_OHCI_HC_DEV *Ohc,\r | |
1111 | IN UINTN Field\r | |
1112 | )\r | |
1113 | {\r | |
1114 | HcRH_DESC_A DescriptorA;\r | |
1115 | HcRH_DESC_B DescriptorB;\r | |
1116 | \r | |
1117 | \r | |
1118 | *(UINT32 *) &DescriptorA = OhciGetOperationalReg (Ohc->PciIo, HC_RH_DESC_A);\r | |
1119 | *(UINT32 *) &DescriptorB = OhciGetOperationalReg (Ohc->PciIo, HC_RH_DESC_B);\r | |
1120 | \r | |
1121 | switch (Field){\r | |
1122 | case RH_DEV_REMOVABLE:\r | |
1123 | return DescriptorB.DeviceRemovable;\r | |
1124 | break;\r | |
1125 | \r | |
1126 | case RH_PORT_PWR_CTRL_MASK:\r | |
1127 | return DescriptorB.PortPowerControlMask;\r | |
1128 | break;\r | |
1129 | \r | |
1130 | case RH_NUM_DS_PORTS:\r | |
1131 | return DescriptorA.NumDownStrmPorts;\r | |
1132 | break;\r | |
1133 | \r | |
1134 | case RH_NO_PSWITCH:\r | |
1135 | return DescriptorA.NoPowerSwitch;\r | |
1136 | break;\r | |
1137 | \r | |
1138 | case RH_PSWITCH_MODE:\r | |
1139 | return DescriptorA.PowerSwitchMode;\r | |
1140 | break;\r | |
1141 | \r | |
1142 | case RH_DEVICE_TYPE:\r | |
1143 | return DescriptorA.DeviceType;\r | |
1144 | break;\r | |
1145 | \r | |
1146 | case RH_OC_PROT_MODE:\r | |
1147 | return DescriptorA.OverCurrentProtMode;\r | |
1148 | break;\r | |
1149 | \r | |
1150 | case RH_NOC_PROT:\r | |
1151 | return DescriptorA.NoOverCurrentProtMode;\r | |
1152 | break;\r | |
1153 | \r | |
1154 | case RH_NO_POTPGT:\r | |
1155 | return DescriptorA.PowerOnToPowerGoodTime;\r | |
1156 | break;\r | |
1157 | \r | |
1158 | default:\r | |
1159 | ASSERT (FALSE);\r | |
1160 | }\r | |
1161 | \r | |
1162 | return 0;\r | |
1163 | }\r | |
1164 | \r | |
1165 | \r | |
1166 | /**\r | |
1167 | \r | |
1168 | Set Root Hub Status reg value\r | |
1169 | \r | |
1170 | @param Ohc UHC private data\r | |
1171 | @param Field Field to set\r | |
1172 | \r | |
1173 | @retval EFI_SUCCESS Value set\r | |
1174 | \r | |
1175 | **/\r | |
1176 | \r | |
1177 | EFI_STATUS\r | |
1178 | OhciSetRootHubStatus (\r | |
1179 | IN USB_OHCI_HC_DEV *Ohc,\r | |
1180 | IN UINTN Field\r | |
1181 | )\r | |
1182 | {\r | |
1183 | EFI_STATUS Status;\r | |
1184 | HcRH_STATUS RootHubStatus;\r | |
1185 | \r | |
1186 | \r | |
1187 | ZeroMem (&RootHubStatus, sizeof(HcRH_STATUS));\r | |
1188 | \r | |
1189 | if(Field & RH_LOCAL_PSTAT){\r | |
1190 | RootHubStatus.LocalPowerStat = 1;\r | |
1191 | }\r | |
1192 | if(Field & RH_OC_ID){\r | |
1193 | RootHubStatus.OverCurrentIndicator = 1;\r | |
1194 | }\r | |
1195 | if(Field & RH_REMOTE_WK_ENABLE){\r | |
1196 | RootHubStatus.DevRemoteWakeupEnable = 1;\r | |
1197 | }\r | |
1198 | if(Field & RH_LOCAL_PSTAT_CHANGE){\r | |
1199 | RootHubStatus.LocalPowerStatChange = 1;\r | |
1200 | }\r | |
1201 | if(Field & RH_OC_ID_CHANGE){\r | |
1202 | RootHubStatus.OverCurrentIndicatorChange = 1;\r | |
1203 | }\r | |
1204 | if(Field & RH_CLR_RMT_WK_ENABLE){\r | |
1205 | RootHubStatus.ClearRemoteWakeupEnable = 1;\r | |
1206 | }\r | |
1207 | \r | |
1208 | Status = OhciSetOperationalReg (Ohc->PciIo, HC_RH_STATUS, &RootHubStatus);\r | |
1209 | \r | |
1210 | return Status;\r | |
1211 | }\r | |
1212 | \r | |
1213 | \r | |
1214 | /**\r | |
1215 | \r | |
1216 | Get Root Hub Status reg value\r | |
1217 | \r | |
1218 | @param Ohc UHC private data\r | |
1219 | @param Field Field to get\r | |
1220 | \r | |
1221 | @retval Value of the field\r | |
1222 | \r | |
1223 | **/\r | |
1224 | \r | |
1225 | UINT32\r | |
1226 | OhciGetRootHubStatus (\r | |
1227 | IN USB_OHCI_HC_DEV *Ohc,\r | |
1228 | IN UINTN Field\r | |
1229 | )\r | |
1230 | {\r | |
1231 | HcRH_STATUS RootHubStatus;\r | |
1232 | \r | |
1233 | \r | |
1234 | *(UINT32 *) &RootHubStatus = OhciGetOperationalReg (Ohc->PciIo, HC_RH_STATUS);\r | |
1235 | \r | |
1236 | switch (Field) {\r | |
1237 | case RH_LOCAL_PSTAT:\r | |
1238 | return RootHubStatus.LocalPowerStat;\r | |
1239 | break;\r | |
1240 | case RH_OC_ID:\r | |
1241 | return RootHubStatus.OverCurrentIndicator;\r | |
1242 | break;\r | |
1243 | case RH_REMOTE_WK_ENABLE:\r | |
1244 | return RootHubStatus.DevRemoteWakeupEnable;\r | |
1245 | break;\r | |
1246 | case RH_LOCAL_PSTAT_CHANGE:\r | |
1247 | return RootHubStatus.LocalPowerStatChange;\r | |
1248 | break;\r | |
1249 | case RH_OC_ID_CHANGE:\r | |
1250 | return RootHubStatus.OverCurrentIndicatorChange;\r | |
1251 | break;\r | |
1252 | case RH_CLR_RMT_WK_ENABLE:\r | |
1253 | return RootHubStatus.ClearRemoteWakeupEnable;\r | |
1254 | break;\r | |
1255 | default:\r | |
1256 | ASSERT (FALSE);\r | |
1257 | }\r | |
1258 | \r | |
1259 | return 0;\r | |
1260 | }\r | |
1261 | \r | |
1262 | \r | |
1263 | /**\r | |
1264 | \r | |
1265 | Set Root Hub Port Status reg value\r | |
1266 | \r | |
1267 | @param Ohc UHC private data\r | |
1268 | @param Index Index of the port\r | |
1269 | @param Field Field to set\r | |
1270 | \r | |
1271 | @retval EFI_SUCCESS Value set\r | |
1272 | \r | |
1273 | **/\r | |
1274 | \r | |
1275 | EFI_STATUS\r | |
1276 | OhciSetRootHubPortStatus (\r | |
1277 | IN USB_OHCI_HC_DEV *Ohc,\r | |
1278 | IN UINT32 Index,\r | |
1279 | IN UINTN Field\r | |
1280 | )\r | |
1281 | {\r | |
1282 | EFI_STATUS Status;\r | |
1283 | HcRHPORT_STATUS PortStatus;\r | |
1284 | \r | |
1285 | \r | |
1286 | ZeroMem (&PortStatus, sizeof(HcRHPORT_STATUS));\r | |
1287 | \r | |
1288 | if (Field & RH_CLEAR_PORT_ENABLE) {\r | |
1289 | PortStatus.CurrentConnectStat = 1;\r | |
1290 | }\r | |
1291 | if (Field & RH_SET_PORT_ENABLE) {\r | |
1292 | PortStatus.EnableStat = 1;\r | |
1293 | }\r | |
1294 | if (Field & RH_SET_PORT_SUSPEND) {\r | |
1295 | PortStatus.SuspendStat = 1;\r | |
1296 | }\r | |
1297 | if (Field & RH_CLEAR_SUSPEND_STATUS) {\r | |
1298 | PortStatus.OCIndicator = 1;\r | |
1299 | }\r | |
1300 | if (Field & RH_SET_PORT_RESET) {\r | |
1301 | PortStatus.ResetStat = 1;\r | |
1302 | }\r | |
1303 | if (Field & RH_SET_PORT_POWER) {\r | |
1304 | PortStatus.PowerStat = 1;\r | |
1305 | }\r | |
1306 | if (Field & RH_CLEAR_PORT_POWER) {\r | |
1307 | PortStatus.LsDeviceAttached = 1;\r | |
1308 | }\r | |
1309 | if (Field & RH_CONNECT_STATUS_CHANGE) {\r | |
1310 | PortStatus.ConnectStatChange = 1;\r | |
1311 | }\r | |
1312 | if (Field & RH_PORT_ENABLE_STAT_CHANGE) {\r | |
1313 | PortStatus.EnableStatChange = 1;\r | |
1314 | }\r | |
1315 | if (Field & RH_PORT_SUSPEND_STAT_CHANGE) {\r | |
1316 | PortStatus.SuspendStatChange = 1;\r | |
1317 | }\r | |
1318 | if (Field & RH_OC_INDICATOR_CHANGE) {\r | |
1319 | PortStatus.OCIndicatorChange = 1;\r | |
1320 | }\r | |
1321 | if (Field & RH_PORT_RESET_STAT_CHANGE ) {\r | |
1322 | PortStatus.ResetStatChange = 1;\r | |
1323 | }\r | |
1324 | \r | |
1325 | Status = OhciSetOperationalReg (Ohc->PciIo, HC_RH_PORT_STATUS + (Index * 4), &PortStatus);\r | |
1326 | \r | |
1327 | return Status;\r | |
1328 | }\r | |
1329 | \r | |
1330 | \r | |
1331 | /**\r | |
1332 | \r | |
1333 | Get Root Hub Port Status reg value\r | |
1334 | \r | |
1335 | @param Ohc UHC private data\r | |
1336 | @param Index Index of the port\r | |
1337 | @param Field Field to get\r | |
1338 | \r | |
1339 | @retval Value of the field and index\r | |
1340 | \r | |
1341 | **/\r | |
1342 | \r | |
1343 | UINT32\r | |
1344 | OhciReadRootHubPortStatus (\r | |
1345 | IN USB_OHCI_HC_DEV *Ohc,\r | |
1346 | IN UINT32 Index,\r | |
1347 | IN UINTN Field\r | |
1348 | )\r | |
1349 | {\r | |
1350 | HcRHPORT_STATUS PortStatus;\r | |
1351 | \r | |
1352 | *(UINT32 *) &PortStatus = OhciGetOperationalReg (\r | |
1353 | Ohc->PciIo,\r | |
1354 | HC_RH_PORT_STATUS + (Index * 4)\r | |
1355 | );\r | |
1356 | \r | |
1357 | switch (Field){\r | |
1358 | case RH_CURR_CONNECT_STAT:\r | |
1359 | return PortStatus.CurrentConnectStat;\r | |
1360 | break;\r | |
1361 | case RH_PORT_ENABLE_STAT:\r | |
1362 | return PortStatus.EnableStat;\r | |
1363 | break;\r | |
1364 | case RH_PORT_SUSPEND_STAT:\r | |
1365 | return PortStatus.SuspendStat;\r | |
1366 | break;\r | |
1367 | case RH_PORT_OC_INDICATOR:\r | |
1368 | return PortStatus.OCIndicator;\r | |
1369 | break;\r | |
1370 | case RH_PORT_RESET_STAT:\r | |
1371 | return PortStatus.ResetStat;\r | |
1372 | break;\r | |
1373 | case RH_PORT_POWER_STAT:\r | |
1374 | return PortStatus.PowerStat;\r | |
1375 | break;\r | |
1376 | case RH_LSDEVICE_ATTACHED:\r | |
1377 | return PortStatus.LsDeviceAttached;\r | |
1378 | break;\r | |
1379 | case RH_CONNECT_STATUS_CHANGE:\r | |
1380 | return PortStatus.ConnectStatChange;\r | |
1381 | break;\r | |
1382 | case RH_PORT_ENABLE_STAT_CHANGE:\r | |
1383 | return PortStatus.EnableStatChange;\r | |
1384 | break;\r | |
1385 | case RH_PORT_SUSPEND_STAT_CHANGE:\r | |
1386 | return PortStatus.SuspendStatChange;\r | |
1387 | break;\r | |
1388 | case RH_OC_INDICATOR_CHANGE:\r | |
1389 | return PortStatus.OCIndicatorChange;\r | |
1390 | break;\r | |
1391 | case RH_PORT_RESET_STAT_CHANGE:\r | |
1392 | return PortStatus.ResetStatChange;\r | |
1393 | break;\r | |
1394 | default:\r | |
1395 | ASSERT (FALSE);\r | |
1396 | }\r | |
1397 | \r | |
1398 | return 0;\r | |
1399 | }\r |