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0c18794e | 1 | /** @file\r |
2 | Basic TIS (TPM Interface Specification) functions.\r | |
3 | \r | |
b3548d32 | 4 | Copyright (c) 2005 - 2018, Intel Corporation. All rights reserved.<BR>\r |
289b714b | 5 | SPDX-License-Identifier: BSD-2-Clause-Patent\r |
0c18794e | 6 | \r |
7 | **/\r | |
8 | \r | |
9 | #include "CommonHeader.h"\r | |
10 | \r | |
11 | /**\r | |
12 | Check whether TPM chip exist.\r | |
13 | \r | |
14 | @param[in] TisReg Pointer to TIS register.\r | |
15 | \r | |
16 | @retval TRUE TPM chip exists.\r | |
17 | @retval FALSE TPM chip is not found.\r | |
18 | **/\r | |
19 | BOOLEAN\r | |
20 | TisPcPresenceCheck (\r | |
21 | IN TIS_PC_REGISTERS_PTR TisReg\r | |
22 | )\r | |
23 | {\r | |
24 | UINT8 RegRead;\r | |
b3548d32 | 25 | \r |
0c18794e | 26 | RegRead = MmioRead8 ((UINTN)&TisReg->Access);\r |
27 | return (BOOLEAN)(RegRead != (UINT8)-1);\r | |
28 | }\r | |
29 | \r | |
30 | /**\r | |
31 | Check whether the value of a TPM chip register satisfies the input BIT setting.\r | |
32 | \r | |
33 | @param[in] Register Address port of register to be checked.\r | |
34 | @param[in] BitSet Check these data bits are set.\r | |
35 | @param[in] BitClear Check these data bits are clear.\r | |
36 | @param[in] TimeOut The max wait time (unit MicroSecond) when checking register.\r | |
37 | \r | |
38 | @retval EFI_SUCCESS The register satisfies the check bit.\r | |
39 | @retval EFI_TIMEOUT The register can't run into the expected status in time.\r | |
40 | **/\r | |
41 | EFI_STATUS\r | |
42 | EFIAPI\r | |
43 | TisPcWaitRegisterBits (\r | |
44 | IN UINT8 *Register,\r | |
45 | IN UINT8 BitSet,\r | |
46 | IN UINT8 BitClear,\r | |
47 | IN UINT32 TimeOut\r | |
48 | )\r | |
49 | {\r | |
50 | UINT8 RegRead;\r | |
51 | UINT32 WaitTime;\r | |
52 | \r | |
53 | for (WaitTime = 0; WaitTime < TimeOut; WaitTime += 30){\r | |
54 | RegRead = MmioRead8 ((UINTN)Register);\r | |
55 | if ((RegRead & BitSet) == BitSet && (RegRead & BitClear) == 0)\r | |
56 | return EFI_SUCCESS;\r | |
57 | MicroSecondDelay (30);\r | |
58 | }\r | |
59 | return EFI_TIMEOUT;\r | |
60 | }\r | |
61 | \r | |
62 | /**\r | |
f9fd0c21 | 63 | Get BurstCount by reading the burstCount field of a TIS register\r |
0c18794e | 64 | in the time of default TIS_TIMEOUT_D.\r |
65 | \r | |
66 | @param[in] TisReg Pointer to TIS register.\r | |
d6b926e7 | 67 | @param[out] BurstCount Pointer to a buffer to store the got BurstCount.\r |
0c18794e | 68 | \r |
69 | @retval EFI_SUCCESS Get BurstCount.\r | |
70 | @retval EFI_INVALID_PARAMETER TisReg is NULL or BurstCount is NULL.\r | |
71 | @retval EFI_TIMEOUT BurstCount can't be got in time.\r | |
72 | **/\r | |
73 | EFI_STATUS\r | |
74 | EFIAPI\r | |
75 | TisPcReadBurstCount (\r | |
76 | IN TIS_PC_REGISTERS_PTR TisReg,\r | |
77 | OUT UINT16 *BurstCount\r | |
78 | )\r | |
79 | {\r | |
80 | UINT32 WaitTime;\r | |
81 | UINT8 DataByte0;\r | |
82 | UINT8 DataByte1;\r | |
83 | \r | |
84 | if (BurstCount == NULL || TisReg == NULL) {\r | |
85 | return EFI_INVALID_PARAMETER;\r | |
86 | }\r | |
87 | \r | |
88 | WaitTime = 0;\r | |
89 | do {\r | |
90 | //\r | |
91 | // TIS_PC_REGISTERS_PTR->burstCount is UINT16, but it is not 2bytes aligned,\r | |
92 | // so it needs to use MmioRead8 to read two times\r | |
93 | //\r | |
94 | DataByte0 = MmioRead8 ((UINTN)&TisReg->BurstCount);\r | |
95 | DataByte1 = MmioRead8 ((UINTN)&TisReg->BurstCount + 1);\r | |
96 | *BurstCount = (UINT16)((DataByte1 << 8) + DataByte0);\r | |
97 | if (*BurstCount != 0) {\r | |
98 | return EFI_SUCCESS;\r | |
99 | }\r | |
100 | MicroSecondDelay (30);\r | |
101 | WaitTime += 30;\r | |
102 | } while (WaitTime < TIS_TIMEOUT_D);\r | |
103 | \r | |
104 | return EFI_TIMEOUT;\r | |
105 | }\r | |
106 | \r | |
107 | /**\r | |
b3548d32 | 108 | Set TPM chip to ready state by sending ready command TIS_PC_STS_READY\r |
0c18794e | 109 | to Status Register in time.\r |
110 | \r | |
111 | @param[in] TisReg Pointer to TIS register.\r | |
112 | \r | |
113 | @retval EFI_SUCCESS TPM chip enters into ready state.\r | |
114 | @retval EFI_INVALID_PARAMETER TisReg is NULL.\r | |
115 | @retval EFI_TIMEOUT TPM chip can't be set to ready state in time.\r | |
116 | **/\r | |
117 | EFI_STATUS\r | |
118 | EFIAPI\r | |
119 | TisPcPrepareCommand (\r | |
120 | IN TIS_PC_REGISTERS_PTR TisReg\r | |
121 | )\r | |
122 | {\r | |
123 | EFI_STATUS Status;\r | |
124 | \r | |
125 | if (TisReg == NULL) {\r | |
126 | return EFI_INVALID_PARAMETER;\r | |
127 | }\r | |
128 | \r | |
129 | MmioWrite8((UINTN)&TisReg->Status, TIS_PC_STS_READY);\r | |
130 | Status = TisPcWaitRegisterBits (\r | |
131 | &TisReg->Status,\r | |
132 | TIS_PC_STS_READY,\r | |
133 | 0,\r | |
134 | TIS_TIMEOUT_B\r | |
135 | );\r | |
136 | return Status;\r | |
137 | }\r | |
138 | \r | |
139 | /**\r | |
b3548d32 | 140 | Get the control of TPM chip by sending requestUse command TIS_PC_ACC_RQUUSE\r |
f941becd | 141 | to ACCESS Register in the time of default TIS_TIMEOUT_A.\r |
0c18794e | 142 | \r |
143 | @param[in] TisReg Pointer to TIS register.\r | |
144 | \r | |
145 | @retval EFI_SUCCESS Get the control of TPM chip.\r | |
146 | @retval EFI_INVALID_PARAMETER TisReg is NULL.\r | |
147 | @retval EFI_NOT_FOUND TPM chip doesn't exit.\r | |
148 | @retval EFI_TIMEOUT Can't get the TPM control in time.\r | |
149 | **/\r | |
150 | EFI_STATUS\r | |
151 | EFIAPI\r | |
152 | TisPcRequestUseTpm (\r | |
153 | IN TIS_PC_REGISTERS_PTR TisReg\r | |
154 | )\r | |
155 | {\r | |
156 | EFI_STATUS Status;\r | |
b3548d32 | 157 | \r |
0c18794e | 158 | if (TisReg == NULL) {\r |
159 | return EFI_INVALID_PARAMETER;\r | |
160 | }\r | |
b3548d32 | 161 | \r |
0c18794e | 162 | if (!TisPcPresenceCheck (TisReg)) {\r |
163 | return EFI_NOT_FOUND;\r | |
164 | }\r | |
165 | \r | |
166 | MmioWrite8((UINTN)&TisReg->Access, TIS_PC_ACC_RQUUSE);\r | |
f941becd | 167 | //\r |
168 | // No locality set before, ACCESS_X.activeLocality MUST be valid within TIMEOUT_A\r | |
169 | //\r | |
0c18794e | 170 | Status = TisPcWaitRegisterBits (\r |
171 | &TisReg->Access,\r | |
172 | (UINT8)(TIS_PC_ACC_ACTIVE |TIS_PC_VALID),\r | |
173 | 0,\r | |
f941becd | 174 | TIS_TIMEOUT_A\r |
0c18794e | 175 | );\r |
176 | return Status;\r | |
177 | }\r |