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18b144ea | 1 | /** @file\r |
2 | Header file for Multi-Processor support.\r | |
3 | \r | |
b422b62c | 4 | Copyright (c) 2010 - 2013, Intel Corporation. All rights reserved.<BR>\r |
18b144ea | 5 | This program and the accompanying materials\r |
6 | are licensed and made available under the terms and conditions of the BSD License\r | |
7 | which accompanies this distribution. The full text of the license may be found at\r | |
8 | http://opensource.org/licenses/bsd-license.php.\r | |
9 | \r | |
10 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
11 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
12 | \r | |
13 | **/\r | |
14 | \r | |
15 | #ifndef _DEBUG_MP_H_\r | |
16 | #define _DEBUG_MP_H_\r | |
17 | \r | |
18 | #define DEBUG_CPU_MAX_COUNT 256\r | |
19 | \r | |
20 | typedef struct {\r | |
21 | UINT32 CpuCount; ///< Processor count\r | |
22 | UINT16 ApicID[DEBUG_CPU_MAX_COUNT]; ///< Record the local apic id for each processor\r | |
23 | } DEBUG_CPU_DATA;\r | |
24 | \r | |
25 | typedef struct {\r | |
26 | SPIN_LOCK MpContextSpinLock; ///< Lock for writting MP context\r | |
27 | SPIN_LOCK DebugPortSpinLock; ///< Lock for access debug port\r | |
b422b62c | 28 | SPIN_LOCK MailboxSpinLock; ///< Lock for accessing mail box\r |
18b144ea | 29 | UINT8 CpuBreakMask[DEBUG_CPU_MAX_COUNT/8]; ///< Bitmask of all breaking CPUs\r |
30 | UINT8 CpuStopStatusMask[DEBUG_CPU_MAX_COUNT/8]; ///< Bitmask of CPU stop status\r | |
31 | UINT32 ViewPointIndex; ///< Current view point to be debugged\r | |
32 | UINT32 BspIndex; ///< Processor index value of BSP\r | |
33 | UINT32 BreakAtCpuIndex; ///< Processor index value of the current breaking CPU\r | |
34 | UINT32 DebugTimerInitCount; ///< Record BSP's init timer count\r | |
35 | BOOLEAN IpiSentByAp; ///< TRUR: IPI is sent by AP. TALSE: IPI is sent by BSP\r | |
93c0bdec | 36 | BOOLEAN RunCommandSet; ///< TRUE: RUN commmand is executing. FALSE : RUN command has been executed.\r |
18b144ea | 37 | } DEBUG_MP_CONTEXT;\r |
38 | \r | |
18b144ea | 39 | extern DEBUG_MP_CONTEXT volatile mDebugMpContext;\r |
40 | extern DEBUG_CPU_DATA volatile mDebugCpuData;\r | |
41 | \r | |
42 | /**\r | |
43 | Break the other processor by send IPI.\r | |
44 | \r | |
45 | @param[in] CurrentProcessorIndex Current processor index value.\r | |
46 | \r | |
47 | **/\r | |
48 | VOID\r | |
49 | HaltOtherProcessors (\r | |
50 | IN UINT32 CurrentProcessorIndex\r | |
51 | );\r | |
52 | \r | |
53 | /**\r | |
54 | Get the current processor's index.\r | |
55 | \r | |
56 | @return Processor index value.\r | |
57 | \r | |
58 | **/\r | |
59 | UINT32\r | |
60 | GetProcessorIndex (\r | |
61 | VOID\r | |
62 | );\r | |
63 | \r | |
64 | /**\r | |
b422b62c | 65 | Acquire a spin lock when Multi-processor supported.\r |
18b144ea | 66 | \r |
67 | It will block in the function if cannot get the access control.\r | |
b422b62c | 68 | If Multi-processor is not supported, return directly.\r |
18b144ea | 69 | \r |
b422b62c | 70 | @param[in, out] MpSpinLock A pointer to the spin lock.\r |
18b144ea | 71 | \r |
72 | **/\r | |
73 | VOID\r | |
b422b62c | 74 | AcquireMpSpinLock (\r |
75 | IN OUT SPIN_LOCK *MpSpinLock\r | |
18b144ea | 76 | );\r |
77 | \r | |
78 | /**\r | |
b422b62c | 79 | Release a spin lock when Multi-processor supported.\r |
18b144ea | 80 | \r |
b422b62c | 81 | @param[in, out] MpSpinLock A pointer to the spin lock.\r |
18b144ea | 82 | \r |
83 | **/\r | |
84 | VOID\r | |
b422b62c | 85 | ReleaseMpSpinLock (\r |
86 | IN OUT SPIN_LOCK *MpSpinLock\r | |
18b144ea | 87 | );\r |
88 | \r | |
89 | /**\r | |
90 | Check if the specified processor is BSP or not.\r | |
91 | \r | |
92 | @param[in] ProcessorIndex Processor index value.\r | |
93 | \r | |
94 | @retval TRUE It is BSP.\r | |
95 | @retval FALSE It isn't BSP.\r | |
96 | \r | |
97 | **/\r | |
98 | BOOLEAN\r | |
99 | IsBsp (\r | |
100 | IN UINT32 ProcessorIndex\r | |
101 | );\r | |
102 | \r | |
103 | /**\r | |
104 | Set processor stop flag bitmask in MP context.\r | |
105 | \r | |
106 | @param[in] ProcessorIndex Processor index value.\r | |
107 | @param[in] StopFlag TRUE means set stop flag.\r | |
108 | FALSE means clean break flag.\r | |
109 | \r | |
110 | **/\r | |
111 | VOID\r | |
112 | SetCpuStopFlagByIndex (\r | |
113 | IN UINT32 ProcessorIndex,\r | |
114 | IN BOOLEAN StopFlag\r | |
115 | );\r | |
116 | \r | |
117 | /**\r | |
118 | Set processor break flag bitmask in MP context.\r | |
119 | \r | |
120 | @param[in] ProcessorIndex Processor index value.\r | |
121 | @param[in] BreakFlag TRUE means set break flag.\r | |
122 | FALSE means clean break flag.\r | |
123 | \r | |
124 | **/\r | |
125 | VOID\r | |
126 | SetCpuBreakFlagByIndex (\r | |
127 | IN UINT32 ProcessorIndex,\r | |
128 | IN BOOLEAN BreakFlag\r | |
129 | );\r | |
130 | \r | |
131 | /**\r | |
132 | Check if processor is stopped already.\r | |
133 | \r | |
134 | @param[in] ProcessorIndex Processor index value.\r | |
135 | \r | |
136 | @retval TRUE Processor is stopped already.\r | |
137 | @retval FALSE Processor isn't stopped.\r | |
138 | \r | |
139 | **/\r | |
140 | BOOLEAN\r | |
141 | IsCpuStopped (\r | |
142 | IN UINT32 ProcessorIndex\r | |
143 | );\r | |
144 | \r | |
145 | /**\r | |
146 | Set the run command flag.\r | |
147 | \r | |
148 | @param[in] RunningFlag TRUE means run command flag is set.\r | |
149 | FALSE means run command flag is cleared.\r | |
150 | \r | |
151 | **/\r | |
152 | VOID\r | |
153 | SetCpuRunningFlag (\r | |
154 | IN BOOLEAN RunningFlag\r | |
155 | );\r | |
156 | \r | |
157 | /**\r | |
158 | Set the current view point to be debugged.\r | |
159 | \r | |
160 | @param[in] ProcessorIndex Processor index value.\r | |
161 | \r | |
162 | **/\r | |
163 | VOID\r | |
164 | SetDebugViewPoint (\r | |
165 | IN UINT32 ProcessorIndex\r | |
166 | );\r | |
167 | \r | |
168 | /**\r | |
93c0bdec | 169 | Set the IPI send by BPS/AP flag.\r |
18b144ea | 170 | \r |
171 | @param[in] IpiSentByApFlag TRUE means this IPI is sent by AP.\r | |
172 | FALSE means this IPI is sent by BSP.\r | |
173 | \r | |
174 | **/\r | |
175 | VOID\r | |
176 | SetIpiSentByApFlag (\r | |
177 | IN BOOLEAN IpiSentByApFlag\r | |
178 | );\r | |
179 | \r | |
180 | /**\r | |
93c0bdec | 181 | Check the next pending breaking CPU.\r |
18b144ea | 182 | \r |
183 | @retval others There is at least one processor broken, the minimum\r | |
184 | index number of Processor returned.\r | |
185 | @retval -1 No any processor broken.\r | |
186 | \r | |
187 | **/\r | |
188 | UINT32\r | |
93c0bdec | 189 | FindNextPendingBreakCpu (\r |
18b144ea | 190 | VOID\r |
191 | );\r | |
192 | \r | |
193 | /**\r | |
194 | Check if all processors are in running status.\r | |
195 | \r | |
196 | @retval TRUE All processors run.\r | |
197 | @retval FALSE At least one processor does not run.\r | |
198 | \r | |
199 | **/\r | |
200 | BOOLEAN\r | |
201 | IsAllCpuRunning (\r | |
202 | VOID\r | |
203 | );\r | |
204 | \r | |
93c0bdec | 205 | /**\r |
206 | Check if the current processor is the first breaking processor.\r | |
207 | \r | |
208 | If yes, halt other processors. \r | |
209 | \r | |
210 | @param[in] ProcessorIndex Processor index value.\r | |
211 | \r | |
212 | @return TRUE This processor is the first breaking processor.\r | |
213 | @return FALSE This processor is not the first breaking processor.\r | |
214 | \r | |
215 | **/\r | |
216 | BOOLEAN\r | |
217 | IsFirstBreakProcessor (\r | |
218 | IN UINT32 ProcessorIndex\r | |
219 | );\r | |
220 | \r | |
18b144ea | 221 | #endif\r |
222 | \r |