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18b144ea | 1 | /** @file\r |
2 | Header file for Multi-Processor support.\r | |
3 | \r | |
a2acb04c | 4 | Copyright (c) 2010 - 2018, Intel Corporation. All rights reserved.<BR>\r |
85f7e110 | 5 | SPDX-License-Identifier: BSD-2-Clause-Patent\r |
18b144ea | 6 | \r |
7 | **/\r | |
8 | \r | |
9 | #ifndef _DEBUG_MP_H_\r | |
10 | #define _DEBUG_MP_H_\r | |
11 | \r | |
c1e126b1 | 12 | #define DEBUG_CPU_MAX_COUNT 256\r |
18b144ea | 13 | \r |
14 | typedef struct {\r | |
15 | UINT32 CpuCount; ///< Processor count\r | |
16 | UINT16 ApicID[DEBUG_CPU_MAX_COUNT]; ///< Record the local apic id for each processor\r | |
17 | } DEBUG_CPU_DATA;\r | |
18 | \r | |
19 | typedef struct {\r | |
c1e126b1 MK |
20 | SPIN_LOCK MpContextSpinLock; ///< Lock for writing MP context\r |
21 | SPIN_LOCK DebugPortSpinLock; ///< Lock for access debug port\r | |
22 | SPIN_LOCK MailboxSpinLock; ///< Lock for accessing mail box\r | |
23 | UINT8 CpuBreakMask[DEBUG_CPU_MAX_COUNT/8]; ///< Bitmask of all breaking CPUs\r | |
24 | UINT8 CpuStopStatusMask[DEBUG_CPU_MAX_COUNT/8]; ///< Bitmask of CPU stop status\r | |
25 | UINT32 ViewPointIndex; ///< Current view point to be debugged\r | |
26 | UINT32 BspIndex; ///< Processor index value of BSP\r | |
27 | UINT32 BreakAtCpuIndex; ///< Processor index value of the current breaking CPU\r | |
28 | UINT32 DebugTimerInitCount; ///< Record BSP's init timer count\r | |
29 | BOOLEAN IpiSentByAp; ///< TRUE: IPI is sent by AP. FALSE: IPI is sent by BSP\r | |
30 | BOOLEAN RunCommandSet; ///< TRUE: RUN command is executing. FALSE: RUN command has been executed.\r | |
18b144ea | 31 | } DEBUG_MP_CONTEXT;\r |
32 | \r | |
c1e126b1 MK |
33 | extern DEBUG_MP_CONTEXT volatile mDebugMpContext;\r |
34 | extern DEBUG_CPU_DATA volatile mDebugCpuData;\r | |
18b144ea | 35 | \r |
36 | /**\r | |
37 | Break the other processor by send IPI.\r | |
38 | \r | |
39 | @param[in] CurrentProcessorIndex Current processor index value.\r | |
40 | \r | |
41 | **/\r | |
42 | VOID\r | |
43 | HaltOtherProcessors (\r | |
c1e126b1 | 44 | IN UINT32 CurrentProcessorIndex\r |
18b144ea | 45 | );\r |
46 | \r | |
47 | /**\r | |
48 | Get the current processor's index.\r | |
49 | \r | |
50 | @return Processor index value.\r | |
51 | \r | |
52 | **/\r | |
53 | UINT32\r | |
54 | GetProcessorIndex (\r | |
55 | VOID\r | |
56 | );\r | |
57 | \r | |
58 | /**\r | |
b422b62c | 59 | Acquire a spin lock when Multi-processor supported.\r |
18b144ea | 60 | \r |
61 | It will block in the function if cannot get the access control.\r | |
b422b62c | 62 | If Multi-processor is not supported, return directly.\r |
18b144ea | 63 | \r |
b422b62c | 64 | @param[in, out] MpSpinLock A pointer to the spin lock.\r |
18b144ea | 65 | \r |
66 | **/\r | |
67 | VOID\r | |
b422b62c | 68 | AcquireMpSpinLock (\r |
c1e126b1 | 69 | IN OUT SPIN_LOCK *MpSpinLock\r |
18b144ea | 70 | );\r |
71 | \r | |
72 | /**\r | |
b422b62c | 73 | Release a spin lock when Multi-processor supported.\r |
18b144ea | 74 | \r |
b422b62c | 75 | @param[in, out] MpSpinLock A pointer to the spin lock.\r |
18b144ea | 76 | \r |
77 | **/\r | |
78 | VOID\r | |
b422b62c | 79 | ReleaseMpSpinLock (\r |
c1e126b1 | 80 | IN OUT SPIN_LOCK *MpSpinLock\r |
18b144ea | 81 | );\r |
82 | \r | |
83 | /**\r | |
84 | Check if the specified processor is BSP or not.\r | |
85 | \r | |
86 | @param[in] ProcessorIndex Processor index value.\r | |
87 | \r | |
88 | @retval TRUE It is BSP.\r | |
89 | @retval FALSE It isn't BSP.\r | |
90 | \r | |
91 | **/\r | |
92 | BOOLEAN\r | |
a2acb04c | 93 | DebugAgentIsBsp (\r |
c1e126b1 | 94 | IN UINT32 ProcessorIndex\r |
18b144ea | 95 | );\r |
96 | \r | |
97 | /**\r | |
98 | Set processor stop flag bitmask in MP context.\r | |
99 | \r | |
100 | @param[in] ProcessorIndex Processor index value.\r | |
101 | @param[in] StopFlag TRUE means set stop flag.\r | |
102 | FALSE means clean break flag.\r | |
103 | \r | |
104 | **/\r | |
105 | VOID\r | |
106 | SetCpuStopFlagByIndex (\r | |
c1e126b1 MK |
107 | IN UINT32 ProcessorIndex,\r |
108 | IN BOOLEAN StopFlag\r | |
18b144ea | 109 | );\r |
110 | \r | |
111 | /**\r | |
112 | Set processor break flag bitmask in MP context.\r | |
113 | \r | |
114 | @param[in] ProcessorIndex Processor index value.\r | |
115 | @param[in] BreakFlag TRUE means set break flag.\r | |
116 | FALSE means clean break flag.\r | |
117 | \r | |
118 | **/\r | |
119 | VOID\r | |
120 | SetCpuBreakFlagByIndex (\r | |
c1e126b1 MK |
121 | IN UINT32 ProcessorIndex,\r |
122 | IN BOOLEAN BreakFlag\r | |
18b144ea | 123 | );\r |
124 | \r | |
125 | /**\r | |
126 | Check if processor is stopped already.\r | |
127 | \r | |
128 | @param[in] ProcessorIndex Processor index value.\r | |
129 | \r | |
130 | @retval TRUE Processor is stopped already.\r | |
131 | @retval FALSE Processor isn't stopped.\r | |
132 | \r | |
133 | **/\r | |
134 | BOOLEAN\r | |
135 | IsCpuStopped (\r | |
c1e126b1 | 136 | IN UINT32 ProcessorIndex\r |
18b144ea | 137 | );\r |
138 | \r | |
139 | /**\r | |
140 | Set the run command flag.\r | |
141 | \r | |
142 | @param[in] RunningFlag TRUE means run command flag is set.\r | |
143 | FALSE means run command flag is cleared.\r | |
144 | \r | |
145 | **/\r | |
146 | VOID\r | |
147 | SetCpuRunningFlag (\r | |
c1e126b1 | 148 | IN BOOLEAN RunningFlag\r |
18b144ea | 149 | );\r |
150 | \r | |
151 | /**\r | |
152 | Set the current view point to be debugged.\r | |
153 | \r | |
154 | @param[in] ProcessorIndex Processor index value.\r | |
155 | \r | |
156 | **/\r | |
157 | VOID\r | |
158 | SetDebugViewPoint (\r | |
c1e126b1 | 159 | IN UINT32 ProcessorIndex\r |
18b144ea | 160 | );\r |
161 | \r | |
162 | /**\r | |
93c0bdec | 163 | Set the IPI send by BPS/AP flag.\r |
18b144ea | 164 | \r |
165 | @param[in] IpiSentByApFlag TRUE means this IPI is sent by AP.\r | |
166 | FALSE means this IPI is sent by BSP.\r | |
167 | \r | |
168 | **/\r | |
169 | VOID\r | |
170 | SetIpiSentByApFlag (\r | |
c1e126b1 | 171 | IN BOOLEAN IpiSentByApFlag\r |
18b144ea | 172 | );\r |
173 | \r | |
174 | /**\r | |
93c0bdec | 175 | Check the next pending breaking CPU.\r |
18b144ea | 176 | \r |
177 | @retval others There is at least one processor broken, the minimum\r | |
178 | index number of Processor returned.\r | |
179 | @retval -1 No any processor broken.\r | |
180 | \r | |
181 | **/\r | |
182 | UINT32\r | |
93c0bdec | 183 | FindNextPendingBreakCpu (\r |
18b144ea | 184 | VOID\r |
185 | );\r | |
77695f4d | 186 | \r |
18b144ea | 187 | /**\r |
188 | Check if all processors are in running status.\r | |
189 | \r | |
190 | @retval TRUE All processors run.\r | |
191 | @retval FALSE At least one processor does not run.\r | |
192 | \r | |
193 | **/\r | |
194 | BOOLEAN\r | |
195 | IsAllCpuRunning (\r | |
196 | VOID\r | |
197 | );\r | |
198 | \r | |
93c0bdec | 199 | /**\r |
200 | Check if the current processor is the first breaking processor.\r | |
201 | \r | |
77695f4d LG |
202 | If yes, halt other processors.\r |
203 | \r | |
93c0bdec | 204 | @param[in] ProcessorIndex Processor index value.\r |
77695f4d | 205 | \r |
93c0bdec | 206 | @return TRUE This processor is the first breaking processor.\r |
207 | @return FALSE This processor is not the first breaking processor.\r | |
77695f4d | 208 | \r |
93c0bdec | 209 | **/\r |
210 | BOOLEAN\r | |
211 | IsFirstBreakProcessor (\r | |
c1e126b1 | 212 | IN UINT32 ProcessorIndex\r |
93c0bdec | 213 | );\r |
77695f4d | 214 | \r |
18b144ea | 215 | #endif\r |