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18b144ea | 1 | /** @file\r |
2 | IA32 Group registers read support functions.\r | |
3 | \r | |
4 | Copyright (c) 2010, Intel Corporation. All rights reserved.<BR>\r | |
5 | This program and the accompanying materials\r | |
6 | are licensed and made available under the terms and conditions of the BSD License\r | |
7 | which accompanies this distribution. The full text of the license may be found at\r | |
8 | http://opensource.org/licenses/bsd-license.php.\r | |
9 | \r | |
10 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
11 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
12 | \r | |
13 | **/\r | |
14 | \r | |
15 | #include "DebugAgent.h"\r | |
16 | \r | |
17 | /**\r | |
18 | Read group register of Segment Base.\r | |
19 | \r | |
20 | @param[in] CpuContext Pointer to saved CPU context.\r | |
21 | @param[in] RegisterGroupSegBase Pointer to Group registers.\r | |
22 | \r | |
23 | **/\r | |
24 | VOID\r | |
25 | ReadRegisterGroupSegBase (\r | |
26 | IN DEBUG_CPU_CONTEXT *CpuContext,\r | |
27 | IN DEBUG_DATA_REPONSE_READ_REGISTER_GROUP_SEGBASE *RegisterGroupSegBase\r | |
28 | )\r | |
29 | {\r | |
30 | IA32_DESCRIPTOR *Ia32Descriptor;\r | |
31 | IA32_GDT *Ia32Gdt;\r | |
32 | UINTN Index;\r | |
33 | \r | |
34 | Ia32Descriptor = (IA32_DESCRIPTOR *) CpuContext->Gdtr;\r | |
35 | Ia32Gdt = (IA32_GDT *) (Ia32Descriptor->Base);\r | |
36 | \r | |
37 | Index = CpuContext->Cs / 8;\r | |
38 | RegisterGroupSegBase->CsBas = (Ia32Gdt[Index].Bits.BaseLow) + (Ia32Gdt[Index].Bits.BaseMid << 16) + (Ia32Gdt[Index].Bits.BaseMid << 24);\r | |
39 | Index = CpuContext->Ss / 8;\r | |
40 | RegisterGroupSegBase->SsBas = (Ia32Gdt[Index].Bits.BaseLow) + (Ia32Gdt[Index].Bits.BaseMid << 16) + (Ia32Gdt[Index].Bits.BaseMid << 24);\r | |
41 | Index = CpuContext->Gs / 8;\r | |
42 | RegisterGroupSegBase->GsBas = (Ia32Gdt[Index].Bits.BaseLow) + (Ia32Gdt[Index].Bits.BaseMid << 16) + (Ia32Gdt[Index].Bits.BaseMid << 24);\r | |
43 | Index = CpuContext->Fs / 8;\r | |
44 | RegisterGroupSegBase->FsBas = (Ia32Gdt[Index].Bits.BaseLow) + (Ia32Gdt[Index].Bits.BaseMid << 16) + (Ia32Gdt[Index].Bits.BaseMid << 24);\r | |
45 | Index = CpuContext->Es / 8;\r | |
46 | RegisterGroupSegBase->EsBas = (Ia32Gdt[Index].Bits.BaseLow) + (Ia32Gdt[Index].Bits.BaseMid << 16) + (Ia32Gdt[Index].Bits.BaseMid << 24);\r | |
47 | Index = CpuContext->Ds / 8;\r | |
48 | RegisterGroupSegBase->DsBas = (Ia32Gdt[Index].Bits.BaseLow) + (Ia32Gdt[Index].Bits.BaseMid << 16) + (Ia32Gdt[Index].Bits.BaseMid << 24);\r | |
49 | \r | |
50 | RegisterGroupSegBase->LdtBas = 0;\r | |
51 | RegisterGroupSegBase->TssBas = 0;\r | |
52 | }\r | |
53 | \r | |
54 | /**\r | |
55 | Read gourp register of Segment Limit.\r | |
56 | \r | |
57 | @param[in] CpuContext Pointer to saved CPU context.\r | |
58 | @param[in] RegisterGroupSegLim Pointer to Group registers.\r | |
59 | \r | |
60 | **/\r | |
61 | VOID\r | |
62 | ReadRegisterGroupSegLim (\r | |
63 | IN DEBUG_CPU_CONTEXT *CpuContext,\r | |
64 | IN DEBUG_DATA_REPONSE_READ_REGISTER_GROUP_SEGLIM *RegisterGroupSegLim\r | |
65 | )\r | |
66 | {\r | |
67 | IA32_DESCRIPTOR *Ia32Descriptor;\r | |
68 | IA32_GDT *Ia32Gdt;\r | |
69 | UINTN Index;\r | |
70 | \r | |
71 | Ia32Descriptor = (IA32_DESCRIPTOR *) CpuContext->Gdtr;\r | |
72 | Ia32Gdt = (IA32_GDT *) (Ia32Descriptor->Base);\r | |
73 | \r | |
74 | Index = CpuContext->Cs / 8;\r | |
75 | RegisterGroupSegLim->CsLim = Ia32Gdt[Index].Bits.LimitLow + (Ia32Gdt[Index].Bits.LimitHigh << 16);\r | |
76 | if (Ia32Gdt[Index].Bits.Granularity == 1) {\r | |
77 | RegisterGroupSegLim->CsLim = (RegisterGroupSegLim->CsLim << 12) | 0xfff;\r | |
78 | }\r | |
79 | \r | |
80 | Index = CpuContext->Ss / 8;\r | |
81 | RegisterGroupSegLim->SsLim = Ia32Gdt[Index].Bits.LimitLow + (Ia32Gdt[Index].Bits.LimitHigh << 16);\r | |
82 | if (Ia32Gdt[Index].Bits.Granularity == 1) {\r | |
83 | RegisterGroupSegLim->SsLim = (RegisterGroupSegLim->SsLim << 12) | 0xfff;\r | |
84 | }\r | |
85 | \r | |
86 | Index = CpuContext->Gs / 8;\r | |
87 | RegisterGroupSegLim->GsLim = Ia32Gdt[Index].Bits.LimitLow + (Ia32Gdt[Index].Bits.LimitHigh << 16);\r | |
88 | if (Ia32Gdt[Index].Bits.Granularity == 1) {\r | |
89 | RegisterGroupSegLim->GsLim = (RegisterGroupSegLim->GsLim << 12) | 0xfff;\r | |
90 | }\r | |
91 | \r | |
92 | Index = CpuContext->Fs / 8;\r | |
93 | RegisterGroupSegLim->FsLim = Ia32Gdt[Index].Bits.LimitLow + (Ia32Gdt[Index].Bits.LimitHigh << 16);\r | |
94 | if (Ia32Gdt[Index].Bits.Granularity == 1) {\r | |
95 | RegisterGroupSegLim->FsLim = (RegisterGroupSegLim->FsLim << 12) | 0xfff;\r | |
96 | }\r | |
97 | \r | |
98 | Index = CpuContext->Es / 8;\r | |
99 | RegisterGroupSegLim->EsLim = Ia32Gdt[Index].Bits.LimitLow + (Ia32Gdt[Index].Bits.LimitHigh << 16);\r | |
100 | if (Ia32Gdt[Index].Bits.Granularity == 1) {\r | |
101 | RegisterGroupSegLim->EsLim = (RegisterGroupSegLim->EsLim << 12) | 0xfff;\r | |
102 | }\r | |
103 | \r | |
104 | Index = CpuContext->Ds / 8;\r | |
105 | RegisterGroupSegLim->DsLim = Ia32Gdt[Index].Bits.LimitLow + (Ia32Gdt[Index].Bits.LimitHigh << 16);\r | |
106 | if (Ia32Gdt[Index].Bits.Granularity == 1) {\r | |
107 | RegisterGroupSegLim->DsLim = (RegisterGroupSegLim->DsLim << 12) | 0xfff;\r | |
108 | }\r | |
109 | \r | |
110 | RegisterGroupSegLim->LdtLim = 0xffff;\r | |
111 | RegisterGroupSegLim->TssLim = 0xffff;\r | |
112 | }\r | |
113 | \r | |
114 | /**\r | |
115 | Read group register by group index.\r | |
116 | \r | |
117 | @param[in] CpuContext Pointer to saved CPU context.\r | |
118 | @param[in] GroupIndex Group Index.\r | |
119 | \r | |
120 | @retval RETURN_SUCCESS Read successfully.\r | |
121 | @retval RETURN_NOT_SUPPORTED Group index cannot be supported.\r | |
122 | \r | |
123 | **/\r | |
124 | RETURN_STATUS\r | |
125 | ArchReadRegisterGroup (\r | |
126 | IN DEBUG_CPU_CONTEXT *CpuContext,\r | |
127 | IN UINT8 GroupIndex\r | |
128 | )\r | |
129 | {\r | |
130 | DEBUG_DATA_REPONSE_READ_REGISTER_GROUP RegisterGroup;\r | |
131 | DEBUG_DATA_REPONSE_READ_REGISTER_GROUP_SEGLIM RegisterGroupSegLim;\r | |
132 | DEBUG_DATA_REPONSE_READ_REGISTER_GROUP_SEGBASE RegisterGroupSegBase;\r | |
133 | \r | |
134 | switch (GroupIndex) {\r | |
135 | case SOFT_DEBUGGER_REGISTER_GROUP_GPDRS32:\r | |
136 | ReadRegisterGroup (CpuContext, &RegisterGroup);\r | |
137 | SendDataResponsePacket (CpuContext, (UINT8 *) &RegisterGroup, (UINT16) sizeof (DEBUG_DATA_REPONSE_READ_REGISTER_GROUP));\r | |
138 | break;\r | |
139 | \r | |
140 | case SOFT_DEBUGGER_REGISTER_GROUP_SEGMENT_LIMITS32:\r | |
141 | ReadRegisterGroupSegLim (CpuContext, &RegisterGroupSegLim);\r | |
142 | SendDataResponsePacket (CpuContext, (UINT8 *) &RegisterGroupSegLim, (UINT16) sizeof (DEBUG_DATA_REPONSE_READ_REGISTER_GROUP_SEGLIM));\r | |
143 | break;\r | |
144 | \r | |
145 | case SOFT_DEBUGGER_REGISTER_GROUP_SEGMENT_BASES32:\r | |
146 | ReadRegisterGroupSegBase (CpuContext, &RegisterGroupSegBase);\r | |
147 | SendDataResponsePacket (CpuContext, (UINT8 *) &RegisterGroupSegBase, (UINT16) sizeof (DEBUG_DATA_REPONSE_READ_REGISTER_GROUP_SEGBASE));\r | |
148 | break;\r | |
149 | \r | |
150 | default:\r | |
151 | return RETURN_UNSUPPORTED;\r | |
152 | }\r | |
153 | \r | |
154 | return RETURN_SUCCESS;\r | |
155 | }\r | |
156 | \r | |
157 | /**\r | |
158 | Read segment selector by register index.\r | |
159 | \r | |
160 | @param[in] CpuContext Pointer to saved CPU context.\r | |
161 | @param[in] RegisterIndex Register Index.\r | |
162 | \r | |
163 | @return Value of segment selector.\r | |
164 | \r | |
165 | **/\r | |
166 | UINT64\r | |
167 | ReadRegisterSelectorByIndex (\r | |
168 | IN DEBUG_CPU_CONTEXT *CpuContext,\r | |
169 | IN UINT8 RegisterIndex\r | |
170 | )\r | |
171 | {\r | |
172 | IA32_DESCRIPTOR *Ia32Descriptor;\r | |
173 | IA32_GDT *Ia32Gdt;\r | |
174 | UINT16 Selector;\r | |
175 | UINT32 Data32;\r | |
176 | \r | |
177 | Ia32Descriptor = (IA32_DESCRIPTOR *) CpuContext->Gdtr;\r | |
178 | Ia32Gdt = (IA32_GDT *) (Ia32Descriptor->Base);\r | |
179 | \r | |
180 | Selector = 0;\r | |
181 | \r | |
182 | switch (RegisterIndex) {\r | |
183 | case SOFT_DEBUGGER_REGISTER_CSAS:\r | |
184 | Selector = (UINT16) CpuContext->Cs;\r | |
185 | break;\r | |
186 | case SOFT_DEBUGGER_REGISTER_SSAS:\r | |
187 | Selector = (UINT16) CpuContext->Ss;\r | |
188 | break;\r | |
189 | case SOFT_DEBUGGER_REGISTER_GSAS:\r | |
190 | Selector = (UINT16) CpuContext->Gs;\r | |
191 | break;\r | |
192 | case SOFT_DEBUGGER_REGISTER_FSAS:\r | |
193 | Selector = (UINT16) CpuContext->Fs;\r | |
194 | break;\r | |
195 | case SOFT_DEBUGGER_REGISTER_ESAS:\r | |
196 | Selector = (UINT16) CpuContext->Es;\r | |
197 | break;\r | |
198 | case SOFT_DEBUGGER_REGISTER_DSAS:\r | |
199 | Selector = (UINT16) CpuContext->Ds;\r | |
200 | case SOFT_DEBUGGER_REGISTER_LDTAS:\r | |
201 | case SOFT_DEBUGGER_REGISTER_TSSAS:\r | |
202 | return 0x00820000;\r | |
203 | break;\r | |
204 | }\r | |
205 | \r | |
206 | Data32 = (UINT32) RShiftU64 (Ia32Gdt[Selector / 8].Uint64, 24);\r | |
207 | return (Data32 & (UINT32)(~0xff)) | Selector;\r | |
208 | \r | |
209 | }\r | |
210 | \r |