[mirror_edk2.git] / SourceLevelDebugPkg / Library / DebugAgent / DebugAgentCommon / X64 / AsmFuncs.S

#------------------------------------------------------------------------------\r
#\r
# Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
# which accompanies this distribution.  The full text of the license may be found at\r
# http://opensource.org/licenses/bsd-license.php.\r
#\r
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
#\r
# Module Name:\r
#\r
#   AsmFuncs.S\r
#\r
# Abstract:\r
#\r
#   Debug interrupt handle functions.\r
#\r
#------------------------------------------------------------------------------\r
\r
#include "DebugException.h"\r
\r
ASM_GLOBAL ASM_PFX(InterruptProcess)\r
\r
ASM_GLOBAL ASM_PFX(Exception0Handle)\r
ASM_GLOBAL ASM_PFX(ExceptionStubHeaderSize)\r
ASM_GLOBAL ASM_PFX(TimerInterruptHandle)\r
ASM_GLOBAL ASM_PFX(CommonEntry)\r
\r
.macro  AGENT_HANDLER_SIGNATURE\r
  .byte 0x41, 0x47, 0x54, 0x48   # AGENT_HANDLER_SIGNATURE     SIGNATURE_32('A','G','T','H')\r
.endm\r
\r
.data\r
\r
ASM_PFX(ExceptionStubHeaderSize):  .long     ASM_PFX(Exception1Handle) - ASM_PFX(Exception0Handle)\r
\r
\r
.text\r
\r
AGENT_HANDLER_SIGNATURE\r
ASM_PFX(Exception0Handle):\r
   cli\r
   pushq %rcx\r
   mov   $0, %rcx\r
   jmp   ASM_PFX(CommonEntry)\r
AGENT_HANDLER_SIGNATURE\r
ASM_PFX(Exception1Handle):\r
   cli\r
   pushq %rcx\r
   mov   $1, %rcx\r
   jmp   ASM_PFX(CommonEntry)\r
AGENT_HANDLER_SIGNATURE\r
ASM_PFX(Exception2Handle):\r
   cli\r
   pushq %rcx\r
   mov   $2, %rcx\r
   jmp   ASM_PFX(CommonEntry)\r
AGENT_HANDLER_SIGNATURE\r
ASM_PFX(Exception3Handle):\r
   cli\r
   pushq %rcx\r
   mov   $3, %rcx\r
   jmp   ASM_PFX(CommonEntry)\r
AGENT_HANDLER_SIGNATURE\r
ASM_PFX(Exception4Handle):\r
   cli\r
   pushq %rcx\r
   mov   $4, %rcx\r
   jmp   ASM_PFX(CommonEntry)\r
AGENT_HANDLER_SIGNATURE\r
ASM_PFX(Exception5Handle):\r
   cli\r
   pushq %rcx\r
   mov   $5, %rcx\r
   jmp   ASM_PFX(CommonEntry)\r
AGENT_HANDLER_SIGNATURE\r
ASM_PFX(Exception6Handle):\r
   cli\r
   pushq %rcx\r
   mov   $6, %rcx\r
   jmp   ASM_PFX(CommonEntry)\r
AGENT_HANDLER_SIGNATURE\r
ASM_PFX(Exception7Handle):\r
   cli\r
   pushq %rcx\r
   mov   $7, %rcx\r
   jmp   ASM_PFX(CommonEntry)\r
AGENT_HANDLER_SIGNATURE\r
ASM_PFX(Exception8Handle):\r
   cli\r
   pushq %rcx\r
   mov   $8, %rcx\r
   jmp   ASM_PFX(CommonEntry)\r
AGENT_HANDLER_SIGNATURE\r
ASM_PFX(Exception9Handle):\r
   cli\r
   pushq %rcx\r
   mov   $9, %rcx\r
   jmp   ASM_PFX(CommonEntry)\r
AGENT_HANDLER_SIGNATURE\r
ASM_PFX(Exception10Handle):\r
   cli\r
   pushq %rcx\r
   mov   $10, %rcx\r
   jmp   ASM_PFX(CommonEntry)\r
AGENT_HANDLER_SIGNATURE\r
ASM_PFX(Exception11Handle):\r
   cli\r
   pushq %rcx\r
   mov   $11, %rcx\r
   jmp   ASM_PFX(CommonEntry)\r
AGENT_HANDLER_SIGNATURE\r
ASM_PFX(Exception12Handle):\r
   cli\r
   pushq %rcx\r
   mov   $12, %rcx\r
   jmp   ASM_PFX(CommonEntry)\r
AGENT_HANDLER_SIGNATURE\r
ASM_PFX(Exception13Handle):\r
   cli\r
   pushq %rcx\r
   mov   $13, %rcx\r
   jmp   ASM_PFX(CommonEntry)\r
AGENT_HANDLER_SIGNATURE\r
ASM_PFX(Exception14Handle):\r
   cli\r
   pushq %rcx\r
   mov   $14, %rcx\r
   jmp   ASM_PFX(CommonEntry)\r
AGENT_HANDLER_SIGNATURE\r
ASM_PFX(Exception15Handle):\r
   cli\r
   pushq %rcx\r
   mov   $15, %rcx\r
   jmp   ASM_PFX(CommonEntry)\r
AGENT_HANDLER_SIGNATURE\r
ASM_PFX(Exception16Handle):\r
   cli\r
   pushq %rcx\r
   mov   $16, %rcx\r
   jmp   ASM_PFX(CommonEntry)\r
AGENT_HANDLER_SIGNATURE\r
ASM_PFX(Exception17Handle):\r
   cli\r
   pushq %rcx\r
   mov   $17, %rcx\r
   jmp   ASM_PFX(CommonEntry)\r
AGENT_HANDLER_SIGNATURE\r
ASM_PFX(Exception18Handle):\r
   cli\r
   pushq %rcx\r
   mov   $18, %rcx\r
   jmp   ASM_PFX(CommonEntry)\r
AGENT_HANDLER_SIGNATURE\r
ASM_PFX(Exception19Handle):\r
   cli\r
   pushq %rcx\r
   mov   $19, %rcx\r
   jmp   ASM_PFX(CommonEntry)\r
AGENT_HANDLER_SIGNATURE\r
ASM_PFX(TimerInterruptHandle):\r
   cli\r
   pushq %rcx\r
   mov   $32, %rcx\r
   jmp   ASM_PFX(CommonEntry)\r
\r
\r
ASM_PFX(CommonEntry):\r
\r
#---------------------------------------;\r
# CommonInterruptEntry                  ;\r
#---------------------------------------;\r
# The follow algorithm is used for the common interrupt routine.\r
\r
#\r
# +---------------------+ <-- 16-byte aligned ensured by processor\r
# +    Old SS           +\r
# +---------------------+\r
# +    Old RSP          +\r
# +---------------------+\r
# +    RFlags           +\r
# +---------------------+\r
# +    CS               +\r
# +---------------------+\r
# +    RIP              +\r
# +---------------------+\r
# +    Error Code       +\r
# +---------------------+\r
# + RCX / Vector Number +\r
# +---------------------+\r
# +    RBP              +\r
# +---------------------+ <-- RBP, 16-byte aligned\r
#\r
\r
# We need to determine if any extra data was pushed by the exception\r
  cmpq    $DEBUG_EXCEPT_DOUBLE_FAULT, %rcx\r
  je      NoExtrPush\r
  cmpq    $DEBUG_EXCEPT_INVALID_TSS, %rcx\r
  je      NoExtrPush\r
  cmpq    $DEBUG_EXCEPT_SEG_NOT_PRESENT, %rcx\r
  je      NoExtrPush\r
  cmpq    $DEBUG_EXCEPT_STACK_FAULT, %rcx\r
  je      NoExtrPush\r
  cmpq    $DEBUG_EXCEPT_GP_FAULT, %rcx\r
  je      NoExtrPush\r
  cmpq    $DEBUG_EXCEPT_PAGE_FAULT, %rcx\r
  je      NoExtrPush\r
  cmpq    $DEBUG_EXCEPT_ALIGNMENT_CHECK, %rcx\r
  je      NoExtrPush\r
\r
  pushq   (%rsp)\r
  movq    $0, 8(%rsp)\r
\r
NoExtrPush:\r
  #\r
  # All interrupt handlers are invoked through interrupt gates, so\r
  # IF flag automatically cleared at the entry point\r
  pushq   %rbp\r
  movq    %rsp, %rbp\r
\r
  #\r
  # Since here the stack pointer is 16-byte aligned, so\r
  # EFI_FX_SAVE_STATE_X64 of EFI_SYSTEM_CONTEXT_x64\r
  # is 16-byte aligned\r
  #\r
\r
## UINT64  R8, R9, R10, R11, R12, R13, R14, R15;\r
  pushq %r15\r
  pushq %r14\r
  pushq %r13\r
  pushq %r12\r
  pushq %r11\r
  pushq %r10\r
  pushq %r9\r
  pushq %r8\r
\r
  movq  %cr8, %r8\r
  pushq %r8\r
\r
## UINT64  Rdi, Rsi, Rbp, Rsp, Rbx, Rdx, Rcx, Rax;\r
  pushq %rax\r
  pushq %rbx\r
  pushq 8(%rbp)      # original rcx\r
  pushq %rdx\r
  pushq 48(%rbp)     # original rsp\r
  pushq (%rbp)       # original rbp\r
  pushq %rsi\r
  pushq %rdi\r
\r
## UINT64  Cr0, Cr1, Cr2, Cr3, Cr4;\r
  movq    %cr4, %rax\r
  orq     $0x208, %rax\r
  movq    %rax, %cr4\r
  pushq   %rax\r
  movq    %cr3, %rax\r
  pushq   %rax\r
  movq    %cr2, %rax\r
  pushq   %rax\r
  xorq    %rax, %rax\r
  pushq   %rax\r
  movq    %cr0, %rax\r
  pushq   %rax\r
\r
## UINT64  Gs, Fs, Es, Ds, Cs, Ss;  insure high 16 bits of each is zero\r
  xorq     %rax, %rax      # set rax to 0\r
  movzwq   56(%rbp), %rax\r
#  movq     %ss, %rax\r
  pushq    %rax\r
  movzwq   32(%rbp), %rax\r
#  movq     %cs, %rax\r
  pushq    %rax\r
  mov      %ds, %rax\r
  pushq    %rax\r
  mov      %es, %rax\r
  pushq    %rax\r
  mov      %fs, %rax\r
  pushq    %rax\r
  mov      %gs, %rax\r
  pushq    %rax\r
\r
## UINT64  Rip;\r
  pushq    24(%rbp)\r
\r
## UINT64  Gdtr[2], Idtr[2];\r
  subq     $16, %rsp\r
  sidt    (%rsp)\r
  subq     $16, %rsp\r
  sgdt    (%rsp)\r
\r
## UINT64  Ldtr, Tr;\r
  xorq    %rax, %rax\r
  strw    %ax\r
  pushq   %rax\r
  sldtw   %ax\r
  pushq   %rax\r
\r
## UINT64  RFlags;\r
  pushq   40(%rbp)\r
\r
## UINT64  Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;\r
   movq    %dr7, %rax\r
  pushq   %rax\r
## clear Dr7 while executing debugger itself\r
   xorq    %rax, %rax\r
   movq    %rax, %dr7\r
\r
   movq    %dr6, %rax\r
  pushq    %rax\r
## insure all status bits in dr6 are clear...\r
   xorq    %rax, %rax\r
   movq    %rax, %dr6\r
\r
   movq    %dr3, %rax\r
  pushq    %rax\r
   movq    %dr2, %rax\r
  pushq    %rax\r
   movq    %dr1, %rax\r
  pushq    %rax\r
   movq    %dr0, %rax\r
  pushq    %rax\r
\r
## FX_SAVE_STATE_X64 FxSaveState;\r
   subq    $512, %rsp\r
   movq    %rsp, %rdi\r
   .byte   0x0f, 0xae, 0b00000111\r
\r
## save the exception data;\r
   pushq   16(%rbp)\r
\r
## Clear Direction Flag\r
  cld\r
\r
## Prepare parameter and call\r
#  movq    8(%rbp), %rcx\r
   movq    %rsp, %rdx\r
   movq    %rcx, %r15   # save vector in r15\r
  #\r
  # Per X64 calling convention, allocate maximum parameter stack space\r
  # and make sure RSP is 16-byte aligned\r
  #\r
   subq    $(32 + 8), %rsp\r
   call    ASM_PFX(InterruptProcess)\r
   addq    $(32 + 8), %rsp\r
\r
## skip the exception data;\r
   addq    $8, %rsp\r
\r
## FX_SAVE_STATE_X64 FxSaveState;\r
\r
   movq    %rsp, %rsi\r
   .byte   0x0f, 0xae, 0b00001110\r
   addq    $512, %rsp\r
\r
## UINT64  Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;\r
   popq     %rax\r
   movq     %rax, %dr0\r
   popq     %rax\r
   movq     %rax, %dr1\r
   popq     %rax\r
   movq     %rax, %dr2\r
   popq     %rax\r
   movq     %rax, %dr3\r
## skip restore of dr6.  We cleared dr6 during the context save.\r
   addq     $8, %rsp\r
   popq     %rax\r
   movq     %rax, %dr7\r
\r
## UINT64  RFlags;\r
   popq    40(%rbp)\r
\r
## UINT64  Ldtr, Tr;\r
## UINT64  Gdtr[2], Idtr[2];\r
## Best not let anyone mess with these particular registers...\r
   addq    $48, %rsp\r
\r
## UINT64  Rip;\r
   popq    24(%rbp)\r
\r
## UINT64  Gs, Fs, Es, Ds, Cs, Ss;\r
   popq     %rax\r
  # mov     gs, rax ; not for gs\r
   popq     %rax\r
  # mov     fs, rax ; not for fs\r
  # (X64 will not use fs and gs, so we do not restore it)\r
   popq     %rax\r
   mov      %rax, %es\r
   popq     %rax\r
   mov      %rax, %ds\r
   popq     32(%rbp)\r
   popq     56(%rbp)\r
\r
## UINT64  Cr0, Cr1, Cr2, Cr3, Cr4, Cr8;\r
   popq     %rax\r
   movq     %rax, %cr0\r
   addq     $8, %rsp\r
   popq     %rax\r
   movq     %rax, %cr2\r
   popq     %rax\r
   movq     %rax, %cr3\r
   popq     %rax\r
   movq     %rax, %cr4\r
\r
## UINT64  Rdi, Rsi, Rbp, Rsp, Rbx, Rdx, Rcx, Rax;\r
## UINT64  R8, R9, R10, R11, R12, R13, R14, R15;\r
   popq     %rdi\r
   popq     %rsi\r
   addq     $8, %rsp\r
   addq     $8, %rsp\r
   popq     %rdx\r
   popq     %rcx\r
   popq     %rbx\r
   popq     %rax\r
\r
   popq     %r8\r
   movq     %r8, %cr8\r
\r
   popq     %r8\r
   popq     %r9\r
   popq     %r10\r
   popq     %r11\r
   popq     %r12\r
   popq     %r13\r
   popq     %r14\r
   popq     %r15\r
\r
   movq     %rbp, %rsp\r
   popq     %rbp\r
   addq     $16,  %rsp\r
   iretq\r
Commit	Line	Data
18b144ea	1	#------------------------------------------------------------------------------\r
18b144ea	2	#\r
4123bd7b	3	# Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>\r
18b144ea	4	# This program and the accompanying materials\r
	5	# are licensed and made available under the terms and conditions of the BSD License\r
	6	# which accompanies this distribution. The full text of the license may be found at\r
	7	# http://opensource.org/licenses/bsd-license.php.\r
	8	#\r
	9	# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
	10	# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
	11	#\r
	12	# Module Name:\r
	13	#\r
	14	# AsmFuncs.S\r
	15	#\r
	16	# Abstract:\r
	17	#\r
	18	# Debug interrupt handle functions.\r
	19	#\r
	20	#------------------------------------------------------------------------------\r
	21	\r
	22	#include "DebugException.h"\r
	23	\r
	24	ASM_GLOBAL ASM_PFX(InterruptProcess)\r
	25	\r
	26	ASM_GLOBAL ASM_PFX(Exception0Handle)\r
	27	ASM_GLOBAL ASM_PFX(ExceptionStubHeaderSize)\r
	28	ASM_GLOBAL ASM_PFX(TimerInterruptHandle)\r
	29	ASM_GLOBAL ASM_PFX(CommonEntry)\r
	30	\r
8cc26df4 JF	31	.macro AGENT_HANDLER_SIGNATURE\r
	32	.byte 0x41, 0x47, 0x54, 0x48 # AGENT_HANDLER_SIGNATURE SIGNATURE_32('A','G','T','H')\r
	33	.endm\r
	34	\r
af0202a4	35	.data\r
18b144ea	36	\r
19ee4a90	37	ASM_PFX(ExceptionStubHeaderSize): .long ASM_PFX(Exception1Handle) - ASM_PFX(Exception0Handle)\r
18b144ea	38	\r
	39	\r
	40	.text\r
	41	\r
8cc26df4	42	AGENT_HANDLER_SIGNATURE\r
18b144ea	43	ASM_PFX(Exception0Handle):\r
	44	cli\r
	45	pushq %rcx\r
	46	mov $0, %rcx\r
	47	jmp ASM_PFX(CommonEntry)\r
8cc26df4	48	AGENT_HANDLER_SIGNATURE\r
18b144ea	49	ASM_PFX(Exception1Handle):\r
	50	cli\r
	51	pushq %rcx\r
	52	mov $1, %rcx\r
	53	jmp ASM_PFX(CommonEntry)\r
8cc26df4	54	AGENT_HANDLER_SIGNATURE\r
18b144ea	55	ASM_PFX(Exception2Handle):\r
	56	cli\r
	57	pushq %rcx\r
	58	mov $2, %rcx\r
	59	jmp ASM_PFX(CommonEntry)\r
8cc26df4	60	AGENT_HANDLER_SIGNATURE\r
18b144ea	61	ASM_PFX(Exception3Handle):\r
	62	cli\r
	63	pushq %rcx\r
	64	mov $3, %rcx\r
	65	jmp ASM_PFX(CommonEntry)\r
8cc26df4	66	AGENT_HANDLER_SIGNATURE\r
18b144ea	67	ASM_PFX(Exception4Handle):\r
	68	cli\r
	69	pushq %rcx\r
	70	mov $4, %rcx\r
	71	jmp ASM_PFX(CommonEntry)\r
8cc26df4	72	AGENT_HANDLER_SIGNATURE\r
18b144ea	73	ASM_PFX(Exception5Handle):\r
	74	cli\r
	75	pushq %rcx\r
	76	mov $5, %rcx\r
	77	jmp ASM_PFX(CommonEntry)\r
8cc26df4	78	AGENT_HANDLER_SIGNATURE\r
18b144ea	79	ASM_PFX(Exception6Handle):\r
	80	cli\r
	81	pushq %rcx\r
	82	mov $6, %rcx\r
	83	jmp ASM_PFX(CommonEntry)\r
8cc26df4	84	AGENT_HANDLER_SIGNATURE\r
18b144ea	85	ASM_PFX(Exception7Handle):\r
	86	cli\r
	87	pushq %rcx\r
	88	mov $7, %rcx\r
	89	jmp ASM_PFX(CommonEntry)\r
8cc26df4	90	AGENT_HANDLER_SIGNATURE\r
18b144ea	91	ASM_PFX(Exception8Handle):\r
	92	cli\r
	93	pushq %rcx\r
	94	mov $8, %rcx\r
	95	jmp ASM_PFX(CommonEntry)\r
8cc26df4	96	AGENT_HANDLER_SIGNATURE\r
18b144ea	97	ASM_PFX(Exception9Handle):\r
	98	cli\r
	99	pushq %rcx\r
	100	mov $9, %rcx\r
	101	jmp ASM_PFX(CommonEntry)\r
8cc26df4	102	AGENT_HANDLER_SIGNATURE\r
18b144ea	103	ASM_PFX(Exception10Handle):\r
	104	cli\r
	105	pushq %rcx\r
	106	mov $10, %rcx\r
	107	jmp ASM_PFX(CommonEntry)\r
8cc26df4	108	AGENT_HANDLER_SIGNATURE\r
18b144ea	109	ASM_PFX(Exception11Handle):\r
	110	cli\r
	111	pushq %rcx\r
	112	mov $11, %rcx\r
	113	jmp ASM_PFX(CommonEntry)\r
8cc26df4	114	AGENT_HANDLER_SIGNATURE\r
18b144ea	115	ASM_PFX(Exception12Handle):\r
	116	cli\r
	117	pushq %rcx\r
	118	mov $12, %rcx\r
	119	jmp ASM_PFX(CommonEntry)\r
8cc26df4	120	AGENT_HANDLER_SIGNATURE\r
18b144ea	121	ASM_PFX(Exception13Handle):\r
	122	cli\r
	123	pushq %rcx\r
	124	mov $13, %rcx\r
	125	jmp ASM_PFX(CommonEntry)\r
8cc26df4	126	AGENT_HANDLER_SIGNATURE\r
18b144ea	127	ASM_PFX(Exception14Handle):\r
	128	cli\r
	129	pushq %rcx\r
	130	mov $14, %rcx\r
	131	jmp ASM_PFX(CommonEntry)\r
8cc26df4	132	AGENT_HANDLER_SIGNATURE\r
18b144ea	133	ASM_PFX(Exception15Handle):\r
	134	cli\r
	135	pushq %rcx\r
	136	mov $15, %rcx\r
	137	jmp ASM_PFX(CommonEntry)\r
8cc26df4	138	AGENT_HANDLER_SIGNATURE\r
18b144ea	139	ASM_PFX(Exception16Handle):\r
	140	cli\r
	141	pushq %rcx\r
	142	mov $16, %rcx\r
	143	jmp ASM_PFX(CommonEntry)\r
8cc26df4	144	AGENT_HANDLER_SIGNATURE\r
18b144ea	145	ASM_PFX(Exception17Handle):\r
	146	cli\r
	147	pushq %rcx\r
	148	mov $17, %rcx\r
	149	jmp ASM_PFX(CommonEntry)\r
8cc26df4	150	AGENT_HANDLER_SIGNATURE\r
18b144ea	151	ASM_PFX(Exception18Handle):\r
	152	cli\r
	153	pushq %rcx\r
	154	mov $18, %rcx\r
	155	jmp ASM_PFX(CommonEntry)\r
8cc26df4	156	AGENT_HANDLER_SIGNATURE\r
18b144ea	157	ASM_PFX(Exception19Handle):\r
	158	cli\r
	159	pushq %rcx\r
	160	mov $19, %rcx\r
	161	jmp ASM_PFX(CommonEntry)\r
8cc26df4	162	AGENT_HANDLER_SIGNATURE\r
18b144ea	163	ASM_PFX(TimerInterruptHandle):\r
	164	cli\r
	165	pushq %rcx\r
	166	mov $32, %rcx\r
	167	jmp ASM_PFX(CommonEntry)\r
	168	\r
	169	\r
	170	ASM_PFX(CommonEntry):\r
	171	\r
	172	#---------------------------------------;\r
	173	# CommonInterruptEntry ;\r
	174	#---------------------------------------;\r
	175	# The follow algorithm is used for the common interrupt routine.\r
	176	\r
	177	#\r
	178	# +---------------------+ <-- 16-byte aligned ensured by processor\r
	179	# + Old SS +\r
	180	# +---------------------+\r
	181	# + Old RSP +\r
	182	# +---------------------+\r
	183	# + RFlags +\r
	184	# +---------------------+\r
	185	# + CS +\r
	186	# +---------------------+\r
	187	# + RIP +\r
	188	# +---------------------+\r
	189	# + Error Code +\r
	190	# +---------------------+\r
	191	# + RCX / Vector Number +\r
	192	# +---------------------+\r
	193	# + RBP +\r
	194	# +---------------------+ <-- RBP, 16-byte aligned\r
	195	#\r
	196	\r
	197	# We need to determine if any extra data was pushed by the exception\r
	198	cmpq $DEBUG_EXCEPT_DOUBLE_FAULT, %rcx\r
	199	je NoExtrPush\r
	200	cmpq $DEBUG_EXCEPT_INVALID_TSS, %rcx\r
	201	je NoExtrPush\r
	202	cmpq $DEBUG_EXCEPT_SEG_NOT_PRESENT, %rcx\r
	203	je NoExtrPush\r
	204	cmpq $DEBUG_EXCEPT_STACK_FAULT, %rcx\r
	205	je NoExtrPush\r
	206	cmpq $DEBUG_EXCEPT_GP_FAULT, %rcx\r
	207	je NoExtrPush\r
	208	cmpq $DEBUG_EXCEPT_PAGE_FAULT, %rcx\r
	209	je NoExtrPush\r
	210	cmpq $DEBUG_EXCEPT_ALIGNMENT_CHECK, %rcx\r
	211	je NoExtrPush\r
	212	\r
	213	pushq (%rsp)\r
	214	movq $0, 8(%rsp)\r
	215	\r
	216	NoExtrPush:\r
	217	#\r
	218	# All interrupt handlers are invoked through interrupt gates, so\r
	219	# IF flag automatically cleared at the entry point\r
	220	pushq %rbp\r
	221	movq %rsp, %rbp\r
	222	\r
	223	#\r
	224	# Since here the stack pointer is 16-byte aligned, so\r
	225	# EFI_FX_SAVE_STATE_X64 of EFI_SYSTEM_CONTEXT_x64\r
	226	# is 16-byte aligned\r
227	#\r
228	\r
229	## UINT64 R8, R9, R10, R11, R12, R13, R14, R15;\r
230	pushq %r15\r
231	pushq %r14\r
232	pushq %r13\r
233	pushq %r12\r
234	pushq %r11\r
235	pushq %r10\r
236	pushq %r9\r
237	pushq %r8\r
238	\r
239	movq %cr8, %r8\r
240	pushq %r8\r
241	\r
242	## UINT64 Rdi, Rsi, Rbp, Rsp, Rbx, Rdx, Rcx, Rax;\r
243	pushq %rax\r
244	pushq %rbx\r
245	pushq 8(%rbp) # original rcx\r
246	pushq %rdx\r
247	pushq 48(%rbp) # original rsp\r
248	pushq (%rbp) # original rbp\r
249	pushq %rsi\r
250	pushq %rdi\r
251	\r
252	## UINT64 Cr0, Cr1, Cr2, Cr3, Cr4;\r
253	movq %cr4, %rax\r
254	orq $0x208, %rax\r
255	movq %rax, %cr4\r
256	pushq %rax\r
257	movq %cr3, %rax\r
258	pushq %rax\r
259	movq %cr2, %rax\r
260	pushq %rax\r
261	xorq %rax, %rax\r
262	pushq %rax\r
263	movq %cr0, %rax\r
264	pushq %rax\r
265	\r
266	## UINT64 Gs, Fs, Es, Ds, Cs, Ss; insure high 16 bits of each is zero\r
267	xorq %rax, %rax # set rax to 0\r
268	movzwq 56(%rbp), %rax\r
269	# movq %ss, %rax\r
270	pushq %rax\r
271	movzwq 32(%rbp), %rax\r
272	# movq %cs, %rax\r
273	pushq %rax\r
4123bd7b	274	mov %ds, %rax\r
18b144ea	275	pushq %rax\r
4123bd7b	276	mov %es, %rax\r
18b144ea	277	pushq %rax\r
4123bd7b	278	mov %fs, %rax\r
18b144ea	279	pushq %rax\r
4123bd7b	280	mov %gs, %rax\r
18b144ea	281	pushq %rax\r
	282	\r
	283	## UINT64 Rip;\r
	284	pushq 24(%rbp)\r
	285	\r
	286	## UINT64 Gdtr[2], Idtr[2];\r
	287	subq $16, %rsp\r
	288	sidt (%rsp)\r
	289	subq $16, %rsp\r
	290	sgdt (%rsp)\r
	291	\r
	292	## UINT64 Ldtr, Tr;\r
	293	xorq %rax, %rax\r
	294	strw %ax\r
	295	pushq %rax\r
	296	sldtw %ax\r
	297	pushq %rax\r
	298	\r
	299	## UINT64 RFlags;\r
	300	pushq 40(%rbp)\r
	301	\r
	302	## UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;\r
	303	movq %dr7, %rax\r
	304	pushq %rax\r
	305	## clear Dr7 while executing debugger itself\r
	306	xorq %rax, %rax\r
b422b62c	307	movq %rax, %dr7\r
18b144ea	308	\r
	309	movq %dr6, %rax\r
	310	pushq %rax\r
	311	## insure all status bits in dr6 are clear...\r
	312	xorq %rax, %rax\r
	313	movq %rax, %dr6\r
	314	\r
	315	movq %dr3, %rax\r
	316	pushq %rax\r
	317	movq %dr2, %rax\r
	318	pushq %rax\r
	319	movq %dr1, %rax\r
	320	pushq %rax\r
	321	movq %dr0, %rax\r
	322	pushq %rax\r
	323	\r
	324	## FX_SAVE_STATE_X64 FxSaveState;\r
	325	subq $512, %rsp\r
	326	movq %rsp, %rdi\r
	327	.byte 0x0f, 0xae, 0b00000111\r
	328	\r
93c0bdec	329	## save the exception data;\r
	330	pushq 16(%rbp)\r
	331	\r
18b144ea	332	## Clear Direction Flag\r
	333	cld\r
	334	\r
	335	## Prepare parameter and call\r
	336	# movq 8(%rbp), %rcx\r
	337	movq %rsp, %rdx\r
	338	movq %rcx, %r15 # save vector in r15\r
	339	#\r
	340	# Per X64 calling convention, allocate maximum parameter stack space\r
	341	# and make sure RSP is 16-byte aligned\r
	342	#\r
93c0bdec	343	subq $(32 + 8), %rsp\r
18b144ea	344	call ASM_PFX(InterruptProcess)\r
93c0bdec	345	addq $(32 + 8), %rsp\r
	346	\r
	347	## skip the exception data;\r
	348	addq $8, %rsp\r
18b144ea	349	\r
	350	## FX_SAVE_STATE_X64 FxSaveState;\r
	351	\r
	352	movq %rsp, %rsi\r
	353	.byte 0x0f, 0xae, 0b00001110\r
	354	addq $512, %rsp\r
	355	\r
	356	## UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;\r
	357	popq %rax\r
	358	movq %rax, %dr0\r
	359	popq %rax\r
	360	movq %rax, %dr1\r
	361	popq %rax\r
	362	movq %rax, %dr2\r
	363	popq %rax\r
	364	movq %rax, %dr3\r
	365	## skip restore of dr6. We cleared dr6 during the context save.\r
	366	addq $8, %rsp\r
	367	popq %rax\r
	368	movq %rax, %dr7\r
	369	\r
	370	## UINT64 RFlags;\r
	371	popq 40(%rbp)\r
	372	\r
	373	## UINT64 Ldtr, Tr;\r
	374	## UINT64 Gdtr[2], Idtr[2];\r
	375	## Best not let anyone mess with these particular registers...\r
	376	addq $48, %rsp\r
	377	\r
	378	## UINT64 Rip;\r
	379	popq 24(%rbp)\r
	380	\r
	381	## UINT64 Gs, Fs, Es, Ds, Cs, Ss;\r
	382	popq %rax\r
	383	# mov gs, rax ; not for gs\r
	384	popq %rax\r
	385	# mov fs, rax ; not for fs\r
	386	# (X64 will not use fs and gs, so we do not restore it)\r
	387	popq %rax\r
4123bd7b	388	mov %rax, %es\r
18b144ea	389	popq %rax\r
4123bd7b	390	mov %rax, %ds\r
18b144ea	391	popq 32(%rbp)\r
	392	popq 56(%rbp)\r
	393	\r
	394	## UINT64 Cr0, Cr1, Cr2, Cr3, Cr4, Cr8;\r
	395	popq %rax\r
	396	movq %rax, %cr0\r
	397	addq $8, %rsp\r
	398	popq %rax\r
	399	movq %rax, %cr2\r
	400	popq %rax\r
	401	movq %rax, %cr3\r
	402	popq %rax\r
	403	movq %rax, %cr4\r
	404	\r
	405	## UINT64 Rdi, Rsi, Rbp, Rsp, Rbx, Rdx, Rcx, Rax;\r
	406	## UINT64 R8, R9, R10, R11, R12, R13, R14, R15;\r
	407	popq %rdi\r
	408	popq %rsi\r
	409	addq $8, %rsp\r
	410	addq $8, %rsp\r
	411	popq %rdx\r
	412	popq %rcx\r
	413	popq %rbx\r
	414	popq %rax\r
	415	\r
	416	popq %r8\r
	417	movq %r8, %cr8\r
	418	\r
	419	popq %r8\r
	420	popq %r9\r
	421	popq %r10\r
	422	popq %r11\r
	423	popq %r12\r
	424	popq %r13\r
	425	popq %r14\r
	426	popq %r15\r
	427	\r
	428	movq %rbp, %rsp\r
	429	popq %rbp\r
	430	addq $16, %rsp\r
	431	iretq\r