[mirror_edk2.git] / SourceLevelDebugPkg / Library / DebugAgent / DebugAgentCommon / X64 / AsmFuncs.asm

;------------------------------------------------------------------------------\r
;\r
; Copyright (c) 2010 - 2012, Intel Corporation. All rights reserved.<BR>\r
; This program and the accompanying materials\r
; are licensed and made available under the terms and conditions of the BSD License\r
; which accompanies this distribution.  The full text of the license may be found at\r
; http://opensource.org/licenses/bsd-license.php.\r
;\r
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
;\r
; Module Name:\r
;\r
;   AsmFuncs.asm\r
;\r
; Abstract:\r
;\r
;   Debug interrupt handle functions.\r
;\r
;------------------------------------------------------------------------------\r
\r
#include "DebugException.h"\r
\r
\r
externdef InterruptProcess:near\r
\r
data SEGMENT\r
\r
public          Exception0Handle, TimerInterruptHandle, ExceptionStubHeaderSize\r
\r
ExceptionStubHeaderSize        dw      Exception1Handle - Exception0Handle ;\r
CommonEntryAddr                dq      CommonEntry ;\r
\r
.code\r
\r
Exception0Handle:\r
    cli\r
    push    rcx\r
    mov     rcx, 0\r
    jmp     qword ptr [CommonEntryAddr]\r
Exception1Handle:\r
    cli\r
    push    rcx\r
    mov     rcx, 1\r
    jmp     qword ptr [CommonEntryAddr]\r
Exception2Handle:\r
    cli\r
    push    rcx\r
    mov     rcx, 2\r
    jmp     qword ptr [CommonEntryAddr]\r
Exception3Handle:\r
    cli\r
    push    rcx\r
    mov     rcx, 3\r
    jmp     qword ptr [CommonEntryAddr]\r
Exception4Handle:\r
    cli\r
    push    rcx\r
    mov     rcx, 4\r
    jmp     qword ptr [CommonEntryAddr]\r
Exception5Handle:\r
    cli\r
    push    rcx\r
    mov     rcx, 5\r
    jmp     qword ptr [CommonEntryAddr]\r
Exception6Handle:\r
    cli\r
    push    rcx\r
    mov     rcx, 6\r
    jmp     qword ptr [CommonEntryAddr]\r
Exception7Handle:\r
    cli\r
    push    rcx\r
    mov     rcx, 7\r
    jmp     qword ptr [CommonEntryAddr]\r
Exception8Handle:\r
    cli\r
    push    rcx\r
    mov     rcx, 8\r
    jmp     qword ptr [CommonEntryAddr]\r
Exception9Handle:\r
    cli\r
    push    rcx\r
    mov     rcx, 9\r
    jmp     qword ptr [CommonEntryAddr]\r
Exception10Handle:\r
    cli\r
    push    rcx\r
    mov     rcx, 10\r
    jmp     qword ptr [CommonEntryAddr]\r
Exception11Handle:\r
    cli\r
    push    rcx\r
    mov     rcx, 11\r
    jmp     qword ptr [CommonEntryAddr]\r
Exception12Handle:\r
    cli\r
    push    rcx\r
    mov     rcx, 12\r
    jmp     qword ptr [CommonEntryAddr]\r
Exception13Handle:\r
    cli\r
    push    rcx\r
    mov     rcx, 13\r
    jmp     qword ptr [CommonEntryAddr]\r
Exception14Handle:\r
    cli\r
    push    rcx\r
    mov     rcx, 14\r
    jmp     qword ptr [CommonEntryAddr]\r
Exception15Handle:\r
    cli\r
    push    rcx\r
    mov     rcx, 15\r
    jmp     qword ptr [CommonEntryAddr]\r
Exception16Handle:\r
    cli\r
    push    rcx\r
    mov     rcx, 16\r
    jmp     qword ptr [CommonEntryAddr]\r
Exception17Handle:\r
    cli\r
    push    rcx\r
    mov     rcx, 17\r
    jmp     qword ptr [CommonEntryAddr]\r
Exception18Handle:\r
    cli\r
    push    rcx\r
    mov     rcx, 18\r
    jmp     qword ptr [CommonEntryAddr]\r
Exception19Handle:\r
    cli\r
    push    rcx\r
    mov     rcx, 19\r
    jmp     qword ptr [CommonEntryAddr]\r
\r
TimerInterruptHandle:\r
    cli\r
    push    rcx\r
    mov     rcx, 32\r
    jmp     qword ptr [CommonEntryAddr]\r
\r
CommonEntry:\r
    ; We need to determine if any extra data was pushed by the exception\r
    cmp     rcx, DEBUG_EXCEPT_DOUBLE_FAULT\r
    je      NoExtrPush\r
    cmp     rcx, DEBUG_EXCEPT_INVALID_TSS\r
    je      NoExtrPush\r
    cmp     rcx, DEBUG_EXCEPT_SEG_NOT_PRESENT\r
    je      NoExtrPush\r
    cmp     rcx, DEBUG_EXCEPT_STACK_FAULT\r
    je      NoExtrPush\r
    cmp     rcx, DEBUG_EXCEPT_GP_FAULT\r
    je      NoExtrPush\r
    cmp     rcx, DEBUG_EXCEPT_PAGE_FAULT\r
    je      NoExtrPush\r
    cmp     rcx, DEBUG_EXCEPT_ALIGNMENT_CHECK\r
    je      NoExtrPush\r
\r
    push    [rsp]\r
    mov     qword ptr [rsp + 8], 0\r
\r
NoExtrPush:\r
    push    rbp\r
    mov     rbp, rsp\r
\r
    ; store UINT64  r8, r9, r10, r11, r12, r13, r14, r15;\r
    push    r15\r
    push    r14\r
    push    r13\r
    push    r12\r
    push    r11\r
    push    r10\r
    push    r9\r
    push    r8\r
\r
    mov     r8, cr8\r
    push    r8\r
\r
    ; store UINT64  Rdi, Rsi, Rbp, Rsp, Rdx, Rcx, Rbx, Rax;\r
    push    rax\r
    push    rbx\r
    push    qword ptr [rbp + 8]       ; original rcx\r
    push    rdx\r
    push    qword ptr [rbp + 6 * 8]   ; original rsp\r
    push    qword ptr [rbp]           ; original rbp\r
    push    rsi\r
    push    rdi\r
\r
    ;; UINT32  Cr0, Cr1, Cr2, Cr3, Cr4;\r
    ;; insure FXSAVE/FXRSTOR is enabled in CR4...\r
    ;; ... while we're at it, make sure DE is also enabled...\r
    mov     rax, cr4\r
    or      rax, 208h\r
    mov     cr4, rax\r
    push    rax\r
    mov     rax, cr3\r
    push    rax\r
    mov     rax, cr2\r
    push    rax\r
    push    0         ; cr0 will not saved???\r
    mov     rax, cr0\r
    push    rax\r
\r
    xor     rax, rax\r
    mov     rax, Ss\r
    push    rax\r
    mov     rax, Cs\r
    push    rax\r
    mov     rax, Ds\r
    push    rax\r
    mov     rax, Es\r
    push    rax\r
    mov     rax, Fs\r
    push    rax\r
    mov     rax, Gs\r
    push    rax\r
\r
    ;; EIP\r
    mov     rax, [rbp + 8 * 3] ; EIP\r
    push    rax\r
\r
    ;; UINT64  Gdtr[2], Idtr[2];\r
    sub  rsp, 16\r
    sidt fword ptr [rsp]\r
    sub  rsp, 16\r
    sgdt fword ptr [rsp]\r
\r
    ;; UINT64  Ldtr, Tr;\r
    xor  rax, rax\r
    str  ax\r
    push rax\r
    sldt ax\r
    push rax\r
\r
    ;; EFlags\r
    mov     rax, [rbp + 8 * 5]\r
    push    rax\r
\r
    ;; UINT64  Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;\r
    mov     rax, dr7\r
    push    rax\r
\r
    ;; clear Dr7 while executing debugger itself\r
    xor     rax, rax\r
    mov     dr7, rax\r
\r
    ;; Dr6\r
    mov     rax, dr6\r
    push    rax\r
\r
    ;; insure all status bits in dr6 are clear...\r
    xor     rax, rax\r
    mov     dr6, rax\r
\r
    mov     rax, dr3\r
    push    rax\r
    mov     rax, dr2\r
    push    rax\r
    mov     rax, dr1\r
    push    rax\r
    mov     rax, dr0\r
    push    rax\r
\r
    sub     rsp, 512\r
    mov     rdi, rsp\r
    db 0fh, 0aeh, 00000111y ;fxsave [rdi]\r
\r
    ;; save the exception data\r
    push    qword ptr [rbp + 16]\r
\r
    ;; Clear Direction Flag\r
    cld\r
	\r
    ; call the C interrupt process function\r
    mov     rdx, rsp      ; Structure\r
    mov     r15, rcx      ; save vector in r15\r
    \r
    ;\r
    ; Per X64 calling convention, allocate maximum parameter stack space\r
    ; and make sure RSP is 16-byte aligned\r
    ;\r
    sub     rsp, 32 + 8\r
    call    InterruptProcess\r
    add     rsp, 32 + 8\r
\r
    ;; skip the exception data\r
    add     rsp, 8\r
    \r
    mov     rsi, rsp\r
    db 0fh, 0aeh, 00001110y ; fxrstor [rsi]\r
    add     rsp, 512\r
\r
    ;; UINT64  Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;\r
    pop     rax\r
    mov     dr0, rax\r
    pop     rax\r
    mov     dr1, rax\r
    pop     rax\r
    mov     dr2, rax\r
    pop     rax\r
    mov     dr3, rax\r
    ;; skip restore of dr6.  We cleared dr6 during the context save.\r
    add     rsp, 8\r
    pop     rax\r
    mov     dr7, rax\r
\r
    ;; set EFlags\r
    pop     qword ptr [rbp + 8 * 5]\r
\r
    ;; UINT64  Ldtr, Tr;\r
    ;; UINT64  Gdtr[2], Idtr[2];\r
    ;; Best not let anyone mess with these particular registers...\r
    add     rsp, 24 * 2\r
\r
    ;; UINT64  Eip;\r
    pop     qword ptr [rbp + 8 * 3]   ; set EIP in stack\r
\r
    ;; UINT64  Gs, Fs, Es, Ds, Cs, Ss;\r
    ;; NOTE - modified segment registers could hang the debugger...  We\r
    ;;        could attempt to insulate ourselves against this possibility,\r
    ;;        but that poses risks as well.\r
    ;;\r
    pop     rax\r
    pop     rax\r
    pop     rax\r
    mov     es, rax\r
    pop     rax\r
    mov     ds, rax\r
    pop     qword ptr [rbp + 8 * 4]    ; Set CS in stack\r
    pop     rax\r
    mov     ss, rax\r
\r
    ;; UINT64  Cr0, Cr1, Cr2, Cr3, Cr4;\r
    pop     rax\r
    mov     cr0, rax\r
    add     rsp, 8    ; skip for Cr1\r
    pop     rax\r
    mov     cr2, rax\r
    pop     rax\r
    mov     cr3, rax\r
    pop     rax\r
    mov     cr4, rax\r
\r
    ;; restore general register\r
    pop    rdi\r
    pop    rsi\r
    add    rsp, 8  ; skip rbp\r
    add    rsp, 8  ; skip rsp\r
    pop    rdx\r
    pop    rcx\r
    pop    rbx\r
    pop    rax\r
\r
    pop    r8\r
    mov    cr8, r8\r
\r
    ; store UINT64  r8, r9, r10, r11, r12, r13, r14, r15;\r
    pop     r8\r
    pop     r9\r
    pop     r10\r
    pop     r11\r
    pop     r12\r
    pop     r13\r
    pop     r14\r
    pop     r15\r
\r
    mov     rsp, rbp\r
    pop     rbp\r
    add     rsp, 16      ; skip rcx and error code\r
\r
    iretq\r
\r
END\r
Commit	Line	Data
18b144ea	1	;------------------------------------------------------------------------------\r
18b144ea	2	;\r
93c0bdec	3	; Copyright (c) 2010 - 2012, Intel Corporation. All rights reserved.<BR>\r
18b144ea	4	; This program and the accompanying materials\r
	5	; are licensed and made available under the terms and conditions of the BSD License\r
	6	; which accompanies this distribution. The full text of the license may be found at\r
	7	; http://opensource.org/licenses/bsd-license.php.\r
	8	;\r
	9	; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
	10	; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
	11	;\r
	12	; Module Name:\r
	13	;\r
	14	; AsmFuncs.asm\r
	15	;\r
	16	; Abstract:\r
	17	;\r
	18	; Debug interrupt handle functions.\r
	19	;\r
	20	;------------------------------------------------------------------------------\r
	21	\r
	22	#include "DebugException.h"\r
	23	\r
	24	\r
	25	externdef InterruptProcess:near\r
	26	\r
	27	data SEGMENT\r
	28	\r
	29	public Exception0Handle, TimerInterruptHandle, ExceptionStubHeaderSize\r
	30	\r
	31	ExceptionStubHeaderSize dw Exception1Handle - Exception0Handle ;\r
	32	CommonEntryAddr dq CommonEntry ;\r
	33	\r
	34	.code\r
	35	\r
	36	Exception0Handle:\r
	37	cli\r
	38	push rcx\r
	39	mov rcx, 0\r
	40	jmp qword ptr [CommonEntryAddr]\r
	41	Exception1Handle:\r
	42	cli\r
	43	push rcx\r
	44	mov rcx, 1\r
	45	jmp qword ptr [CommonEntryAddr]\r
	46	Exception2Handle:\r
	47	cli\r
	48	push rcx\r
	49	mov rcx, 2\r
	50	jmp qword ptr [CommonEntryAddr]\r
	51	Exception3Handle:\r
	52	cli\r
	53	push rcx\r
	54	mov rcx, 3\r
	55	jmp qword ptr [CommonEntryAddr]\r
	56	Exception4Handle:\r
	57	cli\r
	58	push rcx\r
	59	mov rcx, 4\r
	60	jmp qword ptr [CommonEntryAddr]\r
	61	Exception5Handle:\r
	62	cli\r
	63	push rcx\r
	64	mov rcx, 5\r
	65	jmp qword ptr [CommonEntryAddr]\r
	66	Exception6Handle:\r
	67	cli\r
68	push rcx\r
69	mov rcx, 6\r
70	jmp qword ptr [CommonEntryAddr]\r
71	Exception7Handle:\r
72	cli\r
73	push rcx\r
74	mov rcx, 7\r
75	jmp qword ptr [CommonEntryAddr]\r
76	Exception8Handle:\r
77	cli\r
78	push rcx\r
79	mov rcx, 8\r
80	jmp qword ptr [CommonEntryAddr]\r
81	Exception9Handle:\r
82	cli\r
83	push rcx\r
84	mov rcx, 9\r
85	jmp qword ptr [CommonEntryAddr]\r
86	Exception10Handle:\r
87	cli\r
88	push rcx\r
89	mov rcx, 10\r
90	jmp qword ptr [CommonEntryAddr]\r
91	Exception11Handle:\r
92	cli\r
93	push rcx\r
94	mov rcx, 11\r
95	jmp qword ptr [CommonEntryAddr]\r
96	Exception12Handle:\r
97	cli\r
98	push rcx\r
99	mov rcx, 12\r
100	jmp qword ptr [CommonEntryAddr]\r
101	Exception13Handle:\r
102	cli\r
103	push rcx\r
104	mov rcx, 13\r
105	jmp qword ptr [CommonEntryAddr]\r
106	Exception14Handle:\r
107	cli\r
108	push rcx\r
109	mov rcx, 14\r
110	jmp qword ptr [CommonEntryAddr]\r
111	Exception15Handle:\r
112	cli\r
113	push rcx\r
114	mov rcx, 15\r
115	jmp qword ptr [CommonEntryAddr]\r
116	Exception16Handle:\r
117	cli\r
118	push rcx\r
119	mov rcx, 16\r
120	jmp qword ptr [CommonEntryAddr]\r
121	Exception17Handle:\r
122	cli\r
123	push rcx\r
124	mov rcx, 17\r
125	jmp qword ptr [CommonEntryAddr]\r
126	Exception18Handle:\r
127	cli\r
128	push rcx\r
129	mov rcx, 18\r
130	jmp qword ptr [CommonEntryAddr]\r
131	Exception19Handle:\r
132	cli\r
133	push rcx\r
134	mov rcx, 19\r
135	jmp qword ptr [CommonEntryAddr]\r
136	\r
137	TimerInterruptHandle:\r
138	cli\r
139	push rcx\r
140	mov rcx, 32\r
141	jmp qword ptr [CommonEntryAddr]\r
142	\r
143	CommonEntry:\r
144	; We need to determine if any extra data was pushed by the exception\r
145	cmp rcx, DEBUG_EXCEPT_DOUBLE_FAULT\r
146	je NoExtrPush\r
147	cmp rcx, DEBUG_EXCEPT_INVALID_TSS\r
148	je NoExtrPush\r
149	cmp rcx, DEBUG_EXCEPT_SEG_NOT_PRESENT\r
150	je NoExtrPush\r
151	cmp rcx, DEBUG_EXCEPT_STACK_FAULT\r
152	je NoExtrPush\r
153	cmp rcx, DEBUG_EXCEPT_GP_FAULT\r
154	je NoExtrPush\r
155	cmp rcx, DEBUG_EXCEPT_PAGE_FAULT\r
156	je NoExtrPush\r
157	cmp rcx, DEBUG_EXCEPT_ALIGNMENT_CHECK\r
158	je NoExtrPush\r
159	\r
160	push [rsp]\r
161	mov qword ptr [rsp + 8], 0\r
162	\r
163	NoExtrPush:\r
164	push rbp\r
165	mov rbp, rsp\r
166	\r
167	; store UINT64 r8, r9, r10, r11, r12, r13, r14, r15;\r
168	push r15\r
169	push r14\r
170	push r13\r
171	push r12\r
172	push r11\r
173	push r10\r
174	push r9\r
175	push r8\r
176	\r
177	mov r8, cr8\r
178	push r8\r
179	\r
180	; store UINT64 Rdi, Rsi, Rbp, Rsp, Rdx, Rcx, Rbx, Rax;\r
181	push rax\r
182	push rbx\r
183	push qword ptr [rbp + 8] ; original rcx\r
184	push rdx\r
185	push qword ptr [rbp + 6 * 8] ; original rsp\r
186	push qword ptr [rbp] ; original rbp\r
187	push rsi\r
188	push rdi\r
189	\r
190	;; UINT32 Cr0, Cr1, Cr2, Cr3, Cr4;\r
191	;; insure FXSAVE/FXRSTOR is enabled in CR4...\r
192	;; ... while we're at it, make sure DE is also enabled...\r
193	mov rax, cr4\r
194	or rax, 208h\r
195	mov cr4, rax\r
196	push rax\r
197	mov rax, cr3\r
198	push rax\r
199	mov rax, cr2\r
200	push rax\r
201	push 0 ; cr0 will not saved???\r
202	mov rax, cr0\r
203	push rax\r
204	\r
205	xor rax, rax\r
206	mov rax, Ss\r
207	push rax\r
208	mov rax, Cs\r
209	push rax\r
210	mov rax, Ds\r
211	push rax\r
212	mov rax, Es\r
213	push rax\r
214	mov rax, Fs\r
215	push rax\r
216	mov rax, Gs\r
217	push rax\r
218	\r
219	;; EIP\r
220	mov rax, [rbp + 8 * 3] ; EIP\r
221	push rax\r
222	\r
223	;; UINT64 Gdtr[2], Idtr[2];\r
224	sub rsp, 16\r
225	sidt fword ptr [rsp]\r
226	sub rsp, 16\r
227	sgdt fword ptr [rsp]\r
228	\r
229	;; UINT64 Ldtr, Tr;\r
230	xor rax, rax\r
231	str ax\r
232	push rax\r
233	sldt ax\r
234	push rax\r
235	\r
236	;; EFlags\r
237	mov rax, [rbp + 8 * 5]\r
238	push rax\r
239	\r
240	;; UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;\r
241	mov rax, dr7\r
242	push rax\r
243	\r
244	;; clear Dr7 while executing debugger itself\r
245	xor rax, rax\r
246	mov dr7, rax\r
247	\r
248	;; Dr6\r
249	mov rax, dr6\r
250	push rax\r
251	\r
252	;; insure all status bits in dr6 are clear...\r
253	xor rax, rax\r
254	mov dr6, rax\r
255	\r
256	mov rax, dr3\r
257	push rax\r
258	mov rax, dr2\r
259	push rax\r
260	mov rax, dr1\r
261	push rax\r
262	mov rax, dr0\r
263	push rax\r
264	\r
265	sub rsp, 512\r
93c0bdec	266	mov rdi, rsp\r
18b144ea	267	db 0fh, 0aeh, 00000111y ;fxsave [rdi]\r
18b144ea	268	\r
93c0bdec	269	;; save the exception data\r
	270	push qword ptr [rbp + 16]\r
	271	\r
18b144ea	272	;; Clear Direction Flag\r
	273	cld\r
	274	\r
	275	; call the C interrupt process function\r
	276	mov rdx, rsp ; Structure\r
	277	mov r15, rcx ; save vector in r15\r
	278	\r
93c0bdec	279	;\r
	280	; Per X64 calling convention, allocate maximum parameter stack space\r
	281	; and make sure RSP is 16-byte aligned\r
	282	;\r
	283	sub rsp, 32 + 8\r
18b144ea	284	call InterruptProcess\r
93c0bdec	285	add rsp, 32 + 8\r
	286	\r
	287	;; skip the exception data\r
	288	add rsp, 8\r
18b144ea	289	\r
	290	mov rsi, rsp\r
	291	db 0fh, 0aeh, 00001110y ; fxrstor [rsi]\r
	292	add rsp, 512\r
	293	\r
	294	;; UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;\r
	295	pop rax\r
	296	mov dr0, rax\r
	297	pop rax\r
	298	mov dr1, rax\r
	299	pop rax\r
	300	mov dr2, rax\r
	301	pop rax\r
	302	mov dr3, rax\r
	303	;; skip restore of dr6. We cleared dr6 during the context save.\r
	304	add rsp, 8\r
	305	pop rax\r
	306	mov dr7, rax\r
	307	\r
	308	;; set EFlags\r
	309	pop qword ptr [rbp + 8 * 5]\r
	310	\r
	311	;; UINT64 Ldtr, Tr;\r
	312	;; UINT64 Gdtr[2], Idtr[2];\r
	313	;; Best not let anyone mess with these particular registers...\r
	314	add rsp, 24 * 2\r
	315	\r
	316	;; UINT64 Eip;\r
	317	pop qword ptr [rbp + 8 * 3] ; set EIP in stack\r
	318	\r
	319	;; UINT64 Gs, Fs, Es, Ds, Cs, Ss;\r
	320	;; NOTE - modified segment registers could hang the debugger... We\r
	321	;; could attempt to insulate ourselves against this possibility,\r
	322	;; but that poses risks as well.\r
	323	;;\r
	324	pop rax\r
	325	pop rax\r
	326	pop rax\r
	327	mov es, rax\r
	328	pop rax\r
	329	mov ds, rax\r
	330	pop qword ptr [rbp + 8 * 4] ; Set CS in stack\r
	331	pop rax\r
	332	mov ss, rax\r
	333	\r
	334	;; UINT64 Cr0, Cr1, Cr2, Cr3, Cr4;\r
	335	pop rax\r
	336	mov cr0, rax\r
	337	add rsp, 8 ; skip for Cr1\r
	338	pop rax\r
	339	mov cr2, rax\r
	340	pop rax\r
	341	mov cr3, rax\r
	342	pop rax\r
	343	mov cr4, rax\r
	344	\r
	345	;; restore general register\r
	346	pop rdi\r
	347	pop rsi\r
	348	add rsp, 8 ; skip rbp\r
	349	add rsp, 8 ; skip rsp\r
	350	pop rdx\r
	351	pop rcx\r
	352	pop rbx\r
353	pop rax\r
354	\r
355	pop r8\r
356	mov cr8, r8\r
357	\r
358	; store UINT64 r8, r9, r10, r11, r12, r13, r14, r15;\r
359	pop r8\r
360	pop r9\r
361	pop r10\r
362	pop r11\r
363	pop r12\r
364	pop r13\r
365	pop r14\r
366	pop r15\r
367	\r
368	mov rsp, rbp\r
369	pop rbp\r
370	add rsp, 16 ; skip rcx and error code\r
371	\r
372	iretq\r
373	\r
374	END\r