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ea0f431c JF |
1 | /** @file\r |
2 | Definitions to install Multiple Processor PPI.\r | |
3 | \r | |
9bedfb2f | 4 | Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>\r |
ea0f431c JF |
5 | This program and the accompanying materials\r |
6 | are licensed and made available under the terms and conditions of the BSD License\r | |
7 | which accompanies this distribution. The full text of the license may be found at\r | |
8 | http://opensource.org/licenses/bsd-license.php\r | |
9 | \r | |
10 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
11 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
12 | \r | |
13 | **/\r | |
14 | \r | |
15 | #ifndef _CPU_MP_PEI_H_\r | |
16 | #define _CPU_MP_PEI_H_\r | |
17 | \r | |
18 | #include <PiPei.h>\r | |
19 | \r | |
20 | #include <Ppi/MpServices.h>\r | |
21 | #include <Ppi/SecPlatformInformation.h>\r | |
22 | #include <Ppi/SecPlatformInformation2.h>\r | |
23 | #include <Ppi/EndOfPeiPhase.h>\r | |
9bedfb2f | 24 | #include <Ppi/VectorHandoffInfo.h>\r |
ea0f431c | 25 | \r |
28a7ddf0 | 26 | #include <Register/Cpuid.h>\r |
ea0f431c JF |
27 | #include <Register/LocalApic.h>\r |
28 | \r | |
29 | #include <Library/BaseLib.h>\r | |
30 | #include <Library/BaseMemoryLib.h>\r | |
31 | #include <Library/DebugLib.h>\r | |
32 | #include <Library/HobLib.h>\r | |
33 | #include <Library/LocalApicLib.h>\r | |
34 | #include <Library/MtrrLib.h>\r | |
35 | #include <Library/PcdLib.h>\r | |
36 | #include <Library/PeimEntryPoint.h>\r | |
37 | #include <Library/PeiServicesLib.h>\r | |
38 | #include <Library/ReportStatusCodeLib.h>\r | |
39 | #include <Library/SynchronizationLib.h>\r | |
40 | #include <Library/TimerLib.h>\r | |
41 | #include <Library/UefiCpuLib.h>\r | |
c87e41b4 | 42 | #include <Library/CpuLib.h>\r |
9bedfb2f | 43 | #include <Library/CpuExceptionHandlerLib.h>\r |
ea0f431c JF |
44 | \r |
45 | #include "Microcode.h"\r | |
46 | \r | |
47 | //\r | |
48 | // AP state\r | |
49 | //\r | |
50 | typedef enum {\r | |
51 | CpuStateIdle,\r | |
52 | CpuStateBusy,\r | |
53 | CpuStateDisabled\r | |
54 | } CPU_STATE;\r | |
55 | \r | |
c87e41b4 JF |
56 | #define WAKEUP_AP_SIGNAL SIGNATURE_32 ('S', 'T', 'A', 'P')\r |
57 | \r | |
4de216c0 JF |
58 | typedef enum {\r |
59 | ApInHltLoop = 1,\r | |
60 | ApInMwaitLoop = 2,\r | |
61 | ApInRunLoop = 3\r | |
62 | } AP_LOOP_MODE;\r | |
63 | \r | |
ea0f431c JF |
64 | //\r |
65 | // AP reset code information\r | |
66 | //\r | |
67 | typedef struct {\r | |
68 | UINT8 *RendezvousFunnelAddress;\r | |
69 | UINTN PModeEntryOffset;\r | |
70 | UINTN LModeEntryOffset;\r | |
71 | UINTN RendezvousFunnelSize;\r | |
72 | } MP_ASSEMBLY_ADDRESS_MAP;\r | |
73 | \r | |
74 | //\r | |
75 | // CPU exchange information for switch BSP\r | |
76 | //\r | |
77 | typedef struct {\r | |
78 | UINT8 State; // offset 0\r | |
79 | UINTN StackPointer; // offset 4 / 8\r | |
80 | IA32_DESCRIPTOR Gdtr; // offset 8 / 16\r | |
81 | IA32_DESCRIPTOR Idtr; // offset 14 / 26\r | |
82 | } CPU_EXCHANGE_ROLE_INFO;\r | |
83 | \r | |
84 | typedef struct _PEI_CPU_MP_DATA PEI_CPU_MP_DATA;\r | |
85 | \r | |
d603b115 | 86 | #pragma pack(1)\r |
ea0f431c JF |
87 | \r |
88 | typedef union {\r | |
89 | struct {\r | |
90 | UINT32 LimitLow : 16;\r | |
91 | UINT32 BaseLow : 16;\r | |
92 | UINT32 BaseMid : 8;\r | |
93 | UINT32 Type : 4;\r | |
94 | UINT32 System : 1;\r | |
95 | UINT32 Dpl : 2;\r | |
96 | UINT32 Present : 1;\r | |
97 | UINT32 LimitHigh : 4;\r | |
98 | UINT32 Software : 1;\r | |
99 | UINT32 Reserved : 1;\r | |
100 | UINT32 DefaultSize : 1;\r | |
101 | UINT32 Granularity : 1;\r | |
102 | UINT32 BaseHigh : 8;\r | |
103 | } Bits;\r | |
104 | UINT64 Uint64;\r | |
105 | } IA32_GDT;\r | |
106 | \r | |
107 | //\r | |
108 | // MP CPU exchange information for AP reset code\r | |
d603b115 JF |
109 | // This structure is required to be packed because fixed field offsets\r |
110 | // into this structure are used in assembly code in this module\r | |
ea0f431c JF |
111 | //\r |
112 | typedef struct {\r | |
113 | UINTN Lock;\r | |
114 | UINTN StackStart;\r | |
115 | UINTN StackSize;\r | |
116 | UINTN CFunction;\r | |
117 | IA32_DESCRIPTOR GdtrProfile;\r | |
118 | IA32_DESCRIPTOR IdtrProfile;\r | |
119 | UINTN BufferStart;\r | |
120 | UINTN PmodeOffset;\r | |
121 | UINTN NumApsExecuting;\r | |
122 | UINTN LmodeOffset;\r | |
123 | UINTN Cr3;\r | |
124 | PEI_CPU_MP_DATA *PeiCpuMpData;\r | |
125 | } MP_CPU_EXCHANGE_INFO;\r | |
126 | \r | |
127 | #pragma pack()\r | |
128 | \r | |
ef1fdb80 JF |
129 | typedef struct {\r |
130 | UINTN Cr0;\r | |
131 | UINTN Cr3;\r | |
132 | UINTN Cr4;\r | |
133 | UINTN Dr0;\r | |
134 | UINTN Dr1;\r | |
135 | UINTN Dr2;\r | |
136 | UINTN Dr3;\r | |
137 | UINTN Dr6;\r | |
138 | UINTN Dr7;\r | |
139 | } CPU_VOLATILE_REGISTERS;\r | |
140 | \r | |
ea0f431c | 141 | typedef struct {\r |
e001e11f | 142 | volatile UINT32 *StartupApSignal;\r |
ea0f431c JF |
143 | UINT32 ApicId;\r |
144 | EFI_HEALTH_FLAGS Health;\r | |
145 | CPU_STATE State;\r | |
146 | BOOLEAN CpuHealthy;\r | |
ef1fdb80 | 147 | CPU_VOLATILE_REGISTERS VolatileRegisters;\r |
ea0f431c JF |
148 | } PEI_CPU_DATA;\r |
149 | \r | |
150 | //\r | |
151 | // PEI CPU MP Data save in memory\r | |
152 | //\r | |
153 | struct _PEI_CPU_MP_DATA {\r | |
2f0261b7 | 154 | SPIN_LOCK MpLock;\r |
ea0f431c JF |
155 | UINT32 CpuCount;\r |
156 | UINT32 BspNumber;\r | |
157 | UINTN Buffer;\r | |
158 | UINTN CpuApStackSize;\r | |
159 | MP_ASSEMBLY_ADDRESS_MAP AddressMap;\r | |
160 | UINTN WakeupBuffer;\r | |
161 | UINTN BackupBuffer;\r | |
162 | UINTN BackupBufferSize;\r | |
163 | UINTN ApFunction;\r | |
164 | UINTN ApFunctionArgument;\r | |
165 | volatile UINT32 FinishedCount;\r | |
166 | BOOLEAN EndOfPeiFlag;\r | |
167 | BOOLEAN InitFlag;\r | |
2f0261b7 | 168 | BOOLEAN X2ApicEnable;\r |
ea0f431c JF |
169 | CPU_EXCHANGE_ROLE_INFO BSPInfo;\r |
170 | CPU_EXCHANGE_ROLE_INFO APInfo;\r | |
171 | MTRR_SETTINGS MtrrTable;\r | |
e001e11f JF |
172 | UINT8 ApLoopMode;\r |
173 | UINT8 ApTargetCState;\r | |
ea0f431c JF |
174 | PEI_CPU_DATA *CpuData;\r |
175 | volatile MP_CPU_EXCHANGE_INFO *MpCpuExchangeInfo;\r | |
176 | };\r | |
177 | extern EFI_PEI_PPI_DESCRIPTOR mPeiCpuMpPpiDesc;\r | |
178 | \r | |
179 | \r | |
180 | /**\r | |
181 | Assembly code to get starting address and size of the rendezvous entry for APs.\r | |
182 | Information for fixing a jump instruction in the code is also returned.\r | |
183 | \r | |
184 | @param AddressMap Output buffer for address map information.\r | |
185 | **/\r | |
186 | VOID\r | |
187 | EFIAPI\r | |
188 | AsmGetAddressMap (\r | |
189 | OUT MP_ASSEMBLY_ADDRESS_MAP *AddressMap\r | |
190 | );\r | |
191 | \r | |
192 | /**\r | |
193 | Assembly code to load GDT table and update segment accordingly.\r | |
194 | \r | |
195 | @param Gdtr Pointer to GDT descriptor\r | |
196 | **/\r | |
197 | VOID\r | |
198 | EFIAPI\r | |
199 | AsmInitializeGdt (\r | |
200 | IN IA32_DESCRIPTOR *Gdtr\r | |
201 | );\r | |
202 | \r | |
ea0f431c JF |
203 | /**\r |
204 | Get available system memory below 1MB by specified size.\r | |
205 | \r | |
206 | @param PeiCpuMpData Pointer to PEI CPU MP Data\r | |
207 | **/\r | |
208 | VOID\r | |
209 | BackupAndPrepareWakeupBuffer(\r | |
210 | IN PEI_CPU_MP_DATA *PeiCpuMpData\r | |
211 | );\r | |
212 | \r | |
213 | /**\r | |
214 | Restore wakeup buffer data.\r | |
215 | \r | |
216 | @param PeiCpuMpData Pointer to PEI CPU MP Data\r | |
217 | **/\r | |
218 | VOID\r | |
219 | RestoreWakeupBuffer(\r | |
220 | IN PEI_CPU_MP_DATA *PeiCpuMpData\r | |
221 | );\r | |
222 | \r | |
223 | /**\r | |
224 | Notify function on End Of Pei PPI.\r | |
225 | \r | |
226 | On S3 boot, this function will restore wakeup buffer data.\r | |
227 | On normal boot, this function will flag wakeup buffer to be un-used type.\r | |
228 | \r | |
229 | @param PeiServices The pointer to the PEI Services Table.\r | |
230 | @param NotifyDescriptor Address of the notification descriptor data structure.\r | |
231 | @param Ppi Address of the PPI that was installed.\r | |
232 | \r | |
233 | @retval EFI_SUCCESS When everything is OK.\r | |
234 | \r | |
235 | **/\r | |
236 | EFI_STATUS\r | |
237 | EFIAPI\r | |
238 | CpuMpEndOfPeiCallback (\r | |
239 | IN EFI_PEI_SERVICES **PeiServices,\r | |
240 | IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDescriptor,\r | |
241 | IN VOID *Ppi\r | |
242 | );\r | |
243 | \r | |
244 | /**\r | |
245 | This function will be called by BSP to wakeup AP.\r | |
246 | \r | |
247 | @param PeiCpuMpData Pointer to PEI CPU MP Data\r | |
248 | @param Broadcast TRUE: Send broadcast IPI to all APs\r | |
249 | FALSE: Send IPI to AP by ApicId\r | |
a09647f3 | 250 | @param ProcessorNumber The handle number of specified processor\r |
ea0f431c JF |
251 | @param Procedure The function to be invoked by AP\r |
252 | @param ProcedureArgument The argument to be passed into AP function\r | |
253 | **/\r | |
254 | VOID\r | |
255 | WakeUpAP (\r | |
256 | IN PEI_CPU_MP_DATA *PeiCpuMpData,\r | |
257 | IN BOOLEAN Broadcast,\r | |
a09647f3 | 258 | IN UINTN ProcessorNumber,\r |
ea0f431c JF |
259 | IN EFI_AP_PROCEDURE Procedure, OPTIONAL\r |
260 | IN VOID *ProcedureArgument OPTIONAL\r | |
261 | );\r | |
262 | \r | |
263 | /**\r | |
264 | Get CPU MP Data pointer from the Guided HOB.\r | |
265 | \r | |
266 | @return Pointer to Pointer to PEI CPU MP Data\r | |
267 | **/\r | |
268 | PEI_CPU_MP_DATA *\r | |
269 | GetMpHobData (\r | |
270 | VOID\r | |
271 | );\r | |
272 | \r | |
273 | /**\r | |
274 | Find the current Processor number by APIC ID.\r | |
275 | \r | |
276 | @param PeiCpuMpData Pointer to PEI CPU MP Data\r | |
277 | @param ProcessorNumber Return the pocessor number found\r | |
278 | \r | |
279 | @retval EFI_SUCCESS ProcessorNumber is found and returned.\r | |
280 | @retval EFI_NOT_FOUND ProcessorNumber is not found.\r | |
281 | **/\r | |
282 | EFI_STATUS\r | |
283 | GetProcessorNumber (\r | |
284 | IN PEI_CPU_MP_DATA *PeiCpuMpData,\r | |
285 | OUT UINTN *ProcessorNumber\r | |
286 | );\r | |
287 | \r | |
288 | /**\r | |
289 | Collects BIST data from PPI.\r | |
290 | \r | |
291 | This function collects BIST data from Sec Platform Information2 PPI\r | |
292 | or SEC Platform Information PPI.\r | |
293 | \r | |
294 | @param PeiServices Pointer to PEI Services Table\r | |
295 | @param PeiCpuMpData Pointer to PEI CPU MP Data\r | |
296 | \r | |
297 | **/\r | |
298 | VOID\r | |
299 | CollectBistDataFromPpi (\r | |
300 | IN CONST EFI_PEI_SERVICES **PeiServices,\r | |
301 | IN PEI_CPU_MP_DATA *PeiCpuMpData\r | |
302 | );\r | |
303 | \r | |
304 | /**\r | |
305 | Implementation of the PlatformInformation2 service in EFI_SEC_PLATFORM_INFORMATION2_PPI.\r | |
306 | \r | |
307 | @param PeiServices The pointer to the PEI Services Table.\r | |
308 | @param StructureSize The pointer to the variable describing size of the input buffer.\r | |
309 | @param PlatformInformationRecord2 The pointer to the EFI_SEC_PLATFORM_INFORMATION_RECORD2.\r | |
310 | \r | |
311 | @retval EFI_SUCCESS The data was successfully returned.\r | |
312 | @retval EFI_BUFFER_TOO_SMALL The buffer was too small. The current buffer size needed to\r | |
313 | hold the record is returned in StructureSize.\r | |
314 | \r | |
315 | **/\r | |
316 | EFI_STATUS\r | |
317 | EFIAPI\r | |
318 | SecPlatformInformation2 (\r | |
319 | IN CONST EFI_PEI_SERVICES **PeiServices,\r | |
320 | IN OUT UINT64 *StructureSize,\r | |
321 | OUT EFI_SEC_PLATFORM_INFORMATION_RECORD2 *PlatformInformationRecord2\r | |
322 | );\r | |
323 | \r | |
719ff8cf JF |
324 | /**\r |
325 | Detect whether specified processor can find matching microcode patch and load it.\r | |
326 | \r | |
327 | @param PeiCpuMpData Pointer to PEI CPU MP Data\r | |
328 | **/\r | |
329 | VOID\r | |
330 | MicrocodeDetect (\r | |
331 | IN PEI_CPU_MP_DATA *PeiCpuMpData\r | |
332 | );\r | |
333 | \r | |
ea0f431c | 334 | #endif\r |