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ea0f431c JF |
1 | /** @file\r |
2 | Definitions to install Multiple Processor PPI.\r | |
3 | \r | |
9bedfb2f | 4 | Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>\r |
ea0f431c JF |
5 | This program and the accompanying materials\r |
6 | are licensed and made available under the terms and conditions of the BSD License\r | |
7 | which accompanies this distribution. The full text of the license may be found at\r | |
8 | http://opensource.org/licenses/bsd-license.php\r | |
9 | \r | |
10 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
11 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
12 | \r | |
13 | **/\r | |
14 | \r | |
15 | #ifndef _CPU_MP_PEI_H_\r | |
16 | #define _CPU_MP_PEI_H_\r | |
17 | \r | |
18 | #include <PiPei.h>\r | |
19 | \r | |
20 | #include <Ppi/MpServices.h>\r | |
21 | #include <Ppi/SecPlatformInformation.h>\r | |
22 | #include <Ppi/SecPlatformInformation2.h>\r | |
23 | #include <Ppi/EndOfPeiPhase.h>\r | |
9bedfb2f | 24 | #include <Ppi/VectorHandoffInfo.h>\r |
ea0f431c | 25 | \r |
28a7ddf0 | 26 | #include <Register/Cpuid.h>\r |
ea0f431c JF |
27 | #include <Register/LocalApic.h>\r |
28 | \r | |
29 | #include <Library/BaseLib.h>\r | |
30 | #include <Library/BaseMemoryLib.h>\r | |
31 | #include <Library/DebugLib.h>\r | |
32 | #include <Library/HobLib.h>\r | |
33 | #include <Library/LocalApicLib.h>\r | |
34 | #include <Library/MtrrLib.h>\r | |
35 | #include <Library/PcdLib.h>\r | |
36 | #include <Library/PeimEntryPoint.h>\r | |
37 | #include <Library/PeiServicesLib.h>\r | |
38 | #include <Library/ReportStatusCodeLib.h>\r | |
39 | #include <Library/SynchronizationLib.h>\r | |
40 | #include <Library/TimerLib.h>\r | |
41 | #include <Library/UefiCpuLib.h>\r | |
c87e41b4 | 42 | #include <Library/CpuLib.h>\r |
9bedfb2f | 43 | #include <Library/CpuExceptionHandlerLib.h>\r |
ea0f431c JF |
44 | \r |
45 | #include "Microcode.h"\r | |
46 | \r | |
47 | //\r | |
48 | // AP state\r | |
49 | //\r | |
50 | typedef enum {\r | |
51 | CpuStateIdle,\r | |
52 | CpuStateBusy,\r | |
53 | CpuStateDisabled\r | |
54 | } CPU_STATE;\r | |
55 | \r | |
c87e41b4 JF |
56 | #define WAKEUP_AP_SIGNAL SIGNATURE_32 ('S', 'T', 'A', 'P')\r |
57 | \r | |
4de216c0 JF |
58 | typedef enum {\r |
59 | ApInHltLoop = 1,\r | |
60 | ApInMwaitLoop = 2,\r | |
61 | ApInRunLoop = 3\r | |
62 | } AP_LOOP_MODE;\r | |
63 | \r | |
ea0f431c JF |
64 | //\r |
65 | // AP reset code information\r | |
66 | //\r | |
67 | typedef struct {\r | |
68 | UINT8 *RendezvousFunnelAddress;\r | |
01beffa7 | 69 | UINTN ModeEntryOffset;\r |
ea0f431c JF |
70 | UINTN RendezvousFunnelSize;\r |
71 | } MP_ASSEMBLY_ADDRESS_MAP;\r | |
72 | \r | |
73 | //\r | |
74 | // CPU exchange information for switch BSP\r | |
75 | //\r | |
76 | typedef struct {\r | |
77 | UINT8 State; // offset 0\r | |
78 | UINTN StackPointer; // offset 4 / 8\r | |
79 | IA32_DESCRIPTOR Gdtr; // offset 8 / 16\r | |
80 | IA32_DESCRIPTOR Idtr; // offset 14 / 26\r | |
81 | } CPU_EXCHANGE_ROLE_INFO;\r | |
82 | \r | |
83 | typedef struct _PEI_CPU_MP_DATA PEI_CPU_MP_DATA;\r | |
84 | \r | |
d603b115 | 85 | #pragma pack(1)\r |
ea0f431c | 86 | \r |
ea0f431c JF |
87 | //\r |
88 | // MP CPU exchange information for AP reset code\r | |
d603b115 JF |
89 | // This structure is required to be packed because fixed field offsets\r |
90 | // into this structure are used in assembly code in this module\r | |
ea0f431c JF |
91 | //\r |
92 | typedef struct {\r | |
93 | UINTN Lock;\r | |
94 | UINTN StackStart;\r | |
95 | UINTN StackSize;\r | |
96 | UINTN CFunction;\r | |
97 | IA32_DESCRIPTOR GdtrProfile;\r | |
98 | IA32_DESCRIPTOR IdtrProfile;\r | |
99 | UINTN BufferStart;\r | |
01beffa7 | 100 | UINTN ModeOffset;\r |
ea0f431c | 101 | UINTN NumApsExecuting;\r |
ed04bffe JF |
102 | UINTN CodeSegment;\r |
103 | UINTN DataSegment;\r | |
ea0f431c JF |
104 | UINTN Cr3;\r |
105 | PEI_CPU_MP_DATA *PeiCpuMpData;\r | |
106 | } MP_CPU_EXCHANGE_INFO;\r | |
107 | \r | |
108 | #pragma pack()\r | |
109 | \r | |
ef1fdb80 JF |
110 | typedef struct {\r |
111 | UINTN Cr0;\r | |
112 | UINTN Cr3;\r | |
113 | UINTN Cr4;\r | |
114 | UINTN Dr0;\r | |
115 | UINTN Dr1;\r | |
116 | UINTN Dr2;\r | |
117 | UINTN Dr3;\r | |
118 | UINTN Dr6;\r | |
119 | UINTN Dr7;\r | |
120 | } CPU_VOLATILE_REGISTERS;\r | |
121 | \r | |
ea0f431c | 122 | typedef struct {\r |
e001e11f | 123 | volatile UINT32 *StartupApSignal;\r |
ea0f431c JF |
124 | UINT32 ApicId;\r |
125 | EFI_HEALTH_FLAGS Health;\r | |
126 | CPU_STATE State;\r | |
127 | BOOLEAN CpuHealthy;\r | |
ef1fdb80 | 128 | CPU_VOLATILE_REGISTERS VolatileRegisters;\r |
ea0f431c JF |
129 | } PEI_CPU_DATA;\r |
130 | \r | |
131 | //\r | |
132 | // PEI CPU MP Data save in memory\r | |
133 | //\r | |
134 | struct _PEI_CPU_MP_DATA {\r | |
2f0261b7 | 135 | SPIN_LOCK MpLock;\r |
ea0f431c JF |
136 | UINT32 CpuCount;\r |
137 | UINT32 BspNumber;\r | |
138 | UINTN Buffer;\r | |
139 | UINTN CpuApStackSize;\r | |
140 | MP_ASSEMBLY_ADDRESS_MAP AddressMap;\r | |
141 | UINTN WakeupBuffer;\r | |
142 | UINTN BackupBuffer;\r | |
143 | UINTN BackupBufferSize;\r | |
144 | UINTN ApFunction;\r | |
145 | UINTN ApFunctionArgument;\r | |
146 | volatile UINT32 FinishedCount;\r | |
147 | BOOLEAN EndOfPeiFlag;\r | |
148 | BOOLEAN InitFlag;\r | |
2f0261b7 | 149 | BOOLEAN X2ApicEnable;\r |
ea0f431c JF |
150 | CPU_EXCHANGE_ROLE_INFO BSPInfo;\r |
151 | CPU_EXCHANGE_ROLE_INFO APInfo;\r | |
152 | MTRR_SETTINGS MtrrTable;\r | |
e001e11f JF |
153 | UINT8 ApLoopMode;\r |
154 | UINT8 ApTargetCState;\r | |
ea0f431c JF |
155 | PEI_CPU_DATA *CpuData;\r |
156 | volatile MP_CPU_EXCHANGE_INFO *MpCpuExchangeInfo;\r | |
157 | };\r | |
158 | extern EFI_PEI_PPI_DESCRIPTOR mPeiCpuMpPpiDesc;\r | |
159 | \r | |
160 | \r | |
161 | /**\r | |
162 | Assembly code to get starting address and size of the rendezvous entry for APs.\r | |
163 | Information for fixing a jump instruction in the code is also returned.\r | |
164 | \r | |
165 | @param AddressMap Output buffer for address map information.\r | |
166 | **/\r | |
167 | VOID\r | |
168 | EFIAPI\r | |
169 | AsmGetAddressMap (\r | |
170 | OUT MP_ASSEMBLY_ADDRESS_MAP *AddressMap\r | |
171 | );\r | |
172 | \r | |
173 | /**\r | |
174 | Assembly code to load GDT table and update segment accordingly.\r | |
175 | \r | |
176 | @param Gdtr Pointer to GDT descriptor\r | |
177 | **/\r | |
178 | VOID\r | |
179 | EFIAPI\r | |
180 | AsmInitializeGdt (\r | |
181 | IN IA32_DESCRIPTOR *Gdtr\r | |
182 | );\r | |
183 | \r | |
ea0f431c JF |
184 | /**\r |
185 | Get available system memory below 1MB by specified size.\r | |
186 | \r | |
187 | @param PeiCpuMpData Pointer to PEI CPU MP Data\r | |
188 | **/\r | |
189 | VOID\r | |
190 | BackupAndPrepareWakeupBuffer(\r | |
191 | IN PEI_CPU_MP_DATA *PeiCpuMpData\r | |
192 | );\r | |
193 | \r | |
194 | /**\r | |
195 | Restore wakeup buffer data.\r | |
196 | \r | |
197 | @param PeiCpuMpData Pointer to PEI CPU MP Data\r | |
198 | **/\r | |
199 | VOID\r | |
200 | RestoreWakeupBuffer(\r | |
201 | IN PEI_CPU_MP_DATA *PeiCpuMpData\r | |
202 | );\r | |
203 | \r | |
204 | /**\r | |
205 | Notify function on End Of Pei PPI.\r | |
206 | \r | |
207 | On S3 boot, this function will restore wakeup buffer data.\r | |
208 | On normal boot, this function will flag wakeup buffer to be un-used type.\r | |
209 | \r | |
210 | @param PeiServices The pointer to the PEI Services Table.\r | |
211 | @param NotifyDescriptor Address of the notification descriptor data structure.\r | |
212 | @param Ppi Address of the PPI that was installed.\r | |
213 | \r | |
214 | @retval EFI_SUCCESS When everything is OK.\r | |
215 | \r | |
216 | **/\r | |
217 | EFI_STATUS\r | |
218 | EFIAPI\r | |
219 | CpuMpEndOfPeiCallback (\r | |
220 | IN EFI_PEI_SERVICES **PeiServices,\r | |
221 | IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDescriptor,\r | |
222 | IN VOID *Ppi\r | |
223 | );\r | |
224 | \r | |
225 | /**\r | |
226 | This function will be called by BSP to wakeup AP.\r | |
227 | \r | |
228 | @param PeiCpuMpData Pointer to PEI CPU MP Data\r | |
229 | @param Broadcast TRUE: Send broadcast IPI to all APs\r | |
230 | FALSE: Send IPI to AP by ApicId\r | |
a09647f3 | 231 | @param ProcessorNumber The handle number of specified processor\r |
ea0f431c JF |
232 | @param Procedure The function to be invoked by AP\r |
233 | @param ProcedureArgument The argument to be passed into AP function\r | |
234 | **/\r | |
235 | VOID\r | |
236 | WakeUpAP (\r | |
237 | IN PEI_CPU_MP_DATA *PeiCpuMpData,\r | |
238 | IN BOOLEAN Broadcast,\r | |
a09647f3 | 239 | IN UINTN ProcessorNumber,\r |
ea0f431c JF |
240 | IN EFI_AP_PROCEDURE Procedure, OPTIONAL\r |
241 | IN VOID *ProcedureArgument OPTIONAL\r | |
242 | );\r | |
243 | \r | |
244 | /**\r | |
245 | Get CPU MP Data pointer from the Guided HOB.\r | |
246 | \r | |
247 | @return Pointer to Pointer to PEI CPU MP Data\r | |
248 | **/\r | |
249 | PEI_CPU_MP_DATA *\r | |
250 | GetMpHobData (\r | |
251 | VOID\r | |
252 | );\r | |
253 | \r | |
254 | /**\r | |
255 | Find the current Processor number by APIC ID.\r | |
256 | \r | |
257 | @param PeiCpuMpData Pointer to PEI CPU MP Data\r | |
258 | @param ProcessorNumber Return the pocessor number found\r | |
259 | \r | |
260 | @retval EFI_SUCCESS ProcessorNumber is found and returned.\r | |
261 | @retval EFI_NOT_FOUND ProcessorNumber is not found.\r | |
262 | **/\r | |
263 | EFI_STATUS\r | |
264 | GetProcessorNumber (\r | |
265 | IN PEI_CPU_MP_DATA *PeiCpuMpData,\r | |
266 | OUT UINTN *ProcessorNumber\r | |
267 | );\r | |
268 | \r | |
269 | /**\r | |
270 | Collects BIST data from PPI.\r | |
271 | \r | |
272 | This function collects BIST data from Sec Platform Information2 PPI\r | |
273 | or SEC Platform Information PPI.\r | |
274 | \r | |
275 | @param PeiServices Pointer to PEI Services Table\r | |
276 | @param PeiCpuMpData Pointer to PEI CPU MP Data\r | |
277 | \r | |
278 | **/\r | |
279 | VOID\r | |
280 | CollectBistDataFromPpi (\r | |
281 | IN CONST EFI_PEI_SERVICES **PeiServices,\r | |
282 | IN PEI_CPU_MP_DATA *PeiCpuMpData\r | |
283 | );\r | |
284 | \r | |
285 | /**\r | |
286 | Implementation of the PlatformInformation2 service in EFI_SEC_PLATFORM_INFORMATION2_PPI.\r | |
287 | \r | |
288 | @param PeiServices The pointer to the PEI Services Table.\r | |
289 | @param StructureSize The pointer to the variable describing size of the input buffer.\r | |
290 | @param PlatformInformationRecord2 The pointer to the EFI_SEC_PLATFORM_INFORMATION_RECORD2.\r | |
291 | \r | |
292 | @retval EFI_SUCCESS The data was successfully returned.\r | |
293 | @retval EFI_BUFFER_TOO_SMALL The buffer was too small. The current buffer size needed to\r | |
294 | hold the record is returned in StructureSize.\r | |
295 | \r | |
296 | **/\r | |
297 | EFI_STATUS\r | |
298 | EFIAPI\r | |
299 | SecPlatformInformation2 (\r | |
300 | IN CONST EFI_PEI_SERVICES **PeiServices,\r | |
301 | IN OUT UINT64 *StructureSize,\r | |
302 | OUT EFI_SEC_PLATFORM_INFORMATION_RECORD2 *PlatformInformationRecord2\r | |
303 | );\r | |
304 | \r | |
719ff8cf JF |
305 | /**\r |
306 | Detect whether specified processor can find matching microcode patch and load it.\r | |
307 | \r | |
308 | @param PeiCpuMpData Pointer to PEI CPU MP Data\r | |
309 | **/\r | |
310 | VOID\r | |
311 | MicrocodeDetect (\r | |
312 | IN PEI_CPU_MP_DATA *PeiCpuMpData\r | |
313 | );\r | |
314 | \r | |
ea0f431c | 315 | #endif\r |