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e50466da | 1 | /** @file\r |
2 | MTRR setting library\r | |
3 | \r | |
46309b11 | 4 | Copyright (c) 2008 - 2015, Intel Corporation. All rights reserved.<BR>\r |
01a1c0fc | 5 | This program and the accompanying materials\r |
e50466da | 6 | are licensed and made available under the terms and conditions of the BSD License\r |
7 | which accompanies this distribution. The full text of the license may be found at\r | |
8 | http://opensource.org/licenses/bsd-license.php\r | |
9 | \r | |
10 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
11 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
12 | \r | |
13 | **/\r | |
14 | \r | |
15 | #ifndef _MTRR_LIB_H_\r | |
16 | #define _MTRR_LIB_H_\r | |
17 | \r | |
18 | //\r | |
19 | // According to IA32 SDM, MTRRs number and msr offset are always consistent\r | |
20 | // for IA32 processor family\r | |
21 | //\r | |
3b9be416 JY |
22 | \r |
23 | //\r | |
3ba736f3 | 24 | // The semantics of below macro is MAX_MTRR_NUMBER_OF_VARIABLE_MTRR, the real number can be read out from MTRR_CAP register.\r |
3b9be416 | 25 | //\r |
3ba736f3 | 26 | #define MTRR_NUMBER_OF_VARIABLE_MTRR 32\r |
3b9be416 JY |
27 | //\r |
28 | // Firmware need reserve 2 MTRR for OS\r | |
46309b11 | 29 | // Note: It is replaced by PCD PcdCpuNumberOfReservedVariableMtrrs\r |
3b9be416 JY |
30 | //\r |
31 | #define RESERVED_FIRMWARE_VARIABLE_MTRR_NUMBER 2\r | |
32 | \r | |
e50466da | 33 | #define MTRR_NUMBER_OF_FIXED_MTRR 11\r |
3ba736f3 JY |
34 | //\r |
35 | // Below macro is deprecated, and should not be used.\r | |
36 | //\r | |
37 | #define FIRMWARE_VARIABLE_MTRR_NUMBER 6\r | |
3b9be416 JY |
38 | #define MTRR_LIB_IA32_MTRR_CAP 0x0FE\r |
39 | #define MTRR_LIB_IA32_MTRR_CAP_VCNT_MASK 0x0FF\r | |
e50466da | 40 | #define MTRR_LIB_IA32_MTRR_FIX64K_00000 0x250\r |
41 | #define MTRR_LIB_IA32_MTRR_FIX16K_80000 0x258\r | |
42 | #define MTRR_LIB_IA32_MTRR_FIX16K_A0000 0x259\r | |
43 | #define MTRR_LIB_IA32_MTRR_FIX4K_C0000 0x268\r | |
44 | #define MTRR_LIB_IA32_MTRR_FIX4K_C8000 0x269\r | |
45 | #define MTRR_LIB_IA32_MTRR_FIX4K_D0000 0x26A\r | |
46 | #define MTRR_LIB_IA32_MTRR_FIX4K_D8000 0x26B\r | |
47 | #define MTRR_LIB_IA32_MTRR_FIX4K_E0000 0x26C\r | |
48 | #define MTRR_LIB_IA32_MTRR_FIX4K_E8000 0x26D\r | |
49 | #define MTRR_LIB_IA32_MTRR_FIX4K_F0000 0x26E\r | |
50 | #define MTRR_LIB_IA32_MTRR_FIX4K_F8000 0x26F\r | |
51 | #define MTRR_LIB_IA32_VARIABLE_MTRR_BASE 0x200\r | |
3ba736f3 JY |
52 | //\r |
53 | // Below macro is deprecated, and should not be used.\r | |
54 | //\r | |
55 | #define MTRR_LIB_IA32_VARIABLE_MTRR_END 0x20F\r | |
e50466da | 56 | #define MTRR_LIB_IA32_MTRR_DEF_TYPE 0x2FF\r |
57 | #define MTRR_LIB_MSR_VALID_MASK 0xFFFFFFFFFULL\r | |
58 | #define MTRR_LIB_CACHE_VALID_ADDRESS 0xFFFFFF000ULL\r | |
59 | #define MTRR_LIB_CACHE_MTRR_ENABLED 0x800\r | |
60 | #define MTRR_LIB_CACHE_FIXED_MTRR_ENABLED 0x400\r | |
61 | \r | |
62 | //\r | |
63 | // Structure to describe a fixed MTRR\r | |
64 | //\r | |
65 | typedef struct {\r | |
66 | UINT32 Msr;\r | |
67 | UINT32 BaseAddress;\r | |
68 | UINT32 Length;\r | |
69 | } FIXED_MTRR;\r | |
70 | \r | |
71 | //\r | |
72 | // Structure to describe a variable MTRR\r | |
73 | //\r | |
74 | typedef struct {\r | |
75 | UINT64 BaseAddress;\r | |
76 | UINT64 Length;\r | |
77 | UINT64 Type;\r | |
78 | UINT32 Msr;\r | |
79 | BOOLEAN Valid;\r | |
80 | BOOLEAN Used;\r | |
81 | } VARIABLE_MTRR;\r | |
82 | \r | |
83 | //\r | |
84 | // Structure to hold base and mask pair for variable MTRR register\r | |
85 | //\r | |
86 | typedef struct _MTRR_VARIABLE_SETTING_ {\r | |
76b4cae3 MK |
87 | UINT64 Base;\r |
88 | UINT64 Mask;\r | |
e50466da | 89 | } MTRR_VARIABLE_SETTING;\r |
90 | \r | |
91 | //\r | |
92 | // Array for variable MTRRs\r | |
93 | //\r | |
94 | typedef struct _MTRR_VARIABLE_SETTINGS_ {\r | |
3ba736f3 | 95 | MTRR_VARIABLE_SETTING Mtrr[MTRR_NUMBER_OF_VARIABLE_MTRR];\r |
e50466da | 96 | } MTRR_VARIABLE_SETTINGS;\r |
97 | \r | |
98 | //\r | |
99 | // Array for fixed mtrrs\r | |
100 | //\r | |
101 | typedef struct _MTRR_FIXED_SETTINGS_ {\r | |
102 | UINT64 Mtrr[MTRR_NUMBER_OF_FIXED_MTRR];\r | |
103 | } MTRR_FIXED_SETTINGS;\r | |
104 | \r | |
105 | //\r | |
106 | // Structure to hold all MTRRs\r | |
107 | //\r | |
108 | typedef struct _MTRR_SETTINGS_ {\r | |
109 | MTRR_FIXED_SETTINGS Fixed;\r | |
110 | MTRR_VARIABLE_SETTINGS Variables;\r | |
111 | UINT64 MtrrDefType;\r | |
112 | } MTRR_SETTINGS;\r | |
113 | \r | |
114 | //\r | |
115 | // Memory cache types\r | |
116 | //\r | |
117 | typedef enum {\r | |
76b4cae3 MK |
118 | CacheUncacheable = 0,\r |
119 | CacheWriteCombining = 1,\r | |
120 | CacheWriteThrough = 4,\r | |
121 | CacheWriteProtected = 5,\r | |
122 | CacheWriteBack = 6\r | |
e50466da | 123 | } MTRR_MEMORY_CACHE_TYPE;\r |
124 | \r | |
125 | #define MTRR_CACHE_UNCACHEABLE 0\r | |
126 | #define MTRR_CACHE_WRITE_COMBINING 1\r | |
127 | #define MTRR_CACHE_WRITE_THROUGH 4\r | |
128 | #define MTRR_CACHE_WRITE_PROTECTED 5\r | |
129 | #define MTRR_CACHE_WRITE_BACK 6\r | |
130 | #define MTRR_CACHE_INVALID_TYPE 7\r | |
131 | \r | |
3b9be416 JY |
132 | /**\r |
133 | Returns the variable MTRR count for the CPU.\r | |
134 | \r | |
135 | @return Variable MTRR count\r | |
136 | \r | |
137 | **/\r | |
138 | UINT32\r | |
ed8dfd7b | 139 | EFIAPI\r |
3b9be416 JY |
140 | GetVariableMtrrCount (\r |
141 | VOID\r | |
142 | );\r | |
143 | \r | |
144 | /**\r | |
145 | Returns the firmware usable variable MTRR count for the CPU.\r | |
146 | \r | |
147 | @return Firmware usable variable MTRR count\r | |
148 | \r | |
149 | **/\r | |
150 | UINT32\r | |
ed8dfd7b | 151 | EFIAPI\r |
3b9be416 JY |
152 | GetFirmwareVariableMtrrCount (\r |
153 | VOID\r | |
154 | );\r | |
155 | \r | |
e50466da | 156 | /**\r |
157 | This function attempts to set the attributes for a memory range.\r | |
158 | \r | |
76b4cae3 MK |
159 | @param[in] BaseAddress The physical address that is the start\r |
160 | address of a memory region.\r | |
161 | @param[in] Length The size in bytes of the memory region.\r | |
162 | @param[in] Attribute The bit mask of attributes to set for the\r | |
163 | memory region.\r | |
e50466da | 164 | \r |
76b4cae3 MK |
165 | @retval RETURN_SUCCESS The attributes were set for the memory\r |
166 | region.\r | |
e50466da | 167 | @retval RETURN_INVALID_PARAMETER Length is zero.\r |
76b4cae3 MK |
168 | @retval RETURN_UNSUPPORTED The processor does not support one or\r |
169 | more bytes of the memory resource range\r | |
170 | specified by BaseAddress and Length.\r | |
171 | @retval RETURN_UNSUPPORTED The bit mask of attributes is not support\r | |
172 | for the memory resource range specified\r | |
173 | by BaseAddress and Length.\r | |
174 | @retval RETURN_ACCESS_DENIED The attributes for the memory resource\r | |
175 | range specified by BaseAddress and Length\r | |
176 | cannot be modified.\r | |
177 | @retval RETURN_OUT_OF_RESOURCES There are not enough system resources to\r | |
178 | modify the attributes of the memory\r | |
179 | resource range.\r | |
e50466da | 180 | \r |
181 | **/\r | |
182 | RETURN_STATUS\r | |
183 | EFIAPI\r | |
184 | MtrrSetMemoryAttribute (\r | |
185 | IN PHYSICAL_ADDRESS BaseAddress,\r | |
186 | IN UINT64 Length,\r | |
187 | IN MTRR_MEMORY_CACHE_TYPE Attribute\r | |
188 | );\r | |
189 | \r | |
190 | \r | |
191 | /**\r | |
192 | This function will get the memory cache type of the specific address.\r | |
193 | This function is mainly for debugging purposes.\r | |
194 | \r | |
76b4cae3 | 195 | @param[in] Address The specific address\r |
e50466da | 196 | \r |
197 | @return The memory cache type of the specific address\r | |
198 | \r | |
199 | **/\r | |
200 | MTRR_MEMORY_CACHE_TYPE\r | |
201 | EFIAPI\r | |
202 | MtrrGetMemoryAttribute (\r | |
203 | IN PHYSICAL_ADDRESS Address\r | |
204 | );\r | |
205 | \r | |
206 | \r | |
207 | /**\r | |
208 | This function will get the raw value in variable MTRRs\r | |
209 | \r | |
76b4cae3 | 210 | @param[out] VariableSettings A buffer to hold variable MTRRs content.\r |
e50466da | 211 | \r |
212 | @return The buffer point to MTRR_VARIABLE_SETTINGS in which holds the content of the variable mtrr\r | |
213 | \r | |
214 | **/\r | |
215 | MTRR_VARIABLE_SETTINGS*\r | |
216 | EFIAPI\r | |
217 | MtrrGetVariableMtrr (\r | |
218 | OUT MTRR_VARIABLE_SETTINGS *VariableSettings\r | |
219 | );\r | |
220 | \r | |
221 | \r | |
222 | /**\r | |
223 | This function sets fixed MTRRs\r | |
224 | \r | |
76b4cae3 | 225 | @param[in] VariableSettings A buffer to hold variable MTRRs content.\r |
e50466da | 226 | \r |
227 | @return The pointer of VariableSettings\r | |
228 | \r | |
229 | **/\r | |
230 | MTRR_VARIABLE_SETTINGS*\r | |
231 | EFIAPI\r | |
232 | MtrrSetVariableMtrr (\r | |
233 | IN MTRR_VARIABLE_SETTINGS *VariableSettings\r | |
234 | );\r | |
235 | \r | |
236 | \r | |
237 | /**\r | |
238 | This function gets the content in fixed MTRRs\r | |
239 | \r | |
76b4cae3 | 240 | @param[out] FixedSettings A buffer to hold fixed MTRRs content.\r |
e50466da | 241 | \r |
242 | @return The pointer of FixedSettings\r | |
243 | \r | |
244 | **/\r | |
245 | MTRR_FIXED_SETTINGS*\r | |
246 | EFIAPI\r | |
247 | MtrrGetFixedMtrr (\r | |
248 | OUT MTRR_FIXED_SETTINGS *FixedSettings\r | |
249 | );\r | |
250 | \r | |
251 | \r | |
252 | /**\r | |
253 | This function sets fixed MTRRs\r | |
254 | \r | |
76b4cae3 | 255 | @param[in] FixedSettings A buffer holding fixed MTRRs content.\r |
e50466da | 256 | \r |
257 | @return The pointer of FixedSettings\r | |
258 | \r | |
259 | **/\r | |
260 | MTRR_FIXED_SETTINGS*\r | |
261 | EFIAPI\r | |
262 | MtrrSetFixedMtrr (\r | |
263 | IN MTRR_FIXED_SETTINGS *FixedSettings\r | |
264 | );\r | |
265 | \r | |
266 | \r | |
267 | /**\r | |
268 | This function gets the content in all MTRRs (variable and fixed)\r | |
269 | \r | |
76b4cae3 | 270 | @param[out] MtrrSetting A buffer to hold all MTRRs content.\r |
e50466da | 271 | \r |
272 | @return The pointer of MtrrSetting\r | |
273 | \r | |
274 | **/\r | |
275 | MTRR_SETTINGS *\r | |
276 | EFIAPI\r | |
277 | MtrrGetAllMtrrs (\r | |
278 | OUT MTRR_SETTINGS *MtrrSetting\r | |
279 | );\r | |
280 | \r | |
281 | \r | |
282 | /**\r | |
283 | This function sets all MTRRs (variable and fixed)\r | |
284 | \r | |
76b4cae3 | 285 | @param[in] MtrrSetting A buffer to hold all MTRRs content.\r |
e50466da | 286 | \r |
287 | @return The pointer of MtrrSetting\r | |
288 | \r | |
289 | **/\r | |
290 | MTRR_SETTINGS *\r | |
291 | EFIAPI\r | |
292 | MtrrSetAllMtrrs (\r | |
293 | IN MTRR_SETTINGS *MtrrSetting\r | |
294 | );\r | |
295 | \r | |
296 | \r | |
297 | /**\r | |
298 | Get the attribute of variable MTRRs.\r | |
299 | \r | |
300 | This function shadows the content of variable MTRRs into\r | |
301 | an internal array: VariableMtrr\r | |
302 | \r | |
76b4cae3 MK |
303 | @param[in] MtrrValidBitsMask The mask for the valid bit of the MTRR\r |
304 | @param[in] MtrrValidAddressMask The valid address mask for MTRR since the base address in\r | |
305 | MTRR must align to 4K, so valid address mask equal to\r | |
306 | MtrrValidBitsMask & 0xfffffffffffff000ULL\r | |
307 | @param[out] VariableMtrr The array to shadow variable MTRRs content\r | |
308 | \r | |
438f1766 | 309 | @return The return value of this parameter indicates the number of\r |
3ba736f3 | 310 | MTRRs which has been used.\r |
e50466da | 311 | **/\r |
3ba736f3 | 312 | UINT32\r |
e50466da | 313 | EFIAPI\r |
314 | MtrrGetMemoryAttributeInVariableMtrr (\r | |
315 | IN UINT64 MtrrValidBitsMask,\r | |
316 | IN UINT64 MtrrValidAddressMask,\r | |
317 | OUT VARIABLE_MTRR *VariableMtrr\r | |
318 | );\r | |
319 | \r | |
320 | \r | |
321 | /**\r | |
322 | This function prints all MTRRs for debugging.\r | |
323 | **/\r | |
324 | VOID\r | |
ed8dfd7b | 325 | EFIAPI\r |
e50466da | 326 | MtrrDebugPrintAllMtrrs (\r |
430fbbe0 | 327 | VOID\r |
e50466da | 328 | );\r |
329 | \r | |
947a573a | 330 | /**\r |
331 | Checks if MTRR is supported.\r | |
332 | \r | |
333 | @retval TRUE MTRR is supported.\r | |
334 | @retval FALSE MTRR is not supported.\r | |
335 | \r | |
336 | **/\r | |
337 | BOOLEAN\r | |
ed8dfd7b | 338 | EFIAPI\r |
947a573a | 339 | IsMtrrSupported (\r |
340 | VOID\r | |
341 | );\r | |
342 | \r | |
91ec7824 | 343 | /**\r |
344 | Returns the default MTRR cache type for the system.\r | |
345 | \r | |
346 | @return The default MTRR cache type.\r | |
347 | \r | |
348 | **/\r | |
349 | MTRR_MEMORY_CACHE_TYPE\r | |
350 | EFIAPI\r | |
351 | MtrrGetDefaultMemoryType (\r | |
352 | VOID\r | |
353 | );\r | |
354 | \r | |
b970ed68 MK |
355 | /**\r |
356 | This function attempts to set the attributes into MTRR setting buffer for a memory range.\r | |
357 | \r | |
358 | @param[in, out] MtrrSetting MTRR setting buffer to be set.\r | |
359 | @param[in] BaseAddress The physical address that is the start address\r | |
360 | of a memory region.\r | |
361 | @param[in] Length The size in bytes of the memory region.\r | |
362 | @param[in] Attribute The bit mask of attributes to set for the\r | |
363 | memory region.\r | |
364 | \r | |
365 | @retval RETURN_SUCCESS The attributes were set for the memory region.\r | |
366 | @retval RETURN_INVALID_PARAMETER Length is zero.\r | |
367 | @retval RETURN_UNSUPPORTED The processor does not support one or more bytes of the\r | |
368 | memory resource range specified by BaseAddress and Length.\r | |
369 | @retval RETURN_UNSUPPORTED The bit mask of attributes is not support for the memory resource\r | |
370 | range specified by BaseAddress and Length.\r | |
371 | @retval RETURN_ACCESS_DENIED The attributes for the memory resource range specified by\r | |
372 | BaseAddress and Length cannot be modified.\r | |
373 | @retval RETURN_OUT_OF_RESOURCES There are not enough system resources to modify the attributes of\r | |
374 | the memory resource range.\r | |
375 | \r | |
376 | **/\r | |
377 | RETURN_STATUS\r | |
378 | EFIAPI\r | |
379 | MtrrSetMemoryAttributeInMtrrSettings (\r | |
380 | IN OUT MTRR_SETTINGS *MtrrSetting,\r | |
381 | IN PHYSICAL_ADDRESS BaseAddress,\r | |
382 | IN UINT64 Length,\r | |
383 | IN MTRR_MEMORY_CACHE_TYPE Attribute\r | |
384 | );\r | |
385 | \r | |
e50466da | 386 | #endif // _MTRR_LIB_H_\r |