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1 | /** @file\r |
2 | SMRAM Save State Map Definitions.\r | |
3 | \r | |
4 | SMRAM Save State Map definitions based on contents of the\r | |
5 | Intel(R) 64 and IA-32 Architectures Software Developer's Manual\r | |
6 | Volume 3C, Section 34.4 SMRAM\r | |
7 | Volume 3C, Section 34.5 SMI Handler Execution Environment\r | |
8 | Volume 3C, Section 34.7 Managing Synchronous and Asynchronous SMIs\r | |
9 | \r | |
10 | Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>\r | |
11 | This program and the accompanying materials\r | |
12 | are licensed and made available under the terms and conditions of the BSD License\r | |
13 | which accompanies this distribution. The full text of the license may be found at\r | |
14 | http://opensource.org/licenses/bsd-license.php\r | |
15 | \r | |
16 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
17 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
18 | \r | |
19 | **/\r | |
20 | \r | |
21 | #ifndef __SMRAM_SAVE_STATE_MAP_H__\r | |
22 | #define __SMRAM_SAVE_STATE_MAP_H__\r | |
23 | \r | |
24 | ///\r | |
25 | /// Default SMBASE address\r | |
26 | ///\r | |
27 | #define SMM_DEFAULT_SMBASE 0x30000\r | |
28 | \r | |
29 | ///\r | |
30 | /// Offset of SMM handler from SMBASE\r | |
31 | ///\r | |
32 | #define SMM_HANDLER_OFFSET 0x8000\r | |
33 | \r | |
34 | ///\r | |
35 | /// Offset of SMRAM Save State Map from SMBASE\r | |
36 | ///\r | |
37 | #define SMRAM_SAVE_STATE_MAP_OFFSET 0xfc00\r | |
38 | \r | |
39 | #pragma pack (1)\r | |
40 | \r | |
41 | ///\r | |
42 | /// 32-bit SMRAM Save State Map\r | |
43 | ///\r | |
44 | typedef struct {\r | |
45 | UINT8 Reserved[0x200]; // 7c00h\r | |
46 | // Padded an extra 0x200 bytes so 32-bit and 64-bit\r | |
47 | // SMRAM Save State Maps are the same size\r | |
48 | UINT8 Reserved1[0xf8]; // 7e00h\r | |
49 | UINT32 SMBASE; // 7ef8h\r | |
50 | UINT32 SMMRevId; // 7efch\r | |
51 | UINT16 IORestart; // 7f00h\r | |
52 | UINT16 AutoHALTRestart; // 7f02h\r | |
53 | UINT8 Reserved2[0x9C]; // 7f08h\r | |
54 | UINT32 IOMemAddr; // 7fa0h\r | |
55 | UINT32 IOMisc; // 7fa4h\r | |
56 | UINT32 _ES; // 7fa8h\r | |
57 | UINT32 _CS; // 7fach\r | |
58 | UINT32 _SS; // 7fb0h\r | |
59 | UINT32 _DS; // 7fb4h\r | |
60 | UINT32 _FS; // 7fb8h\r | |
61 | UINT32 _GS; // 7fbch\r | |
62 | UINT32 Reserved3; // 7fc0h\r | |
63 | UINT32 _TR; // 7fc4h\r | |
64 | UINT32 _DR7; // 7fc8h\r | |
65 | UINT32 _DR6; // 7fcch\r | |
66 | UINT32 _EAX; // 7fd0h\r | |
67 | UINT32 _ECX; // 7fd4h\r | |
68 | UINT32 _EDX; // 7fd8h\r | |
69 | UINT32 _EBX; // 7fdch\r | |
70 | UINT32 _ESP; // 7fe0h\r | |
71 | UINT32 _EBP; // 7fe4h\r | |
72 | UINT32 _ESI; // 7fe8h\r | |
73 | UINT32 _EDI; // 7fech\r | |
74 | UINT32 _EIP; // 7ff0h\r | |
75 | UINT32 _EFLAGS; // 7ff4h\r | |
76 | UINT32 _CR3; // 7ff8h\r | |
77 | UINT32 _CR0; // 7ffch\r | |
78 | } SMRAM_SAVE_STATE_MAP32;\r | |
79 | \r | |
80 | ///\r | |
81 | /// 64-bit SMRAM Save State Map\r | |
82 | ///\r | |
83 | typedef struct {\r | |
84 | UINT8 Reserved1[0x1d0]; // 7c00h\r | |
85 | UINT32 GdtBaseHiDword; // 7dd0h\r | |
86 | UINT32 LdtBaseHiDword; // 7dd4h\r | |
87 | UINT32 IdtBaseHiDword; // 7dd8h\r | |
88 | UINT8 Reserved2[0xc]; // 7ddch\r | |
89 | UINT64 IO_EIP; // 7de8h\r | |
90 | UINT8 Reserved3[0x50]; // 7df0h\r | |
91 | UINT32 _CR4; // 7e40h\r | |
92 | UINT8 Reserved4[0x48]; // 7e44h\r | |
93 | UINT32 GdtBaseLoDword; // 7e8ch\r | |
94 | UINT32 Reserved5; // 7e90h\r | |
95 | UINT32 IdtBaseLoDword; // 7e94h\r | |
96 | UINT32 Reserved6; // 7e98h\r | |
97 | UINT32 LdtBaseLoDword; // 7e9ch\r | |
98 | UINT8 Reserved7[0x38]; // 7ea0h\r | |
99 | UINT64 EptVmxControl; // 7ed8h\r | |
100 | UINT32 EnEptVmxControl; // 7ee0h\r | |
101 | UINT8 Reserved8[0x14]; // 7ee4h\r | |
102 | UINT32 SMBASE; // 7ef8h\r | |
103 | UINT32 SMMRevId; // 7efch\r | |
104 | UINT16 IORestart; // 7f00h\r | |
105 | UINT16 AutoHALTRestart; // 7f02h\r | |
106 | UINT8 Reserved9[0x18]; // 7f04h\r | |
107 | UINT64 _R15; // 7f1ch\r | |
108 | UINT64 _R14;\r | |
109 | UINT64 _R13;\r | |
110 | UINT64 _R12;\r | |
111 | UINT64 _R11;\r | |
112 | UINT64 _R10;\r | |
113 | UINT64 _R9;\r | |
114 | UINT64 _R8;\r | |
115 | UINT64 _RAX; // 7f5ch\r | |
116 | UINT64 _RCX;\r | |
117 | UINT64 _RDX;\r | |
118 | UINT64 _RBX;\r | |
119 | UINT64 _RSP;\r | |
120 | UINT64 _RBP;\r | |
121 | UINT64 _RSI;\r | |
122 | UINT64 _RDI;\r | |
123 | UINT64 IOMemAddr; // 7f9ch\r | |
124 | UINT32 IOMisc; // 7fa4h\r | |
125 | UINT32 _ES; // 7fa8h\r | |
126 | UINT32 _CS;\r | |
127 | UINT32 _SS;\r | |
128 | UINT32 _DS;\r | |
129 | UINT32 _FS;\r | |
130 | UINT32 _GS;\r | |
131 | UINT32 _LDTR; // 7fc0h\r | |
132 | UINT32 _TR;\r | |
133 | UINT64 _DR7; // 7fc8h\r | |
134 | UINT64 _DR6;\r | |
135 | UINT64 _RIP; // 7fd8h\r | |
136 | UINT64 IA32_EFER; // 7fe0h\r | |
137 | UINT64 _RFLAGS; // 7fe8h\r | |
138 | UINT64 _CR3; // 7ff0h\r | |
139 | UINT64 _CR0; // 7ff8h\r | |
140 | } SMRAM_SAVE_STATE_MAP64;\r | |
141 | \r | |
142 | ///\r | |
143 | /// Union of 32-bit and 64-bit SMRAM Save State Maps\r | |
144 | ///\r | |
145 | typedef union {\r | |
146 | SMRAM_SAVE_STATE_MAP32 x86;\r | |
147 | SMRAM_SAVE_STATE_MAP64 x64;\r | |
148 | } SMRAM_SAVE_STATE_MAP;\r | |
149 | \r | |
150 | ///\r | |
151 | /// Minimum SMM Revision ID that supports IOMisc field in SMRAM Save State Map\r | |
152 | ///\r | |
153 | #define SMRAM_SAVE_STATE_MIN_REV_ID_IOMISC 0x30004\r | |
154 | \r | |
155 | ///\r | |
156 | /// SMRAM Save State Map IOMisc I/O Length Values\r | |
157 | ///\r | |
158 | #define SMM_IO_LENGTH_BYTE 0x01\r | |
159 | #define SMM_IO_LENGTH_WORD 0x02\r | |
160 | #define SMM_IO_LENGTH_DWORD 0x04\r | |
161 | \r | |
162 | ///\r | |
163 | /// SMRAM Save State Map IOMisc I/O Instruction Type Values\r | |
164 | ///\r | |
165 | #define SMM_IO_TYPE_IN_IMMEDIATE 0x9\r | |
166 | #define SMM_IO_TYPE_IN_DX 0x1\r | |
167 | #define SMM_IO_TYPE_OUT_IMMEDIATE 0x8\r | |
168 | #define SMM_IO_TYPE_OUT_DX 0x0\r | |
169 | #define SMM_IO_TYPE_INS 0x3\r | |
170 | #define SMM_IO_TYPE_OUTS 0x2\r | |
171 | #define SMM_IO_TYPE_REP_INS 0x7\r | |
172 | #define SMM_IO_TYPE_REP_OUTS 0x6\r | |
173 | \r | |
174 | ///\r | |
175 | /// SMRAM Save State Map IOMisc structure\r | |
176 | ///\r | |
177 | typedef union {\r | |
178 | struct {\r | |
179 | UINT32 SmiFlag:1;\r | |
180 | UINT32 Length:3;\r | |
181 | UINT32 Type:4;\r | |
182 | UINT32 Reserved1:8;\r | |
183 | UINT32 Port:16;\r | |
184 | } Bits;\r | |
185 | UINT32 Uint32;\r | |
186 | } SMRAM_SAVE_STATE_IOMISC;\r | |
187 | \r | |
188 | #pragma pack ()\r | |
189 | \r | |
190 | #endif\r |