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80c4b236 JF |
1 | /** @file\r |
2 | X2Apic feature.\r | |
3 | \r | |
4 | Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>\r | |
0acd8697 | 5 | SPDX-License-Identifier: BSD-2-Clause-Patent\r |
80c4b236 JF |
6 | \r |
7 | **/\r | |
8 | \r | |
9 | #include "CpuCommonFeatures.h"\r | |
10 | \r | |
6661abb6 JF |
11 | /**\r |
12 | Prepares for the data used by CPU feature detection and initialization.\r | |
13 | \r | |
14 | @param[in] NumberOfProcessors The number of CPUs in the platform.\r | |
15 | \r | |
16 | @return Pointer to a buffer of CPU related configuration data.\r | |
17 | \r | |
18 | @note This service could be called by BSP only.\r | |
19 | **/\r | |
20 | VOID *\r | |
21 | EFIAPI\r | |
22 | X2ApicGetConfigData (\r | |
23 | IN UINTN NumberOfProcessors\r | |
24 | )\r | |
25 | {\r | |
26 | BOOLEAN *ConfigData;\r | |
27 | \r | |
28 | ConfigData = AllocateZeroPool (sizeof (BOOLEAN) * NumberOfProcessors);\r | |
29 | ASSERT (ConfigData != NULL);\r | |
30 | return ConfigData;\r | |
31 | }\r | |
32 | \r | |
80c4b236 JF |
33 | /**\r |
34 | Detects if X2Apci feature supported on current processor.\r | |
35 | \r | |
36 | Detect if X2Apci has been already enabled.\r | |
37 | \r | |
38 | @param[in] ProcessorNumber The index of the CPU executing this function.\r | |
39 | @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFORMATION\r | |
40 | structure for the CPU executing this function.\r | |
41 | @param[in] ConfigData A pointer to the configuration buffer returned\r | |
42 | by CPU_FEATURE_GET_CONFIG_DATA. NULL if\r | |
43 | CPU_FEATURE_GET_CONFIG_DATA was not provided in\r | |
44 | RegisterCpuFeature().\r | |
45 | \r | |
46 | @retval TRUE X2Apci feature is supported.\r | |
47 | @retval FALSE X2Apci feature is not supported.\r | |
48 | \r | |
49 | @note This service could be called by BSP/APs.\r | |
50 | **/\r | |
51 | BOOLEAN\r | |
52 | EFIAPI\r | |
53 | X2ApicSupport (\r | |
54 | IN UINTN ProcessorNumber,\r | |
55 | IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo,\r | |
56 | IN VOID *ConfigData OPTIONAL\r | |
57 | )\r | |
58 | {\r | |
6661abb6 JF |
59 | BOOLEAN *X2ApicEnabled;\r |
60 | \r | |
61 | ASSERT (ConfigData != NULL);\r | |
62 | X2ApicEnabled = (BOOLEAN *) ConfigData;\r | |
63 | //\r | |
64 | // *ConfigData indicates if X2APIC enabled on current processor\r | |
65 | //\r | |
66 | X2ApicEnabled[ProcessorNumber] = (GetApicMode () == LOCAL_APIC_MODE_X2APIC) ? TRUE : FALSE;\r | |
67 | \r | |
68 | return (CpuInfo->CpuIdVersionInfoEcx.Bits.x2APIC == 1);\r | |
80c4b236 JF |
69 | }\r |
70 | \r | |
71 | /**\r | |
72 | Initializes X2Apci feature to specific state.\r | |
73 | \r | |
74 | @param[in] ProcessorNumber The index of the CPU executing this function.\r | |
75 | @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFORMATION\r | |
76 | structure for the CPU executing this function.\r | |
77 | @param[in] ConfigData A pointer to the configuration buffer returned\r | |
78 | by CPU_FEATURE_GET_CONFIG_DATA. NULL if\r | |
79 | CPU_FEATURE_GET_CONFIG_DATA was not provided in\r | |
80 | RegisterCpuFeature().\r | |
81 | @param[in] State If TRUE, then the X2Apci feature must be enabled.\r | |
82 | If FALSE, then the X2Apci feature must be disabled.\r | |
83 | \r | |
84 | @retval RETURN_SUCCESS X2Apci feature is initialized.\r | |
85 | \r | |
86 | @note This service could be called by BSP only.\r | |
87 | **/\r | |
88 | RETURN_STATUS\r | |
89 | EFIAPI\r | |
90 | X2ApicInitialize (\r | |
91 | IN UINTN ProcessorNumber,\r | |
92 | IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo,\r | |
93 | IN VOID *ConfigData, OPTIONAL\r | |
94 | IN BOOLEAN State\r | |
95 | )\r | |
96 | {\r | |
6661abb6 JF |
97 | BOOLEAN *X2ApicEnabled;\r |
98 | \r | |
d28daadd ED |
99 | //\r |
100 | // The scope of the MSR_IA32_APIC_BASE is core for below processor type, only program\r | |
101 | // MSR_IA32_APIC_BASE for thread 0 in each core.\r | |
102 | //\r | |
103 | if (IS_SILVERMONT_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel)) {\r | |
104 | if (CpuInfo->ProcessorInfo.Location.Thread != 0) {\r | |
105 | return RETURN_SUCCESS;\r | |
106 | }\r | |
107 | }\r | |
108 | \r | |
6661abb6 JF |
109 | ASSERT (ConfigData != NULL);\r |
110 | X2ApicEnabled = (BOOLEAN *) ConfigData;\r | |
111 | if (X2ApicEnabled[ProcessorNumber]) {\r | |
112 | PRE_SMM_CPU_REGISTER_TABLE_WRITE_FIELD (\r | |
113 | ProcessorNumber,\r | |
114 | Msr,\r | |
115 | MSR_IA32_APIC_BASE,\r | |
116 | MSR_IA32_APIC_BASE_REGISTER,\r | |
117 | Bits.EXTD,\r | |
118 | 1\r | |
119 | );\r | |
120 | } else {\r | |
121 | //\r | |
122 | // Enable X2APIC mode only if X2APIC is not enabled,\r | |
123 | // Needn't to disabe X2APIC mode again if X2APIC is not enabled\r | |
124 | //\r | |
125 | if (State) {\r | |
126 | CPU_REGISTER_TABLE_WRITE_FIELD (\r | |
127 | ProcessorNumber,\r | |
128 | Msr,\r | |
129 | MSR_IA32_APIC_BASE,\r | |
130 | MSR_IA32_APIC_BASE_REGISTER,\r | |
131 | Bits.EXTD,\r | |
132 | 1\r | |
133 | );\r | |
134 | }\r | |
135 | }\r | |
80c4b236 JF |
136 | return RETURN_SUCCESS;\r |
137 | }\r |