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1 | /** @file\r |
2 | Implementation shared across all library instances.\r | |
3 | \r | |
4 | Copyright (c) 2010 - 2019, Intel Corporation. All rights reserved.<BR>\r | |
5 | Copyright (c) Microsoft Corporation.<BR>\r | |
6 | SPDX-License-Identifier: BSD-2-Clause-Patent\r | |
7 | \r | |
8 | **/\r | |
9 | \r | |
10 | #include <PiMm.h>\r | |
11 | #include <Library/SmmCpuFeaturesLib.h>\r | |
12 | #include <Library/BaseLib.h>\r | |
13 | #include <Library/MtrrLib.h>\r | |
14 | #include <Library/PcdLib.h>\r | |
15 | #include <Library/MemoryAllocationLib.h>\r | |
16 | #include <Library/DebugLib.h>\r | |
17 | \r | |
18 | #include "CpuFeaturesLib.h"\r | |
19 | \r | |
20 | /**\r | |
21 | This function updates the SMRAM save state on the currently executing CPU\r | |
22 | to resume execution at a specific address after an RSM instruction. This\r | |
23 | function must evaluate the SMRAM save state to determine the execution mode\r | |
24 | the RSM instruction resumes and update the resume execution address with\r | |
25 | either NewInstructionPointer32 or NewInstructionPoint. The auto HALT restart\r | |
26 | flag in the SMRAM save state must always be cleared. This function returns\r | |
27 | the value of the instruction pointer from the SMRAM save state that was\r | |
28 | replaced. If this function returns 0, then the SMRAM save state was not\r | |
29 | modified.\r | |
30 | \r | |
31 | This function is called during the very first SMI on each CPU after\r | |
32 | SmmCpuFeaturesInitializeProcessor() to set a flag in normal execution mode\r | |
33 | to signal that the SMBASE of each CPU has been updated before the default\r | |
34 | SMBASE address is used for the first SMI to the next CPU.\r | |
35 | \r | |
36 | @param[in] CpuIndex The index of the CPU to hook. The value\r | |
37 | must be between 0 and the NumberOfCpus\r | |
38 | field in the System Management System Table\r | |
39 | (SMST).\r | |
40 | @param[in] CpuState Pointer to SMRAM Save State Map for the\r | |
41 | currently executing CPU.\r | |
42 | @param[in] NewInstructionPointer32 Instruction pointer to use if resuming to\r | |
43 | 32-bit execution mode from 64-bit SMM.\r | |
44 | @param[in] NewInstructionPointer Instruction pointer to use if resuming to\r | |
45 | same execution mode as SMM.\r | |
46 | \r | |
47 | @retval 0 This function did modify the SMRAM save state.\r | |
48 | @retval > 0 The original instruction pointer value from the SMRAM save state\r | |
49 | before it was replaced.\r | |
50 | **/\r | |
51 | UINT64\r | |
52 | EFIAPI\r | |
53 | SmmCpuFeaturesHookReturnFromSmm (\r | |
54 | IN UINTN CpuIndex,\r | |
55 | IN SMRAM_SAVE_STATE_MAP *CpuState,\r | |
56 | IN UINT64 NewInstructionPointer32,\r | |
57 | IN UINT64 NewInstructionPointer\r | |
58 | )\r | |
59 | {\r | |
60 | return 0;\r | |
61 | }\r | |
62 | \r | |
63 | /**\r | |
64 | Hook point in normal execution mode that allows the one CPU that was elected\r | |
65 | as monarch during System Management Mode initialization to perform additional\r | |
66 | initialization actions immediately after all of the CPUs have processed their\r | |
67 | first SMI and called SmmCpuFeaturesInitializeProcessor() relocating SMBASE\r | |
68 | into a buffer in SMRAM and called SmmCpuFeaturesHookReturnFromSmm().\r | |
69 | **/\r | |
70 | VOID\r | |
71 | EFIAPI\r | |
72 | SmmCpuFeaturesSmmRelocationComplete (\r | |
73 | VOID\r | |
74 | )\r | |
75 | {\r | |
76 | }\r | |
77 | \r | |
78 | /**\r | |
79 | Processor specific hook point each time a CPU exits System Management Mode.\r | |
80 | \r | |
81 | @param[in] CpuIndex The index of the CPU that is exiting SMM. The value must\r | |
82 | be between 0 and the NumberOfCpus field in the System\r | |
83 | Management System Table (SMST).\r | |
84 | **/\r | |
85 | VOID\r | |
86 | EFIAPI\r | |
87 | SmmCpuFeaturesRendezvousExit (\r | |
88 | IN UINTN CpuIndex\r | |
89 | )\r | |
90 | {\r | |
91 | }\r | |
92 | \r | |
93 | /**\r | |
94 | Check to see if an SMM register is supported by a specified CPU.\r | |
95 | \r | |
96 | @param[in] CpuIndex The index of the CPU to check for SMM register support.\r | |
97 | The value must be between 0 and the NumberOfCpus field\r | |
98 | in the System Management System Table (SMST).\r | |
99 | @param[in] RegName Identifies the SMM register to check for support.\r | |
100 | \r | |
101 | @retval TRUE The SMM register specified by RegName is supported by the CPU\r | |
102 | specified by CpuIndex.\r | |
103 | @retval FALSE The SMM register specified by RegName is not supported by the\r | |
104 | CPU specified by CpuIndex.\r | |
105 | **/\r | |
106 | BOOLEAN\r | |
107 | EFIAPI\r | |
108 | SmmCpuFeaturesIsSmmRegisterSupported (\r | |
109 | IN UINTN CpuIndex,\r | |
110 | IN SMM_REG_NAME RegName\r | |
111 | )\r | |
112 | {\r | |
113 | if (FeaturePcdGet (PcdSmmFeatureControlEnable) && (RegName == SmmRegFeatureControl)) {\r | |
114 | return TRUE;\r | |
115 | }\r | |
116 | \r | |
117 | return FALSE;\r | |
118 | }\r | |
119 | \r | |
120 | /**\r | |
121 | Read an SMM Save State register on the target processor. If this function\r | |
122 | returns EFI_UNSUPPORTED, then the caller is responsible for reading the\r | |
123 | SMM Save Sate register.\r | |
124 | \r | |
125 | @param[in] CpuIndex The index of the CPU to read the SMM Save State. The\r | |
126 | value must be between 0 and the NumberOfCpus field in\r | |
127 | the System Management System Table (SMST).\r | |
128 | @param[in] Register The SMM Save State register to read.\r | |
129 | @param[in] Width The number of bytes to read from the CPU save state.\r | |
130 | @param[out] Buffer Upon return, this holds the CPU register value read\r | |
131 | from the save state.\r | |
132 | \r | |
133 | @retval EFI_SUCCESS The register was read from Save State.\r | |
134 | @retval EFI_INVALID_PARAMETER Buffer is NULL.\r | |
135 | @retval EFI_UNSUPPORTED This function does not support reading Register.\r | |
136 | \r | |
137 | **/\r | |
138 | EFI_STATUS\r | |
139 | EFIAPI\r | |
140 | SmmCpuFeaturesReadSaveStateRegister (\r | |
141 | IN UINTN CpuIndex,\r | |
142 | IN EFI_SMM_SAVE_STATE_REGISTER Register,\r | |
143 | IN UINTN Width,\r | |
144 | OUT VOID *Buffer\r | |
145 | )\r | |
146 | {\r | |
147 | return EFI_UNSUPPORTED;\r | |
148 | }\r | |
149 | \r | |
150 | /**\r | |
151 | Writes an SMM Save State register on the target processor. If this function\r | |
152 | returns EFI_UNSUPPORTED, then the caller is responsible for writing the\r | |
153 | SMM Save Sate register.\r | |
154 | \r | |
155 | @param[in] CpuIndex The index of the CPU to write the SMM Save State. The\r | |
156 | value must be between 0 and the NumberOfCpus field in\r | |
157 | the System Management System Table (SMST).\r | |
158 | @param[in] Register The SMM Save State register to write.\r | |
159 | @param[in] Width The number of bytes to write to the CPU save state.\r | |
160 | @param[in] Buffer Upon entry, this holds the new CPU register value.\r | |
161 | \r | |
162 | @retval EFI_SUCCESS The register was written to Save State.\r | |
163 | @retval EFI_INVALID_PARAMETER Buffer is NULL.\r | |
164 | @retval EFI_UNSUPPORTED This function does not support writing Register.\r | |
165 | **/\r | |
166 | EFI_STATUS\r | |
167 | EFIAPI\r | |
168 | SmmCpuFeaturesWriteSaveStateRegister (\r | |
169 | IN UINTN CpuIndex,\r | |
170 | IN EFI_SMM_SAVE_STATE_REGISTER Register,\r | |
171 | IN UINTN Width,\r | |
172 | IN CONST VOID *Buffer\r | |
173 | )\r | |
174 | {\r | |
175 | return EFI_UNSUPPORTED;\r | |
176 | }\r | |
177 | \r | |
178 | /**\r | |
179 | This function is hook point called after the gEfiSmmReadyToLockProtocolGuid\r | |
180 | notification is completely processed.\r | |
181 | **/\r | |
182 | VOID\r | |
183 | EFIAPI\r | |
184 | SmmCpuFeaturesCompleteSmmReadyToLock (\r | |
185 | VOID\r | |
186 | )\r | |
187 | {\r | |
188 | }\r |