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09119a00 MK |
1 | /** @file\r |
2 | SMM STM support functions\r | |
3 | \r | |
4 | Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>\r | |
0acd8697 | 5 | SPDX-License-Identifier: BSD-2-Clause-Patent\r |
09119a00 MK |
6 | \r |
7 | **/\r | |
8 | \r | |
edd46cd4 | 9 | #include <PiMm.h>\r |
09119a00 MK |
10 | #include <Library/DebugLib.h>\r |
11 | \r | |
12 | #include "SmmStm.h"\r | |
13 | \r | |
14 | ///\r | |
15 | /// Page Table Entry\r | |
16 | ///\r | |
17 | #define IA32_PG_P BIT0\r | |
18 | #define IA32_PG_RW BIT1\r | |
19 | #define IA32_PG_PS BIT7\r | |
20 | \r | |
21 | /**\r | |
22 | \r | |
23 | Create 4G page table for STM.\r | |
24 | 2M PAE page table in X64 version.\r | |
25 | \r | |
26 | @param PageTableBase The page table base in MSEG\r | |
27 | \r | |
28 | **/\r | |
29 | VOID\r | |
30 | StmGen4GPageTable (\r | |
31 | IN UINTN PageTableBase\r | |
32 | )\r | |
33 | {\r | |
34 | UINTN Index;\r | |
35 | UINTN SubIndex;\r | |
36 | UINT64 *Pde;\r | |
37 | UINT64 *Pte;\r | |
38 | UINT64 *Pml4;\r | |
39 | \r | |
40 | Pml4 = (UINT64*)(UINTN)PageTableBase;\r | |
41 | PageTableBase += SIZE_4KB;\r | |
42 | *Pml4 = PageTableBase | IA32_PG_RW | IA32_PG_P;\r | |
43 | \r | |
44 | Pde = (UINT64*)(UINTN)PageTableBase;\r | |
45 | PageTableBase += SIZE_4KB;\r | |
46 | Pte = (UINT64 *)(UINTN)PageTableBase;\r | |
47 | \r | |
48 | for (Index = 0; Index < 4; Index++) {\r | |
49 | *Pde = PageTableBase | IA32_PG_RW | IA32_PG_P;\r | |
50 | Pde++;\r | |
51 | PageTableBase += SIZE_4KB;\r | |
52 | \r | |
53 | for (SubIndex = 0; SubIndex < SIZE_4KB / sizeof (*Pte); SubIndex++) {\r | |
54 | *Pte = (((Index << 9) + SubIndex) << 21) | IA32_PG_PS | IA32_PG_RW | IA32_PG_P;\r | |
55 | Pte++;\r | |
56 | }\r | |
57 | }\r | |
58 | }\r | |
59 | \r | |
60 | /**\r | |
61 | This is SMM exception handle.\r | |
62 | Consumed by STM when exception happen.\r | |
63 | \r | |
64 | @param Context STM protection exception stack frame\r | |
65 | \r | |
66 | @return the EBX value for STM reference.\r | |
67 | EBX = 0: resume SMM guest using register state found on exception stack.\r | |
68 | EBX = 1 to 0x0F: EBX contains a BIOS error code which the STM must record in the\r | |
69 | TXT.ERRORCODE register and subsequently reset the system via\r | |
70 | TXT.CMD.SYS_RESET. The value of the TXT.ERRORCODE register is calculated as\r | |
71 | follows: TXT.ERRORCODE = (EBX & 0x0F) | STM_CRASH_BIOS_PANIC\r | |
72 | EBX = 0x10 to 0xFFFFFFFF - reserved, do not use.\r | |
73 | \r | |
74 | **/\r | |
75 | UINT32\r | |
76 | EFIAPI\r | |
77 | SmmStmExceptionHandler (\r | |
78 | IN OUT STM_PROTECTION_EXCEPTION_STACK_FRAME Context\r | |
79 | )\r | |
80 | {\r | |
81 | // TBD - SmmStmExceptionHandler, record information\r | |
82 | DEBUG ((DEBUG_ERROR, "SmmStmExceptionHandler ...\n"));\r | |
83 | //\r | |
84 | // Skip this instruction and continue;\r | |
85 | //\r | |
86 | Context.X64StackFrame->Rip += Context.X64StackFrame->VmcsExitInstructionLength;\r | |
87 | \r | |
88 | return 0;\r | |
89 | }\r |