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1 | /*++\r |
2 | \r | |
bf0dfea6 | 3 | Copyright (c) 2004 - 2015, Intel Corporation. All rights reserved.<BR>\r |
3cbfba02 DW |
4 | \r |
5 | This program and the accompanying materials are licensed and made available under\r | |
6 | the terms and conditions of the BSD License that accompanies this distribution.\r | |
7 | The full text of the license may be found at\r | |
8 | http://opensource.org/licenses/bsd-license.php.\r | |
9 | \r | |
10 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
11 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
12 | \r | |
13 | \r | |
14 | \r | |
15 | Module Name:\r | |
16 | \r | |
17 | Madt3.0.c\r | |
18 | \r | |
19 | Abstract:\r | |
20 | \r | |
21 | This file contains a structure definition for the ACPI 2.0 Multiple APIC\r | |
22 | Description Table (MADT). Any changes to the MADT table require updating the\r | |
23 | respective structure count in Madt.h and then adding the structure to the\r | |
24 | MADT defined in this file. The table layout is defined in Madt.h and the\r | |
25 | table contents are defined in Acpi3_0.h and Madt.h.\r | |
26 | \r | |
27 | --*/\r | |
28 | \r | |
29 | //\r | |
30 | // Statements that include other files\r | |
31 | //\r | |
32 | #include "Madt.h"\r | |
33 | #include <IndustryStandard/Acpi50.h>\r | |
34 | \r | |
35 | //\r | |
36 | // Multiple APIC Description Table\r | |
37 | //\r | |
38 | EFI_ACPI_3_0_MULTIPLE_APIC_DESCRIPTION_TABLE Madt = {\r | |
39 | EFI_ACPI_3_0_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE, // **Signatures are the same 1.0-3.0 because it says "APIC".\r | |
40 | sizeof (EFI_ACPI_3_0_MULTIPLE_APIC_DESCRIPTION_TABLE), // **Length\r | |
41 | EFI_ACPI_5_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION,\r | |
42 | //\r | |
43 | // EFI_ACPI_3_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION, // **Table Revision must be 2.0 for ACPI 3.0\r | |
44 | // Checksum will be updated at runtime\r | |
45 | //\r | |
46 | 0x00, // **Check sum\r | |
47 | //\r | |
48 | // It is expected that these values will be programmed at runtime\r | |
49 | //\r | |
50 | ' ', // OEMID\r | |
51 | ' ', // Creative way to\r | |
52 | ' ', // make six bytes\r | |
53 | ' ', // of space in\r | |
54 | ' ', // a table for\r | |
55 | ' ', // **OEMID\r | |
56 | 0, // **OEM Table ID\r | |
57 | EFI_ACPI_OEM_MADT_REVISION, // **OEM Revision\r | |
58 | 0, // **Creator ID\r | |
59 | 0, // **Creator Revision\r | |
60 | //\r | |
61 | // MADT specific fields\r | |
62 | //\r | |
63 | LOCAL_APIC_ADDRESS, // **Local APIC Address\r | |
64 | EFI_ACPI_4_0_MULTIPLE_APIC_FLAGS, // **Flags\r | |
65 | //\r | |
66 | // Processor Local APIC Structure\r | |
67 | // Correct processor order, Primary threads first then Hyper threads\r | |
68 | // And correct APIC-ids\r | |
69 | // This text below is included as a reference until Thurley is 100%:\r | |
70 | // According to EDS the Local APIC ID is determined based of a bit structure\r | |
71 | // Bit 24: Core ID Bit 25: Core Pair ID Bit 26-27: Reserved Bit 28-30: Socket ID Bit 31: Reserved\r | |
72 | // 4 Sockets and 4 Cores per Socket.\r | |
73 | // So possible LAPIC IDs 00, 01, 02, 03, 10, 11, 12, 13, 20, 21, 22, 23, 30, 31, 32, 33\r | |
74 | // Static Entries 00, 10, 20, 30, 01, 11, 21, 31, 02, 12, 22, 32, 03, 13, 23, 33\r | |
75 | // BSP needs to be first entry in table. Check before boot. If BSP non zero need to rotate the entries.\r | |
76 | // Suppore BSP is LAPIC ID xy. Rotate the table by using formula [x + (y * 4)]\r | |
77 | // So if BSP LAPIC ID is 21 then table rotated 6 times.\r | |
78 | // End of Reference Text.\r | |
79 | // Thurley is supposed to be 2 sockets, 4 cores, and hyperthreading available per each core.\r | |
80 | // 2 (sockets) x 4 (cores) = 8 (processors non-HT), 8 (processors non-HT) x 2 (HT/proc) = 16 (HT procs)\r | |
81 | // Rhyme & reason of the ordering below. This is a best guess ordering for now,\r | |
82 | // Thurley EPS may give better info on LAPIC numbers.\r | |
83 | // Ordering was established to help dissipate heat across two sockets evenly.\r | |
84 | // Since logical processor number only has to be unique, I followed\r | |
85 | // a similar approach to high end servers and have the first digit of the LAPIC\r | |
86 | // id the socket number.\r | |
87 | //\r | |
88 | EFI_ACPI_3_0_PROCESSOR_LOCAL_APIC, // Type 0x00\r | |
89 | sizeof (EFI_ACPI_3_0_PROCESSOR_LOCAL_APIC_STRUCTURE), // Length\r | |
90 | 0x01, // Processor ID\r | |
91 | 0x00, // Local APIC ID\r | |
92 | 0x00000001, // Flags - Disabled (until initialized by platform driver)\r | |
93 | EFI_ACPI_3_0_PROCESSOR_LOCAL_APIC, // Type\r | |
94 | sizeof (EFI_ACPI_3_0_PROCESSOR_LOCAL_APIC_STRUCTURE), // Length\r | |
95 | 0x02, // Processor ID\r | |
bf0dfea6 | 96 | 0x04, // Local APIC ID \r |
3cbfba02 DW |
97 | 0x00000001, // Flags - Disabled (until initialized by platform driver)\r |
98 | EFI_ACPI_3_0_PROCESSOR_LOCAL_APIC, // Type\r | |
99 | sizeof (EFI_ACPI_3_0_PROCESSOR_LOCAL_APIC_STRUCTURE), // Length\r | |
100 | 0x03, // Processor ID\r | |
bf0dfea6 | 101 | 0x02, // Local APIC ID\r |
3cbfba02 DW |
102 | 0x00000001, // Flags - Disabled (until initialized by platform driver)\r |
103 | EFI_ACPI_3_0_PROCESSOR_LOCAL_APIC, // Type\r | |
104 | sizeof (EFI_ACPI_3_0_PROCESSOR_LOCAL_APIC_STRUCTURE), // Length\r | |
105 | 0x04, // Processor ID\r | |
106 | 0x06, // Local APIC ID\r | |
107 | 0x00000001, // Flags - Disabled (until initialized by platform driver)\r | |
108 | //\r | |
109 | // *************** IO APIC Structure ******************\r | |
110 | //\r | |
111 | //\r | |
112 | //\r | |
113 | // ************************** I/O APIC **************\r | |
114 | //\r | |
115 | EFI_ACPI_3_0_IO_APIC, // Type 0x01\r | |
116 | sizeof (EFI_ACPI_3_0_IO_APIC_STRUCTURE), // Length\r | |
117 | ICH_IOAPIC_ID, // IO APIC ID\r | |
118 | EFI_ACPI_RESERVED_BYTE, // Reserved EFI_ACPI_RESERVED_BYTE\r | |
119 | IO_APIC_ADDRESS, // IO APIC Address (physical) 0xFEC00000\r | |
120 | 0x18 * 0, // Global System Interrupt Base\r | |
121 | \r | |
122 | //\r | |
123 | // Interrupt Source Override Structure: Sample\r | |
124 | //\r | |
125 | // EFI_ACPI_2_0_INTERRUPT_SOURCE_OVERRIDE, // Type 0x02\r | |
126 | // sizeof (EFI_ACPI_2_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE),// Length\r | |
127 | // 0x00, // Bus\r | |
128 | // 0x00, // Source\r | |
129 | // 0x00000000, // Global System Interrupt\r | |
130 | // 0x0000, // Flags\r | |
131 | //\r | |
132 | // IRQ0=>IRQ2 Interrupt Source Override Structure\r | |
133 | //\r | |
134 | EFI_ACPI_3_0_INTERRUPT_SOURCE_OVERRIDE, // Type 0x02\r | |
135 | sizeof (EFI_ACPI_3_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE), // Length\r | |
136 | 0x00, // Bus - ISA\r | |
137 | 0x00, // Source - IRQ0\r | |
138 | 0x00000002, // Global System Interrupt - IRQ2\r | |
139 | 0x0000, // Flags - Conforms to specifications of the bus\r | |
140 | //\r | |
141 | // ISO (SCI Active High) Interrupt Source Override Structure\r | |
142 | //\r | |
143 | EFI_ACPI_3_0_INTERRUPT_SOURCE_OVERRIDE, // Type 0x02\r | |
144 | sizeof (EFI_ACPI_3_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE), // Length\r | |
145 | 0x00, // Bus - ISA\r | |
146 | 0x09, // Source - IRQ0\r | |
147 | 0x00000009, // Global System Interrupt - IRQ2\r | |
148 | 0x000D, // Flags - Level-tiggered, Active High\r | |
149 | \r | |
150 | \r | |
151 | \r | |
152 | EFI_ACPI_3_0_LOCAL_APIC_NMI, // Type\r | |
153 | sizeof (EFI_ACPI_3_0_LOCAL_APIC_NMI_STRUCTURE), // Length\r | |
154 | 0x01, // ACPI Processor ID\r | |
155 | 0x000D, // Flags - Level-tiggered, Active High\r | |
156 | 0x01, // Local APIC LINT#\r | |
157 | EFI_ACPI_3_0_LOCAL_APIC_NMI, // Type\r | |
158 | sizeof (EFI_ACPI_3_0_LOCAL_APIC_NMI_STRUCTURE), // Length\r | |
159 | 0x02, // ACPI Processor ID\r | |
160 | 0x000D, // Flags - Level-tiggered, Active High\r | |
161 | 0x01, // Local APIC LINT#\r | |
162 | EFI_ACPI_3_0_LOCAL_APIC_NMI, // Type\r | |
163 | sizeof (EFI_ACPI_3_0_LOCAL_APIC_NMI_STRUCTURE), // Length\r | |
164 | 0x03, // ACPI Processor ID\r | |
165 | 0x000D, // Flags - Level-tiggered, Active High\r | |
166 | 0x01, // Local APIC LINT#\r | |
167 | EFI_ACPI_3_0_LOCAL_APIC_NMI, // Type\r | |
168 | sizeof (EFI_ACPI_3_0_LOCAL_APIC_NMI_STRUCTURE), // Length\r | |
169 | 0x04, // ACPI Processor ID\r | |
170 | 0x000D, // Flags - Level-tiggered, Active High\r | |
171 | 0x01, // Local APIC LINT#\r | |
172 | };\r | |
173 | \r | |
174 | VOID*\r | |
175 | ReferenceAcpiTable (\r | |
176 | VOID\r | |
177 | )\r | |
178 | {\r | |
179 | //\r | |
180 | // Reference the table being generated to prevent the optimizer from\r | |
181 | // removing the data structure from the executable\r | |
182 | //\r | |
183 | return (VOID*)&Madt;\r | |
184 | }\r |