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3cbfba02 DW |
1 | //\r |
2 | //\r | |
3 | \r | |
4 | /*++\r | |
5 | \r | |
6 | Copyright (c) 1999 - 2014, Intel Corporation. All rights reserved\r | |
7 | \r | |
8 | This program and the accompanying materials are licensed and made available under\r | |
9 | the terms and conditions of the BSD License that accompanies this distribution.\r | |
10 | The full text of the license may be found at\r | |
11 | http://opensource.org/licenses/bsd-license.php.\r | |
12 | \r | |
13 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
14 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
15 | \r | |
16 | \r | |
17 | \r | |
18 | Module Name:\r | |
19 | \r | |
20 | SmbusPolicy.h\r | |
21 | \r | |
22 | Abstract:\r | |
23 | \r | |
24 | Smbus Policy PPI as defined in EFI 2.0\r | |
25 | \r | |
26 | --*/\r | |
27 | #ifndef _PEI_SMBUS_POLICY_PPI_H\r | |
28 | #define _PEI_SMBUS_POLICY_PPI_H\r | |
29 | \r | |
30 | #define PEI_SMBUS_POLICY_PPI_GUID \\r | |
31 | { \\r | |
32 | 0x63b6e435, 0x32bc, 0x49c6, 0x81, 0xbd, 0xb7, 0xa1, 0xa0, 0xfe, 0x1a, 0x6c \\r | |
33 | }\r | |
34 | \r | |
35 | typedef struct _PEI_SMBUS_POLICY_PPI PEI_SMBUS_POLICY_PPI;\r | |
36 | \r | |
52a99493 | 37 | struct _PEI_SMBUS_POLICY_PPI {\r |
3cbfba02 DW |
38 | UINTN BaseAddress;\r |
39 | UINT32 PciAddress;\r | |
40 | UINT8 NumRsvdAddress;\r | |
41 | UINT8 *RsvdAddress;\r | |
52a99493 | 42 | };\r |
3cbfba02 DW |
43 | \r |
44 | extern EFI_GUID gPeiSmbusPolicyPpiGuid;\r | |
45 | \r | |
46 | #endif\r |