projects / mirror_edk2.git / blame
| Commit | Line | Data |
|---|---|---|
| 3cbfba02 DW |
1 | /*++\r |
| 2 | \r | |
| 3 | Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>\r | |
| 4 | \r\r | |
| 9dc8036d MK |
5 | SPDX-License-Identifier: BSD-2-Clause-Patent\r |
| 6 | \r | |
| 3cbfba02 DW |
7 | \r\r |
| 8 | \r | |
| 9 | \r | |
| 10 | Flash device library class header file.\r | |
| 11 | \r | |
| 12 | Flash Device Library common type, MACRO and API definition. The basic idea for\r | |
| 13 | this library is to provide API to abstract the different between flash\r | |
| 14 | technology (SPI, FWH etc..), flash controller (SPI host controller on\r | |
| 15 | ICH, MMIO type access for FWH), flash chip (programming command, method\r | |
| 16 | of status checking). This library class can be consumed by drivers or applications\r | |
| 17 | such as Firmware Volume Block driver, Flash Update application. These driver\r | |
| 18 | can be written in a generic manner so that they are more easy to be\r | |
| 19 | ported to other platforms.\r | |
| 20 | \r | |
| 21 | This library can be build on a set of APIs which can touch flash controller, flash\r | |
| 22 | chip directly for a platform with simple flash device configuration.\r | |
| 23 | \r | |
| 24 | For a platform with complex flash device configuration, this library can be built\r | |
| 25 | on the Flash Device Operate Library. Please see the header file for that library\r | |
| 26 | class for detailed usage.\r | |
| 27 | \r | |
| 28 | **/\r | |
| 29 | \r | |
| 30 | #ifndef __FLASHDEVICE_LIB_H__\r | |
| 31 | #define __FLASHDEVICE_LIB_H__\r | |
| 32 | \r | |
| 33 | /**\r | |
| 34 | Read NumBytes bytes of data from the address specified by\r | |
| 35 | PAddress into Buffer.\r | |
| 36 | \r | |
| 37 | @param[in] PAddress The starting physical address of the read.\r | |
| 38 | @param[in,out] NumBytes On input, the number of bytes to read. On output, the number\r | |
| 39 | of bytes actually read.\r | |
| 40 | @param[out] Buffer The destination data buffer for the read.\r | |
| 41 | \r | |
| 42 | @retval EFI_SUCCESS. Opertion is successful.\r | |
| 43 | @retval EFI_DEVICE_ERROR If there is any device errors.\r | |
| 44 | \r | |
| 45 | **/\r | |
| 46 | EFI_STATUS\r | |
| 47 | EFIAPI\r | |
| 48 | LibFvbFlashDeviceRead (\r | |
| 49 | IN UINTN PAddress,\r | |
| 50 | IN OUT UINTN *NumBytes,\r | |
| 51 | OUT UINT8 *Buffer\r | |
| 52 | );\r | |
| 53 | \r | |
| 54 | /**\r | |
| 55 | Write NumBytes bytes of data from Buffer to the address specified by\r | |
| 56 | PAddresss.\r | |
| 57 | \r | |
| 58 | @param[in] PAddress The starting physical address of the write.\r | |
| 59 | @param[in,out] NumBytes On input, the number of bytes to write. On output,\r | |
| 60 | the actual number of bytes written.\r | |
| 61 | @param[in] Buffer The source data buffer for the write.\r | |
| 62 | \r | |
| 63 | @retval EFI_SUCCESS. Opertion is successful.\r | |
| 64 | @retval EFI_DEVICE_ERROR If there is any device errors.\r | |
| 65 | \r | |
| 66 | **/\r | |
| 67 | EFI_STATUS\r | |
| 68 | EFIAPI\r | |
| 69 | LibFvbFlashDeviceWrite (\r | |
| 70 | IN UINTN PAddress,\r | |
| 71 | IN OUT UINTN *NumBytes,\r | |
| 72 | IN UINT8 *Buffer\r | |
| 73 | );\r | |
| 74 | \r | |
| 75 | /**\r | |
| 76 | Erase the block staring at PAddress.\r | |
| 77 | \r | |
| 78 | @param[in] PAddress The starting physical address of the region to be erased.\r | |
| 79 | @param[in] LbaLength The length of the region to be erased. This parameter is necessary\r | |
| 80 | as the physical block size on a flash device could be different than\r | |
| 81 | the logical block size of Firmware Volume Block protocol. Erase on\r | |
| 82 | flash chip is always performed block by block. Therefore, the ERASE\r | |
| 83 | operation to a logical block is converted a number of ERASE operation\r | |
| 84 | (or a partial erase) on the hardware.\r | |
| 85 | \r | |
| 86 | @retval EFI_SUCCESS. Opertion is successful.\r | |
| 87 | @retval EFI_DEVICE_ERROR If there is any device errors.\r | |
| 88 | \r | |
| 89 | **/\r | |
| 90 | EFI_STATUS\r | |
| 91 | EFIAPI\r | |
| 92 | LibFvbFlashDeviceBlockErase (\r | |
| 93 | IN UINTN PAddress,\r | |
| 94 | IN UINTN LbaLength\r | |
| 95 | );\r | |
| 96 | \r | |
| 97 | /**\r | |
| 98 | Lock or unlock the block staring at PAddress.\r | |
| 99 | \r | |
| 100 | @param[in] PAddress The starting physical address of region to be (un)locked.\r | |
| 101 | @param[in] LbaLength The length of the region to be (un)locked. This parameter is necessary\r | |
| 102 | as the physical block size on a flash device could be different than\r | |
| 103 | the logical block size of Firmware Volume Block protocol. (Un)Lock on\r | |
| 104 | flash chip is always performed block by block. Therefore, the (Un)Lock\r | |
| 105 | operation to a logical block is converted a number of (Un)Lock operation\r | |
| 106 | (or a partial erase) on the hardware.\r | |
| 107 | @param[in] Lock TRUE to lock. FALSE to unlock.\r | |
| 108 | \r | |
| 109 | @retval EFI_SUCCESS. Opertion is successful.\r | |
| 110 | \r | |
| 111 | **/\r | |
| 112 | EFI_STATUS\r | |
| 113 | EFIAPI\r | |
| 114 | LibFvbFlashDeviceBlockLock (\r | |
| 115 | IN UINTN PAddress,\r | |
| 116 | IN UINTN LbaLength,\r | |
| 117 | IN BOOLEAN Lock\r | |
| 118 | );\r | |
| 119 | \r | |
| 120 | #endif\r | |
| 121 | \r | |
| 122 | \r |