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1/*++\r
2\r
3 Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>\r
4 \r\r
5 This program and the accompanying materials are licensed and made available under\r\r
6 the terms and conditions of the BSD License that accompanies this distribution. \r\r
7 The full text of the license may be found at \r\r
8 http://opensource.org/licenses/bsd-license.php. \r\r
9 \r\r
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r\r
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r\r
12 \r\r
13\r
14\r
15Module Name:\r
16\r
17 LpcWpc83667Policy.h\r
18\r
19Abstract:\r
20\r
21 Protocol used for WPC83627 Policy definition.\r
22-------------------------------------------------------------------------------\r
23 Rev Date<MM/DD/YYYY> Name Description\r
24 -------------------------------------------------------------------------------\r
25 R01 < 4/22/2011> LB Update driver for Sio83627UGH support.\r
26 -------------------------------------------------------------------------------\r
27**/\r
28\r
29#ifndef _WPC83627_POLICY_PROTOCOL_H_\r
30#define _WPC83627_POLICY_PROTOCOL_H_\r
31\r
32EFI_FORWARD_DECLARATION (EFI_WPC83627_POLICY_PROTOCOL);\r
33\r
34#define EFI_WPC83627_POLICY_PROTOCOL_GUID \\r
35 { \\r
36 0xd3ecc567, 0x9fd5, 0x44c1, 0x86, 0xcf, 0x5d, 0xa7, 0xa2, 0x4f, 0x4b, 0x5d \\r
37 }\r
38\r
39#define EFI_WPC83627_COM1_ENABLE 0x01\r
40#define EFI_WPC83627_COM2_ENABLE 0x01\r
41\r
42#define EFI_WPC83627_COM3_ENABLE 0x01\r
43#define EFI_WPC83627_COM4_ENABLE 0x01\r
44\r
45#define EFI_WPC83627_LPT1_ENABLE 0x01\r
46#define EFI_WPC83627_LPT1_ENABLE 0x01\r
47#define EFI_WPC83627_FDD_ENABLE 0x01\r
48#define EFI_WPC83627_FDD_WRITE_ENABLE 0x01\r
49#define EFI_WPC83627_PS2_KBC_ENABLE 0x01\r
50#define EFI_WPC83627_ECIR_ENABLE 0x01\r
51\r
52#define EFI_WPC83627_COM1_DISABLE 0x00\r
53#define EFI_WPC83627_COM2_DISABLE 0x00\r
54\r
55#define EFI_WPC83627_COM3_DISABLE 0x00\r
56#define EFI_WPC83627_COM4_DISABLE 0x00\r
57\r
58#define EFI_WPC83627_LPT1_DISABLE 0x00\r
59#define EFI_WPC83627_FDD_DISABLE 0x00\r
60#define EFI_WPC83627_FDD_WRITE_PROTECT 0x00\r
61#define EFI_WPC83627_PS2_KBC_DISABLE 0x00\r
62#define EFI_WPC83627_ECIR_DISABLE 0x00\r
63#define EFI_WPC83627_RESERVED_DEFAULT 0x00\r
64\r
65typedef struct {\r
66 UINT16 Com1 :1; // 0 = Disable, 1 = Enable\r
67 UINT16 Lpt1 :1; // 0 = Disable, 1 = Enable\r
68 UINT16 Floppy :1; // 0 = Disable, 1 = Enable\r
69 UINT16 FloppyWriteProtect :1; // 0 = Write Protect, 1 = Write Enable\r
70 UINT16 Port80 :1; // 0 = Disable, 1 = Enable\r
71 UINT16 CIR :1; // CIR enable or disable\r
72 UINT16 Ps2Keyboard :1; // 0 = Disable, 1 = Enable\r
73 UINT16 Ps2Mouse :1; // 0 = Disable, 1 = Enable\r
74 UINT16 Com2 :1; // 0 = Disable, 1 = Enable\r
75\r
76 UINT16 Com3 :1; // 0 = Disable, 1 = Enable\r
77 UINT16 Com4 :1; // 0 = Disable, 1 = Enable\r
78\r
79 UINT16 Dac :1; // 0 = Disable, 1 = Enable\r
80 UINT16 Rsvd :6;\r
81} EFI_WPC83627_DEVICE_ENABLES;\r
82\r
83typedef enum {\r
84 LptModeOutput,\r
85 LptModeBiDirectional,\r
86 LptModeEpp,\r
87 LptModeEcp\r
88} EFI_LPT_MODE;\r
89\r
90typedef struct _EFI_WPC83627_POLICY_PROTOCOL {\r
91 EFI_WPC83627_DEVICE_ENABLES DeviceEnables;\r
92 EFI_LPT_MODE LptMode;\r
93} EFI_WPC83627_POLICY_PROTOCOL;\r
94\r
95extern EFI_GUID gEfiLpcWpc83627PolicyProtocolGuid;\r
96\r
97#endif\r