projects / mirror_edk2.git / blame
| Commit | Line | Data |
|---|---|---|
| 4e522096 DW |
1 | /** @file\r |
| 2 | Misc Registers Definition.\r | |
| 3 | \r | |
| 4 | Copyright (c) 2011 - 2015, Intel Corporation. All rights reserved.<BR>\r | |
| 5 | \r | |
| 9dc8036d | 6 | SPDX-License-Identifier: BSD-2-Clause-Patent\r |
| 4e522096 DW |
7 | \r |
| 8 | --*/\r | |
| 9 | \r | |
| 10 | #ifndef _I2C_ACCESS_H_\r | |
| 11 | #define _I2C_ACCESS_H_\r | |
| 12 | \r | |
| 13 | #include "I2CIoLibPei.h"\r | |
| 14 | \r | |
| 15 | #define DEFAULT_PCI_BUS_NUMBER_PCH 0\r | |
| 16 | \r | |
| 17 | #define PCI_DEVICE_NUMBER_PCH_LPC 31\r | |
| 18 | #define PCI_FUNCTION_NUMBER_PCH_LPC 0\r | |
| 19 | \r | |
| 20 | #define R_PCH_LPC_ACPI_BASE 0x40 // ABASE, 16bit\r | |
| 21 | #define R_PCH_LPC_ACPI_BASEADR 0x400 // ABASE, 16bit\r | |
| 22 | #define B_PCH_LPC_ACPI_BASE_EN BIT1 // Enable Bit\r | |
| 23 | #define B_PCH_LPC_ACPI_BASE_BAR 0x0000FF80 // Base Address, 128 Bytes\r | |
| 24 | #define V_PCH_ACPI_PM1_TMR_MAX_VAL 0x1000000 // The timer is 24 bit overflow\r | |
| 25 | #define B_PCH_ACPI_PM1_TMR_VAL 0xFFFFFF // The timer value mask\r | |
| 26 | \r | |
| 27 | #define R_PCH_ACPI_PM1_TMR 0x08 // Power Management 1 Timer\r | |
| 28 | #define V_PCH_ACPI_PM1_TMR_FREQUENCY 3579545 // Timer Frequency\r | |
| 29 | \r | |
| 30 | \r | |
| 31 | #define PchLpcPciCfg8(Register) I2CLibPeiMmioRead8 (MmPciAddress (0, DEFAULT_PCI_BUS_NUMBER_PCH, PCI_DEVICE_NUMBER_PCH_LPC, 0, Register))\r | |
| 32 | \r | |
| 33 | #define PCIEX_BASE_ADDRESS 0xE0000000\r | |
| 34 | #define PCI_EXPRESS_BASE_ADDRESS ((VOID *) (UINTN) PCIEX_BASE_ADDRESS)\r | |
| 35 | \r | |
| 36 | #define MmPciAddress( Segment, Bus, Device, Function, Register ) \\r | |
| 37 | ( (UINTN)PCI_EXPRESS_BASE_ADDRESS + \\r | |
| 38 | (UINTN)(Bus << 20) + \\r | |
| 39 | (UINTN)(Device << 15) + \\r | |
| 40 | (UINTN)(Function << 12) + \\r | |
| 41 | (UINTN)(Register) \\r | |
| 42 | )\r | |
| 43 | #endif\r | |
| 44 | \r |