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[mirror_edk2.git] / Vlv2TbltDevicePkg / PciPlatform / PciPlatform.c
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3cbfba02
DW		 1/** @file\r
2\r
3 Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>\r
4 \r\r
9dc8036d
MK		 5 SPDX-License-Identifier: BSD-2-Clause-Patent\r
6\r
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DW		 7 \r\r
8\r
9Module Name:\r
10\r
11\r
12 PciPlatform.c\r
13\r
14Abstract:\r
15--*/\r
16\r
17\r
18#include "PciPlatform.h"\r
19#include "PchRegs.h"\r
20#include "PchAccess.h"\r
21#include "VlvCommonDefinitions.h"\r
22#include "PlatformBootMode.h"\r
23\r
24#include <Library/BaseLib.h>\r
25#include <Library/BaseMemoryLib.h>\r
26#include <Protocol/CpuIo.h>\r
27#include <Protocol/PciIo.h>\r
28#include <Guid/SetupVariable.h>\r
29#include <Protocol/PciRootBridgeIo.h>\r
30#include "SetupMode.h"\r
31#include <Library/UefiBootServicesTableLib.h>\r
32#include <Library/UefiRuntimeServicesTableLib.h>\r
33#include <Library/DebugLib.h>\r
a4712bea 34#include <Protocol/FirmwareVolume2.h>\r
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DW		 35#include <Library/HobLib.h>\r
36#include <IndustryStandard/Pci22.h>\r
37\r
38extern PCI_OPTION_ROM_TABLE mPciOptionRomTable[];\r
39extern UINTN mSizeOptionRomTable;\r
40\r
41EFI_PCI_PLATFORM_PROTOCOL mPciPlatform = {\r
42 PhaseNotify,\r
43 PlatformPrepController,\r
44 GetPlatformPolicy,\r
45 GetPciRom\r
46};\r
47\r
48EFI_HANDLE mPciPlatformHandle = NULL;\r
49\r
50\r
51SYSTEM_CONFIGURATION mSystemConfiguration;\r
52\r
53EFI_STATUS\r
54GetRawImage (\r
55 IN EFI_GUID *NameGuid,\r
56 IN OUT VOID **Buffer,\r
57 IN OUT UINTN *Size\r
58 )\r
59{\r
60 EFI_STATUS Status;\r
61 EFI_HANDLE *HandleBuffer;\r
62 UINTN HandleCount;\r
63 UINTN Index;\r
a4712bea 64 EFI_FIRMWARE_VOLUME2_PROTOCOL *Fv;\r
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DW		 65 UINT32 AuthenticationStatus;\r
66\r
67 Status = gBS->LocateHandleBuffer (\r
68 ByProtocol,\r
a4712bea 69 &gEfiFirmwareVolume2ProtocolGuid,\r
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DW		 70 NULL,\r
71 &HandleCount,\r
72 &HandleBuffer\r
73 );\r
74 if (EFI_ERROR (Status) || HandleCount == 0) {\r
75 return EFI_NOT_FOUND;\r
76 }\r
77\r
78 //\r
79 // Find desired image in all Fvs\r
80 //\r
81 for (Index = 0; Index < HandleCount; Index++) {\r
82 Status = gBS->HandleProtocol(\r
83 HandleBuffer[Index],\r
a4712bea 84 &gEfiFirmwareVolume2ProtocolGuid,\r
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DW		 85 (VOID **) &Fv\r
86 );\r
87\r
88 if ( EFI_ERROR ( Status ) ) {\r
89 return EFI_LOAD_ERROR;\r
90 }\r
91\r
92 //\r
93 // Try a raw file\r
94 //\r
95 *Buffer = NULL;\r
96 *Size = 0;\r
97 Status = Fv->ReadSection (\r
98 Fv,\r
99 NameGuid,\r
100 EFI_SECTION_RAW,\r
101 0,\r
102 Buffer,\r
103 Size,\r
104 &AuthenticationStatus\r
105 );\r
106\r
107 if ( !EFI_ERROR ( Status )) {\r
108 break;\r
109 }\r
110 }\r
111\r
112 if ( Index >= HandleCount ) {\r
113 return EFI_NOT_FOUND;\r
114 }\r
115\r
116 return EFI_SUCCESS;\r
117}\r
118\r
119EFI_STATUS\r
120EFIAPI \r
121PhaseNotify (\r
122 IN EFI_PCI_PLATFORM_PROTOCOL *This,\r
123 IN EFI_HANDLE HostBridge,\r
124 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE Phase,\r
125 IN EFI_PCI_CHIPSET_EXECUTION_PHASE ChipsetPhase\r
126 )\r
127{\r
128 return EFI_UNSUPPORTED;\r
129}\r
130\r
131\r
132EFI_STATUS\r
133EFIAPI\r
134PlatformPrepController (\r
135 IN EFI_PCI_PLATFORM_PROTOCOL *This,\r
136 IN EFI_HANDLE HostBridge,\r
137 IN EFI_HANDLE RootBridge,\r
138 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS PciAddress,\r
139 IN EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE Phase,\r
140 IN EFI_PCI_CHIPSET_EXECUTION_PHASE ChipsetPhase\r
141 )\r
142{\r
143 return EFI_UNSUPPORTED;\r
144}\r
145\r
146EFI_STATUS\r
147EFIAPI\r
148GetPlatformPolicy (\r
149 IN CONST EFI_PCI_PLATFORM_PROTOCOL *This,\r
150 OUT EFI_PCI_PLATFORM_POLICY *PciPolicy\r
151 )\r
152{\r
153 *PciPolicy = EFI_RESERVE_VGA_IO_ALIAS;\r
154 return EFI_SUCCESS;\r
155}\r
156\r
157/**\r
158 GetPciRom from platform specific location for specific PCI device\r
159\r
160 @param This Protocol instance\r
161 @param PciHandle Identify the specific PCI devic\r
162 @param RomImage Returns the ROM Image memory location\r
163 @param RomSize Returns Rom Image size\r
164\r
165 @retval EFI_SUCCESS\r
166 @retval EFI_NOT_FOUND\r
167 @retval EFI_OUT_OF_RESOURCES\r
168\r
169**/\r
170EFI_STATUS\r
171EFIAPI \r
172GetPciRom (\r
173 IN CONST EFI_PCI_PLATFORM_PROTOCOL *This,\r
174 IN EFI_HANDLE PciHandle,\r
175 OUT VOID **RomImage,\r
176 OUT UINTN *RomSize\r
177 )\r
178{\r
179 EFI_STATUS Status;\r
180 EFI_PCI_IO_PROTOCOL *PciIo;\r
181 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;\r
182 UINTN Segment;\r
183 UINTN Bus;\r
184 UINTN Device;\r
185 UINTN Function;\r
186 UINT16 VendorId;\r
187 UINT16 DeviceId;\r
188 UINT16 DeviceClass;\r
189 UINTN TableIndex;\r
190 UINT8 Data8;\r
191 BOOLEAN MfgMode;\r
192 EFI_PLATFORM_SETUP_ID *BootModeBuffer;\r
193\r
194 EFI_PEI_HOB_POINTERS GuidHob;\r
195\r
196 MfgMode = FALSE;\r
197\r
198//\r
199// Check if system is in manufacturing mode.\r
200//\r
201 GuidHob.Raw = GetHobList ();\r
202 if (GuidHob.Raw == NULL) {\r
203 return EFI_NOT_FOUND;\r
204 }\r
205\r
206 if ((GuidHob.Raw = GetNextGuidHob (&gEfiPlatformBootModeGuid, GuidHob.Raw)) != NULL) {\r
207 BootModeBuffer = GET_GUID_HOB_DATA (GuidHob.Guid);\r
208 if (!CompareMem (&BootModeBuffer->SetupName, MANUFACTURE_SETUP_NAME,\r
209 StrSize (MANUFACTURE_SETUP_NAME)))\r
210 {\r
211 //\r
212 // System is in manufacturing mode.\r
213 //\r
214 MfgMode = TRUE;\r
215 }\r
216 }\r
217\r
218 Status = gBS->HandleProtocol (\r
219 PciHandle,\r
220 &gEfiPciIoProtocolGuid,\r
221 (void **)&PciIo\r
222 );\r
223 if (EFI_ERROR (Status)) {\r
224 return EFI_NOT_FOUND;\r
225 }\r
226\r
227 Status = gBS->LocateProtocol (\r
228 &gEfiPciRootBridgeIoProtocolGuid,\r
229 NULL,\r
230 (void **)&PciRootBridgeIo\r
231 );\r
232\r
233 if (EFI_ERROR (Status)) {\r
234 return EFI_NOT_FOUND;\r
235 }\r
236\r
237 PciIo->Pci.Read (PciIo, EfiPciIoWidthUint16, 0x0A, 1, &DeviceClass);\r
238\r
239 PciIo->GetLocation (PciIo, &Segment, &Bus, &Device, &Function);\r
240\r
241 PciIo->Pci.Read (PciIo, EfiPciIoWidthUint16, 0, 1, &VendorId);\r
242\r
243 PciIo->Pci.Read (PciIo, EfiPciIoWidthUint16, 2, 1, &DeviceId);\r
244\r
245 //\r
246 // WA for PCIe SATA card (SYBA SY-PEX400-40)\r
247 //\r
248 if ((VendorId == 0x1B21) && (DeviceId == 0x0612)) {\r
249 Data8 = 0x07;\r
250 PciIo->Pci.Write (PciIo, EfiPciIoWidthUint8, 4, 1, &Data8);\r
251 }\r
252\r
253 //\r
254 // Do not run RAID or AHCI Option ROM if IDE\r
255 //\r
256 if ( (DeviceClass == ((PCI_CLASS_MASS_STORAGE << 8 ) | PCI_CLASS_MASS_STORAGE_IDE)) ) {\r
257 return EFI_NOT_FOUND;\r
258 }\r
259\r
260 //\r
261 // Run PXE ROM only if Boot network is enabled and not in MFG mode\r
262 //\r
263 if (DeviceClass == ((PCI_CLASS_NETWORK << 8 ) | PCI_CLASS_NETWORK_ETHERNET)) {\r
264 if (((mSystemConfiguration.BootNetwork == 0) && (MfgMode == FALSE )) || (mSystemConfiguration.FastBoot == 1)) {\r
265 return EFI_NOT_FOUND;\r
266 }\r
267 }\r
268\r
269 //\r
270 // Loop through table of Onboard option rom descriptions\r
271 //\r
272 for (TableIndex = 0; mPciOptionRomTable[TableIndex].VendorId != 0xffff; TableIndex++) {\r
273\r
274 //\r
275 // See if the PCI device specified by PciHandle matches at device in mPciOptionRomTable\r
276 //\r
277 if (VendorId != mPciOptionRomTable[TableIndex].VendorId ||\r
278 DeviceId != mPciOptionRomTable[TableIndex].DeviceId ||\r
279 ((DeviceClass == ((PCI_CLASS_NETWORK << 8 ) | PCI_CLASS_NETWORK_ETHERNET)) &&\r
280 (mPciOptionRomTable[TableIndex].Flag != mSystemConfiguration.BootNetwork)) ) {\r
281 continue;\r
282 }\r
283\r
284 Status = GetRawImage(\r
285 &mPciOptionRomTable[TableIndex].FileName,\r
286 RomImage,\r
287 RomSize\r
288 );\r
289\r
290 if ((VendorId == IGD_VID) && (DeviceId == IGD_DID_VLV_A0)) {\r
291 *(UINT16 *)(((UINTN) *RomImage) + OPROM_DID_OFFSET) = IGD_DID_VLV_A0;\r
292 }\r
293\r
294 if ((VendorId == IGD_VID) && (DeviceId == IGD_DID_II)) {\r
295 *(UINT16 *)(((UINTN) *RomImage) + OPROM_DID_OFFSET) = IGD_DID_II;\r
296 }\r
297\r
298 if ((VendorId == IGD_VID) && (DeviceId == IGD_DID_0BE4)) {\r
299 *(UINT16 *)(((UINTN) *RomImage) + OPROM_DID_OFFSET) = IGD_DID_0BE4;\r
300 }\r
301\r
302 if ((VendorId == IGD_VID) && (DeviceId == IGD_DID_QS)) {\r
303 *(UINT16 *)(((UINTN) *RomImage) + OPROM_DID_OFFSET) = IGD_DID_QS;\r
304 }\r
305\r
306\r
307 if (EFI_ERROR (Status)) {\r
308 continue;\r
309 }\r
310 return EFI_SUCCESS;\r
311 }\r
312\r
313 return EFI_NOT_FOUND;\r
314}\r
315\r
316/**\r
317\r
318 @param (Standard EFI Image entry - EFI_IMAGE_ENTRY_POINT)\r
319\r
320 @retval EFI_STATUS\r
321\r
322**/\r
323EFI_STATUS\r
324EFIAPI\r
325PciPlatformDriverEntry (\r
326 IN EFI_HANDLE ImageHandle,\r
327 IN EFI_SYSTEM_TABLE *SystemTable\r
328 )\r
329{\r
330 EFI_STATUS Status;\r
331 UINTN VarSize;\r
332\r
333 VarSize = sizeof(SYSTEM_CONFIGURATION);\r
334 Status = gRT->GetVariable(\r
335 L"Setup",\r
336 &gEfiNormalSetupGuid,\r
337 NULL,\r
338 &VarSize,\r
339 &mSystemConfiguration\r
340 );\r
620f2891
TH		 341 if (EFI_ERROR (Status) || VarSize != sizeof(SYSTEM_CONFIGURATION)) {\r
342 //The setup variable is corrupted\r
343 VarSize = sizeof(SYSTEM_CONFIGURATION);\r
344 Status = gRT->GetVariable(\r
345 L"SetupRecovery",\r
346 &gEfiNormalSetupGuid,\r
347 NULL,\r
348 &VarSize,\r
349 &mSystemConfiguration\r
350 );\r
351 ASSERT_EFI_ERROR (Status);\r
352 } \r
3cbfba02
DW		 353\r
354 //\r
355 // Install on a new handle\r
356 //\r
357 Status = gBS->InstallProtocolInterface (\r
358 &mPciPlatformHandle,\r
359 &gEfiPciPlatformProtocolGuid,\r
360 EFI_NATIVE_INTERFACE,\r
361 &mPciPlatform\r
362 );\r
363\r
364 return Status;\r
365}\r
366\r
367\r
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