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3cbfba02 DW |
1 | \r |
2 | /*++\r | |
3 | \r | |
4 | Copyright (c) 1999 - 2014, Intel Corporation. All rights reserved\r | |
5 | \r\r | |
6 | This program and the accompanying materials are licensed and made available under\r\r | |
7 | the terms and conditions of the BSD License that accompanies this distribution. \r\r | |
8 | The full text of the license may be found at \r\r | |
9 | http://opensource.org/licenses/bsd-license.php. \r\r | |
10 | \r\r | |
11 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r\r | |
12 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r\r | |
13 | \r\r | |
14 | \r | |
15 | \r | |
16 | Module Name:\r | |
17 | \r | |
18 | VlvPlatformInit.h\r | |
19 | \r | |
20 | Abstract:\r | |
21 | \r | |
22 | Header file for SA Initialization Driver.\r | |
23 | \r | |
24 | --*/\r | |
25 | \r | |
26 | #ifndef _VLV_PLATFORM_INIT_DXE_H_\r | |
27 | #define _VLV_PLATFORM_INIT_DXE_H_\r | |
28 | #include "PiDxe.h"\r | |
29 | \r | |
30 | #include <Protocol/VlvPlatformPolicy.h>\r | |
31 | \r | |
32 | #include "IgdOpRegion.h"\r | |
33 | \r | |
34 | #include <Library/DxeServicesTableLib.h>\r | |
35 | #include <Library/UefiBootServicesTableLib.h>\r | |
36 | #include <Library/UefiLib.h>\r | |
37 | #include "Library/DebugLib.h"\r | |
38 | #include "Library/S3IoLib.h"\r | |
39 | #include "Library/S3PciLib.h"\r | |
40 | #include "Library/IoLib.h"\r | |
41 | #include "Library/PciLib.h"\r | |
42 | #include "Library/S3BootScriptLib.h"\r | |
43 | \r | |
44 | //\r | |
45 | // GT RELATED EQUATES\r | |
46 | //\r | |
47 | #define GTT_MEM_ALIGN 22\r | |
48 | #define GTTMMADR_SIZE_4MB 0x400000\r | |
49 | \r | |
50 | #define IGD_BUS 0x00\r | |
51 | #define IGD_DEV 0x02\r | |
52 | #define IGD_FUN_0 0x00\r | |
53 | \r | |
54 | #define IGD_R_VID 0x00\r | |
55 | #define IGD_R_CMD 0x04\r | |
56 | #define IGD_R_GTTMMADR 0x10\r | |
57 | \r | |
58 | #define IGD_R_BGSM 0x70\r | |
59 | #define LockBit BIT0\r | |
60 | \r | |
61 | #define IGD_VID 0x8086\r | |
62 | #define IGD_DID 0xA001\r | |
63 | #define IGD_MGGC_OFFSET 0x0050 //GMCH Graphics Control Register 0x50\r | |
64 | #define IGD_BSM_OFFSET 0x005C //Base of Stolen Memory\r | |
65 | #define IGD_SWSCI_OFFSET 0x00E0 //Software SCI 0xE0 2\r | |
66 | #define IGD_ASLE_OFFSET 0x00E4 //System Display Event Register 0xE4 4\r | |
67 | #define IGD_ASLS_OFFSET 0x00FC // ASL Storage\r | |
68 | \r | |
69 | #endif\r | |
70 | \r |