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Commit | Line | Data |
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b2441318 | 1 | // SPDX-License-Identifier: GPL-2.0 |
ee54dba9 RKAL |
2 | /* |
3 | * OMAP1 reset support | |
4 | */ | |
5 | #include <linux/kernel.h> | |
6 | #include <linux/io.h> | |
7b6d864b | 7 | #include <linux/reboot.h> |
ee54dba9 | 8 | |
2e3ee9f4 TL |
9 | #include <mach/hardware.h> |
10 | ||
508c0d47 | 11 | #include "iomap.h" |
e2ed89fc PW |
12 | #include "common.h" |
13 | ||
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14 | /* ARM_SYSST bit shifts related to SoC reset sources */ |
15 | #define ARM_SYSST_POR_SHIFT 5 | |
16 | #define ARM_SYSST_EXT_RST_SHIFT 4 | |
17 | #define ARM_SYSST_ARM_WDRST_SHIFT 2 | |
18 | #define ARM_SYSST_GLOB_SWRST_SHIFT 1 | |
19 | ||
20 | /* Standardized reset source bits (across all OMAP SoCs) */ | |
21 | #define OMAP_GLOBAL_COLD_RST_SRC_ID_SHIFT 0 | |
22 | #define OMAP_GLOBAL_WARM_RST_SRC_ID_SHIFT 1 | |
23 | #define OMAP_MPU_WD_RST_SRC_ID_SHIFT 3 | |
24 | #define OMAP_EXTWARM_RST_SRC_ID_SHIFT 5 | |
25 | ||
26 | ||
7b6d864b | 27 | void omap1_restart(enum reboot_mode mode, const char *cmd) |
ee54dba9 RKAL |
28 | { |
29 | /* | |
30 | * Workaround for 5912/1611b bug mentioned in sprz209d.pdf p. 28 | |
31 | * "Global Software Reset Affects Traffic Controller Frequency". | |
32 | */ | |
33 | if (cpu_is_omap5912()) { | |
34 | omap_writew(omap_readw(DPLL_CTL) & ~(1 << 4), DPLL_CTL); | |
35 | omap_writew(0x8, ARM_RSTCT1); | |
36 | } | |
37 | ||
38 | omap_writew(1, ARM_RSTCT1); | |
39 | } | |
b5c5353d PW |
40 | |
41 | /** | |
42 | * omap1_get_reset_sources - return the source of the SoC's last reset | |
43 | * | |
44 | * Returns bits that represent the last reset source for the SoC. The | |
45 | * format is standardized across OMAPs for use by the OMAP watchdog. | |
46 | */ | |
508c0d47 | 47 | u32 omap1_get_reset_sources(void) |
b5c5353d | 48 | { |
508c0d47 | 49 | u32 ret = 0; |
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50 | u16 rs; |
51 | ||
508c0d47 | 52 | rs = __raw_readw(OMAP1_IO_ADDRESS(ARM_SYSST)); |
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53 | |
54 | if (rs & (1 << ARM_SYSST_POR_SHIFT)) | |
55 | ret |= 1 << OMAP_GLOBAL_COLD_RST_SRC_ID_SHIFT; | |
56 | if (rs & (1 << ARM_SYSST_EXT_RST_SHIFT)) | |
57 | ret |= 1 << OMAP_EXTWARM_RST_SRC_ID_SHIFT; | |
58 | if (rs & (1 << ARM_SYSST_ARM_WDRST_SHIFT)) | |
59 | ret |= 1 << OMAP_MPU_WD_RST_SRC_ID_SHIFT; | |
60 | if (rs & (1 << ARM_SYSST_GLOB_SWRST_SHIFT)) | |
61 | ret |= 1 << OMAP_GLOBAL_WARM_RST_SRC_ID_SHIFT; | |
62 | ||
63 | return ret; | |
64 | } |