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arm64: fix a migrating irq bug when hotplug cpu
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1config ARM64
2 def_bool y
b6197b93 3 select ACPI_CCA_REQUIRED if ACPI
d8f4f161 4 select ACPI_GENERIC_GSI if ACPI
6933de0c 5 select ACPI_REDUCED_HARDWARE_ONLY if ACPI
8c2c3df3 6 select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
2b68f6ca 7 select ARCH_HAS_ELF_RANDOMIZE
957e3fac 8 select ARCH_HAS_GCOV_PROFILE_ALL
308c09f1 9 select ARCH_HAS_SG_CHAIN
1f85008e 10 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
c63c8700 11 select ARCH_USE_CMPXCHG_LOCKREF
4badad35 12 select ARCH_SUPPORTS_ATOMIC_RMW
9170100e 13 select ARCH_WANT_OPTIONAL_GPIOLIB
6212a512 14 select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
b6f35981 15 select ARCH_WANT_FRAME_POINTERS
25c92a37 16 select ARM_AMBA
1aee5d7a 17 select ARM_ARCH_TIMER
c4188edc 18 select ARM_GIC
875cbf3e 19 select AUDIT_ARCH_COMPAT_GENERIC
853a33ce 20 select ARM_GIC_V2M if PCI_MSI
021f6537 21 select ARM_GIC_V3
19812729 22 select ARM_GIC_V3_ITS if PCI_MSI
bff60792 23 select ARM_PSCI_FW
adace895 24 select BUILDTIME_EXTABLE_SORT
db2789b5 25 select CLONE_BACKWARDS
7ca2ef33 26 select COMMON_CLK
166936ba 27 select CPU_PM if (SUSPEND || CPU_IDLE)
7bc13fd3 28 select DCACHE_WORD_ACCESS
ef37566c 29 select EDAC_SUPPORT
d4932f9e 30 select GENERIC_ALLOCATOR
8c2c3df3 31 select GENERIC_CLOCKEVENTS
4b3dc967 32 select GENERIC_CLOCKEVENTS_BROADCAST
3be1a5c4 33 select GENERIC_CPU_AUTOPROBE
bf4b558e 34 select GENERIC_EARLY_IOREMAP
2314ee4d 35 select GENERIC_IDLE_POLL_SETUP
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36 select GENERIC_IRQ_PROBE
37 select GENERIC_IRQ_SHOW
6544e67b 38 select GENERIC_IRQ_SHOW_LEVEL
cb61f676 39 select GENERIC_PCI_IOMAP
65cd4f6c 40 select GENERIC_SCHED_CLOCK
8c2c3df3 41 select GENERIC_SMP_IDLE_THREAD
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42 select GENERIC_STRNCPY_FROM_USER
43 select GENERIC_STRNLEN_USER
8c2c3df3 44 select GENERIC_TIME_VSYSCALL
a1ddc74a 45 select HANDLE_DOMAIN_IRQ
8c2c3df3 46 select HARDIRQS_SW_RESEND
5284e1b4 47 select HAVE_ALIGNED_STRUCT_PAGE if SLUB
875cbf3e 48 select HAVE_ARCH_AUDITSYSCALL
8e7a4cef 49 select HAVE_ARCH_BITREVERSE
9732cafd 50 select HAVE_ARCH_JUMP_LABEL
9529247d 51 select HAVE_ARCH_KGDB
a1ae65b2 52 select HAVE_ARCH_SECCOMP_FILTER
8c2c3df3 53 select HAVE_ARCH_TRACEHOOK
e54bcde3 54 select HAVE_BPF_JIT
af64d2aa 55 select HAVE_C_RECORDMCOUNT
c0c264ae 56 select HAVE_CC_STACKPROTECTOR
5284e1b4 57 select HAVE_CMPXCHG_DOUBLE
95eff6b2 58 select HAVE_CMPXCHG_LOCAL
9b2a60c4 59 select HAVE_DEBUG_BUGVERBOSE
b69ec42b 60 select HAVE_DEBUG_KMEMLEAK
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61 select HAVE_DMA_API_DEBUG
62 select HAVE_DMA_ATTRS
6ac2104d 63 select HAVE_DMA_CONTIGUOUS
bd7d38db 64 select HAVE_DYNAMIC_FTRACE
50afc33a 65 select HAVE_EFFICIENT_UNALIGNED_ACCESS
af64d2aa 66 select HAVE_FTRACE_MCOUNT_RECORD
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67 select HAVE_FUNCTION_TRACER
68 select HAVE_FUNCTION_GRAPH_TRACER
8c2c3df3 69 select HAVE_GENERIC_DMA_COHERENT
8c2c3df3 70 select HAVE_HW_BREAKPOINT if PERF_EVENTS
8c2c3df3 71 select HAVE_MEMBLOCK
55834a77 72 select HAVE_PATA_PLATFORM
8c2c3df3 73 select HAVE_PERF_EVENTS
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74 select HAVE_PERF_REGS
75 select HAVE_PERF_USER_STACK_DUMP
5e5f6dc1 76 select HAVE_RCU_TABLE_FREE
055b1212 77 select HAVE_SYSCALL_TRACEPOINTS
8c2c3df3 78 select IRQ_DOMAIN
e8557d1f 79 select IRQ_FORCED_THREADING
fea2acaa 80 select MODULES_USE_ELF_RELA
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81 select NO_BOOTMEM
82 select OF
83 select OF_EARLY_FLATTREE
9bf14b7c 84 select OF_RESERVED_MEM
8c2c3df3 85 select PERF_USE_VMALLOC
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86 select POWER_RESET
87 select POWER_SUPPLY
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88 select RTC_LIB
89 select SPARSE_IRQ
7ac57a89 90 select SYSCTL_EXCEPTION_TRACE
6c81fe79 91 select HAVE_CONTEXT_TRACKING
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92 help
93 ARM 64-bit (AArch64) Linux support.
94
95config 64BIT
96 def_bool y
97
98config ARCH_PHYS_ADDR_T_64BIT
99 def_bool y
100
101config MMU
102 def_bool y
103
ce816fa8 104config NO_IOPORT_MAP
d1e6dc91 105 def_bool y if !PCI
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106
107config STACKTRACE_SUPPORT
108 def_bool y
109
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110config ILLEGAL_POINTER_VALUE
111 hex
112 default 0xdead000000000000
113
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114config LOCKDEP_SUPPORT
115 def_bool y
116
117config TRACE_IRQFLAGS_SUPPORT
118 def_bool y
119
c209f799 120config RWSEM_XCHGADD_ALGORITHM
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121 def_bool y
122
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123config GENERIC_BUG
124 def_bool y
125 depends on BUG
126
127config GENERIC_BUG_RELATIVE_POINTERS
128 def_bool y
129 depends on GENERIC_BUG
130
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131config GENERIC_HWEIGHT
132 def_bool y
133
134config GENERIC_CSUM
135 def_bool y
136
137config GENERIC_CALIBRATE_DELAY
138 def_bool y
139
19e7640d 140config ZONE_DMA
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141 def_bool y
142
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143config HAVE_GENERIC_RCU_GUP
144 def_bool y
145
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146config ARCH_DMA_ADDR_T_64BIT
147 def_bool y
148
149config NEED_DMA_MAP_STATE
150 def_bool y
151
152config NEED_SG_DMA_LENGTH
153 def_bool y
154
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155config SMP
156 def_bool y
157
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158config SWIOTLB
159 def_bool y
160
161config IOMMU_HELPER
162 def_bool SWIOTLB
163
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164config KERNEL_MODE_NEON
165 def_bool y
166
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167config FIX_EARLYCON_MEM
168 def_bool y
169
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170config PGTABLE_LEVELS
171 int
172 default 2 if ARM64_64K_PAGES && ARM64_VA_BITS_42
173 default 3 if ARM64_64K_PAGES && ARM64_VA_BITS_48
174 default 3 if ARM64_4K_PAGES && ARM64_VA_BITS_39
175 default 4 if ARM64_4K_PAGES && ARM64_VA_BITS_48
176
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177source "init/Kconfig"
178
179source "kernel/Kconfig.freezer"
180
6a377491 181source "arch/arm64/Kconfig.platforms"
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182
183menu "Bus support"
184
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185config PCI
186 bool "PCI support"
187 help
188 This feature enables support for PCI bus system. If you say Y
189 here, the kernel will include drivers and infrastructure code
190 to support PCI bus devices.
191
192config PCI_DOMAINS
193 def_bool PCI
194
195config PCI_DOMAINS_GENERIC
196 def_bool PCI
197
198config PCI_SYSCALL
199 def_bool PCI
200
201source "drivers/pci/Kconfig"
202source "drivers/pci/pcie/Kconfig"
203source "drivers/pci/hotplug/Kconfig"
204
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205endmenu
206
207menu "Kernel Features"
208
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209menu "ARM errata workarounds via the alternatives framework"
210
211config ARM64_ERRATUM_826319
212 bool "Cortex-A53: 826319: System might deadlock if a write cannot complete until read data is accepted"
213 default y
214 help
215 This option adds an alternative code sequence to work around ARM
216 erratum 826319 on Cortex-A53 parts up to r0p2 with an AMBA 4 ACE or
217 AXI master interface and an L2 cache.
218
219 If a Cortex-A53 uses an AMBA AXI4 ACE interface to other processors
220 and is unable to accept a certain write via this interface, it will
221 not progress on read data presented on the read data channel and the
222 system can deadlock.
223
224 The workaround promotes data cache clean instructions to
225 data cache clean-and-invalidate.
226 Please note that this does not necessarily enable the workaround,
227 as it depends on the alternative framework, which will only patch
228 the kernel if an affected CPU is detected.
229
230 If unsure, say Y.
231
232config ARM64_ERRATUM_827319
233 bool "Cortex-A53: 827319: Data cache clean instructions might cause overlapping transactions to the interconnect"
234 default y
235 help
236 This option adds an alternative code sequence to work around ARM
237 erratum 827319 on Cortex-A53 parts up to r0p2 with an AMBA 5 CHI
238 master interface and an L2 cache.
239
240 Under certain conditions this erratum can cause a clean line eviction
241 to occur at the same time as another transaction to the same address
242 on the AMBA 5 CHI interface, which can cause data corruption if the
243 interconnect reorders the two transactions.
244
245 The workaround promotes data cache clean instructions to
246 data cache clean-and-invalidate.
247 Please note that this does not necessarily enable the workaround,
248 as it depends on the alternative framework, which will only patch
249 the kernel if an affected CPU is detected.
250
251 If unsure, say Y.
252
253config ARM64_ERRATUM_824069
254 bool "Cortex-A53: 824069: Cache line might not be marked as clean after a CleanShared snoop"
255 default y
256 help
257 This option adds an alternative code sequence to work around ARM
258 erratum 824069 on Cortex-A53 parts up to r0p2 when it is connected
259 to a coherent interconnect.
260
261 If a Cortex-A53 processor is executing a store or prefetch for
262 write instruction at the same time as a processor in another
263 cluster is executing a cache maintenance operation to the same
264 address, then this erratum might cause a clean cache line to be
265 incorrectly marked as dirty.
266
267 The workaround promotes data cache clean instructions to
268 data cache clean-and-invalidate.
269 Please note that this option does not necessarily enable the
270 workaround, as it depends on the alternative framework, which will
271 only patch the kernel if an affected CPU is detected.
272
273 If unsure, say Y.
274
275config ARM64_ERRATUM_819472
276 bool "Cortex-A53: 819472: Store exclusive instructions might cause data corruption"
277 default y
278 help
279 This option adds an alternative code sequence to work around ARM
280 erratum 819472 on Cortex-A53 parts up to r0p1 with an L2 cache
281 present when it is connected to a coherent interconnect.
282
283 If the processor is executing a load and store exclusive sequence at
284 the same time as a processor in another cluster is executing a cache
285 maintenance operation to the same address, then this erratum might
286 cause data corruption.
287
288 The workaround promotes data cache clean instructions to
289 data cache clean-and-invalidate.
290 Please note that this does not necessarily enable the workaround,
291 as it depends on the alternative framework, which will only patch
292 the kernel if an affected CPU is detected.
293
294 If unsure, say Y.
295
296config ARM64_ERRATUM_832075
297 bool "Cortex-A57: 832075: possible deadlock on mixing exclusive memory accesses with device loads"
298 default y
299 help
300 This option adds an alternative code sequence to work around ARM
301 erratum 832075 on Cortex-A57 parts up to r1p2.
302
303 Affected Cortex-A57 parts might deadlock when exclusive load/store
304 instructions to Write-Back memory are mixed with Device loads.
305
306 The workaround is to promote device loads to use Load-Acquire
307 semantics.
308 Please note that this does not necessarily enable the workaround,
309 as it depends on the alternative framework, which will only patch
310 the kernel if an affected CPU is detected.
311
312 If unsure, say Y.
313
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314config ARM64_ERRATUM_845719
315 bool "Cortex-A53: 845719: a load might read incorrect data"
316 depends on COMPAT
317 default y
318 help
319 This option adds an alternative code sequence to work around ARM
320 erratum 845719 on Cortex-A53 parts up to r0p4.
321
322 When running a compat (AArch32) userspace on an affected Cortex-A53
323 part, a load at EL0 from a virtual address that matches the bottom 32
324 bits of the virtual address used by a recent load at (AArch64) EL1
325 might return incorrect data.
326
327 The workaround is to write the contextidr_el1 register on exception
328 return to a 32-bit task.
329 Please note that this does not necessarily enable the workaround,
330 as it depends on the alternative framework, which will only patch
331 the kernel if an affected CPU is detected.
332
333 If unsure, say Y.
334
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335config ARM64_ERRATUM_843419
336 bool "Cortex-A53: 843419: A load or store might access an incorrect address"
337 depends on MODULES
338 default y
339 help
340 This option builds kernel modules using the large memory model in
341 order to avoid the use of the ADRP instruction, which can cause
342 a subsequent memory access to use an incorrect address on Cortex-A53
343 parts up to r0p4.
344
345 Note that the kernel itself must be linked with a version of ld
346 which fixes potentially affected ADRP instructions through the
347 use of veneers.
348
349 If unsure, say Y.
350
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351endmenu
352
353
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354choice
355 prompt "Page size"
356 default ARM64_4K_PAGES
357 help
358 Page size (translation granule) configuration.
359
360config ARM64_4K_PAGES
361 bool "4KB"
362 help
363 This feature enables 4KB pages support.
364
8c2c3df3 365config ARM64_64K_PAGES
e41ceed0 366 bool "64KB"
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367 help
368 This feature enables 64KB pages support (4KB by default)
369 allowing only two levels of page tables and faster TLB
370 look-up. AArch32 emulation is not available when this feature
371 is enabled.
372
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373endchoice
374
375choice
376 prompt "Virtual address space size"
377 default ARM64_VA_BITS_39 if ARM64_4K_PAGES
378 default ARM64_VA_BITS_42 if ARM64_64K_PAGES
379 help
380 Allows choosing one of multiple possible virtual address
381 space sizes. The level of translation table is determined by
382 a combination of page size and virtual address space size.
383
384config ARM64_VA_BITS_39
385 bool "39-bit"
386 depends on ARM64_4K_PAGES
387
388config ARM64_VA_BITS_42
389 bool "42-bit"
390 depends on ARM64_64K_PAGES
391
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392config ARM64_VA_BITS_48
393 bool "48-bit"
c79b954b 394
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395endchoice
396
397config ARM64_VA_BITS
398 int
399 default 39 if ARM64_VA_BITS_39
400 default 42 if ARM64_VA_BITS_42
c79b954b 401 default 48 if ARM64_VA_BITS_48
e41ceed0 402
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403config CPU_BIG_ENDIAN
404 bool "Build big-endian kernel"
405 help
406 Say Y if you plan on running a kernel in big-endian mode.
407
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408config SCHED_MC
409 bool "Multi-core scheduler support"
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410 help
411 Multi-core scheduler support improves the CPU scheduler's decision
412 making when dealing with multi-core CPU chips at a cost of slightly
413 increased overhead in some places. If unsure say N here.
414
415config SCHED_SMT
416 bool "SMT scheduler support"
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417 help
418 Improves the CPU scheduler's decision making when dealing with
419 MultiThreading at a cost of slightly increased overhead in some
420 places. If unsure say N here.
421
8c2c3df3 422config NR_CPUS
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423 int "Maximum number of CPUs (2-4096)"
424 range 2 4096
15942853 425 # These have to remain sorted largest to smallest
e3672649 426 default "64"
8c2c3df3 427
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428config HOTPLUG_CPU
429 bool "Support for hot-pluggable CPUs"
217d453d 430 select GENERIC_IRQ_MIGRATION
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431 help
432 Say Y here to experiment with turning CPUs off and on. CPUs
433 can be controlled through /sys/devices/system/cpu.
434
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435source kernel/Kconfig.preempt
436
437config HZ
438 int
439 default 100
440
441config ARCH_HAS_HOLES_MEMORYMODEL
442 def_bool y if SPARSEMEM
443
444config ARCH_SPARSEMEM_ENABLE
445 def_bool y
446 select SPARSEMEM_VMEMMAP_ENABLE
447
448config ARCH_SPARSEMEM_DEFAULT
449 def_bool ARCH_SPARSEMEM_ENABLE
450
451config ARCH_SELECT_MEMORY_MODEL
452 def_bool ARCH_SPARSEMEM_ENABLE
453
454config HAVE_ARCH_PFN_VALID
455 def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM
456
457config HW_PERF_EVENTS
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458 def_bool y
459 depends on ARM_PMU
8c2c3df3 460
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461config SYS_SUPPORTS_HUGETLBFS
462 def_bool y
463
464config ARCH_WANT_GENERAL_HUGETLB
465 def_bool y
466
467config ARCH_WANT_HUGE_PMD_SHARE
468 def_bool y if !ARM64_64K_PAGES
469
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470config HAVE_ARCH_TRANSPARENT_HUGEPAGE
471 def_bool y
472
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473config ARCH_HAS_CACHE_LINE_SIZE
474 def_bool y
475
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476source "mm/Kconfig"
477
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478config SECCOMP
479 bool "Enable seccomp to safely compute untrusted bytecode"
480 ---help---
481 This kernel feature is useful for number crunching applications
482 that may need to compute untrusted bytecode during their
483 execution. By using pipes or other transports made available to
484 the process as file descriptors supporting the read/write
485 syscalls, it's possible to isolate those applications in
486 their own address space using seccomp. Once seccomp is
487 enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
488 and the task is only allowed to execute a few safe syscalls
489 defined by each seccomp mode.
490
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491config XEN_DOM0
492 def_bool y
493 depends on XEN
494
495config XEN
c2ba1f7d 496 bool "Xen guest support on ARM64"
aa42aa13 497 depends on ARM64 && OF
83862ccf 498 select SWIOTLB_XEN
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499 help
500 Say Y if you want to run Linux in a Virtual Machine on Xen on ARM64.
501
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502config FORCE_MAX_ZONEORDER
503 int
504 default "14" if (ARM64_64K_PAGES && TRANSPARENT_HUGEPAGE)
505 default "11"
506
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507menuconfig ARMV8_DEPRECATED
508 bool "Emulate deprecated/obsolete ARMv8 instructions"
509 depends on COMPAT
510 help
511 Legacy software support may require certain instructions
512 that have been deprecated or obsoleted in the architecture.
513
514 Enable this config to enable selective emulation of these
515 features.
516
517 If unsure, say Y
518
519if ARMV8_DEPRECATED
520
521config SWP_EMULATION
522 bool "Emulate SWP/SWPB instructions"
523 help
524 ARMv8 obsoletes the use of A32 SWP/SWPB instructions such that
525 they are always undefined. Say Y here to enable software
526 emulation of these instructions for userspace using LDXR/STXR.
527
528 In some older versions of glibc [<=2.8] SWP is used during futex
529 trylock() operations with the assumption that the code will not
530 be preempted. This invalid assumption may be more likely to fail
531 with SWP emulation enabled, leading to deadlock of the user
532 application.
533
534 NOTE: when accessing uncached shared regions, LDXR/STXR rely
535 on an external transaction monitoring block called a global
536 monitor to maintain update atomicity. If your system does not
537 implement a global monitor, this option can cause programs that
538 perform SWP operations to uncached memory to deadlock.
539
540 If unsure, say Y
541
542config CP15_BARRIER_EMULATION
543 bool "Emulate CP15 Barrier instructions"
544 help
545 The CP15 barrier instructions - CP15ISB, CP15DSB, and
546 CP15DMB - are deprecated in ARMv8 (and ARMv7). It is
547 strongly recommended to use the ISB, DSB, and DMB
548 instructions instead.
549
550 Say Y here to enable software emulation of these
551 instructions for AArch32 userspace code. When this option is
552 enabled, CP15 barrier usage is traced which can help
553 identify software that needs updating.
554
555 If unsure, say Y
556
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557config SETEND_EMULATION
558 bool "Emulate SETEND instruction"
559 help
560 The SETEND instruction alters the data-endianness of the
561 AArch32 EL0, and is deprecated in ARMv8.
562
563 Say Y here to enable software emulation of the instruction
564 for AArch32 userspace code.
565
566 Note: All the cpus on the system must have mixed endian support at EL0
567 for this feature to be enabled. If a new CPU - which doesn't support mixed
568 endian - is hotplugged in after this feature has been enabled, there could
569 be unexpected results in the applications.
570
571 If unsure, say Y
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572endif
573
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574menu "ARMv8.1 architectural features"
575
576config ARM64_HW_AFDBM
577 bool "Support for hardware updates of the Access and Dirty page flags"
578 default y
579 help
580 The ARMv8.1 architecture extensions introduce support for
581 hardware updates of the access and dirty information in page
582 table entries. When enabled in TCR_EL1 (HA and HD bits) on
583 capable processors, accesses to pages with PTE_AF cleared will
584 set this bit instead of raising an access flag fault.
585 Similarly, writes to read-only pages with the DBM bit set will
586 clear the read-only bit (AP[2]) instead of raising a
587 permission fault.
588
589 Kernels built with this configuration option enabled continue
590 to work on pre-ARMv8.1 hardware and the performance impact is
591 minimal. If unsure, say Y.
592
593config ARM64_PAN
594 bool "Enable support for Privileged Access Never (PAN)"
595 default y
596 help
597 Privileged Access Never (PAN; part of the ARMv8.1 Extensions)
598 prevents the kernel or hypervisor from accessing user-space (EL0)
599 memory directly.
600
601 Choosing this option will cause any unprotected (not using
602 copy_to_user et al) memory access to fail with a permission fault.
603
604 The feature is detected at runtime, and will remain as a 'nop'
605 instruction if the cpu does not implement the feature.
606
607config ARM64_LSE_ATOMICS
608 bool "Atomic instructions"
609 help
610 As part of the Large System Extensions, ARMv8.1 introduces new
611 atomic instructions that are designed specifically to scale in
612 very large systems.
613
614 Say Y here to make use of these instructions for the in-kernel
615 atomic routines. This incurs a small overhead on CPUs that do
616 not support these instructions and requires the kernel to be
617 built with binutils >= 2.25.
618
619endmenu
620
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621endmenu
622
623menu "Boot options"
624
625config CMDLINE
626 string "Default kernel command string"
627 default ""
628 help
629 Provide a set of default command-line options at build time by
630 entering them here. As a minimum, you should specify the the
631 root device (e.g. root=/dev/nfs).
632
633config CMDLINE_FORCE
634 bool "Always use the default kernel command string"
635 help
636 Always use the default kernel command string, even if the boot
637 loader passes other arguments to the kernel.
638 This is useful if you cannot or don't want to change the
639 command-line options your boot loader passes to the kernel.
640
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641config EFI_STUB
642 bool
643
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644config EFI
645 bool "UEFI runtime support"
646 depends on OF && !CPU_BIG_ENDIAN
647 select LIBFDT
648 select UCS2_STRING
649 select EFI_PARAMS_FROM_FDT
e15dd494 650 select EFI_RUNTIME_WRAPPERS
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651 select EFI_STUB
652 select EFI_ARMSTUB
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653 default y
654 help
655 This option provides support for runtime services provided
656 by UEFI firmware (such as non-volatile variables, realtime
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657 clock, and platform reset). A UEFI stub is also provided to
658 allow the kernel to be booted as an EFI application. This
659 is only useful on systems that have UEFI firmware.
f84d0275 660
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661config DMI
662 bool "Enable support for SMBIOS (DMI) tables"
663 depends on EFI
664 default y
665 help
666 This enables SMBIOS/DMI feature for systems.
667
668 This option is only useful on systems that have UEFI firmware.
669 However, even with this option, the resultant kernel should
670 continue to boot on existing non-UEFI platforms.
671
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672endmenu
673
674menu "Userspace binary formats"
675
676source "fs/Kconfig.binfmt"
677
678config COMPAT
679 bool "Kernel support for 32-bit EL0"
a8fcd8b1 680 depends on !ARM64_64K_PAGES || EXPERT
8c2c3df3 681 select COMPAT_BINFMT_ELF
af1839eb 682 select HAVE_UID16
84b9e9b4 683 select OLD_SIGSUSPEND3
51682036 684 select COMPAT_OLD_SIGACTION
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685 help
686 This option enables support for a 32-bit EL0 running under a 64-bit
687 kernel at EL1. AArch32-specific components such as system calls,
688 the user helper functions, VFP support and the ptrace interface are
689 handled appropriately by the kernel.
690
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691 If you also enabled CONFIG_ARM64_64K_PAGES, please be aware that you
692 will only be able to execute AArch32 binaries that were compiled with
693 64k aligned segments.
694
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695 If you want to execute 32-bit userspace applications, say Y.
696
697config SYSVIPC_COMPAT
698 def_bool y
699 depends on COMPAT && SYSVIPC
700
701endmenu
702
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703menu "Power management options"
704
705source "kernel/power/Kconfig"
706
707config ARCH_SUSPEND_POSSIBLE
708 def_bool y
709
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710endmenu
711
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712menu "CPU Power Management"
713
714source "drivers/cpuidle/Kconfig"
715
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716source "drivers/cpufreq/Kconfig"
717
718endmenu
719
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720source "net/Kconfig"
721
722source "drivers/Kconfig"
723
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724source "drivers/firmware/Kconfig"
725
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726source "drivers/acpi/Kconfig"
727
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728source "fs/Kconfig"
729
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730source "arch/arm64/kvm/Kconfig"
731
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732source "arch/arm64/Kconfig.debug"
733
734source "security/Kconfig"
735
736source "crypto/Kconfig"
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737if CRYPTO
738source "arch/arm64/crypto/Kconfig"
739endif
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740
741source "lib/Kconfig"