[mirror_ubuntu-disco-kernel.git] / arch / m32r / platforms / mappi / setup.c

// SPDX-License-Identifier: GPL-2.0
/*
 *  linux/arch/m32r/platforms/mappi/setup.c
 *
 *  Setup routines for Renesas MAPPI Board
 *
 *  Copyright (c) 2001-2005  Hiroyuki Kondo, Hirokazu Takata,
 *                           Hitoshi Yamamoto
 */

#include <linux/irq.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>

#include <asm/m32r.h>
#include <asm/io.h>

#define irq2port(x) (M32R_ICU_CR1_PORTL + ((x - 1) * sizeof(unsigned long)))

icu_data_t icu_data[NR_IRQS];

static void disable_mappi_irq(unsigned int irq)
{
	unsigned long port, data;

	port = irq2port(irq);
	data = icu_data[irq].icucr|M32R_ICUCR_ILEVEL7;
	outl(data, port);
}

static void enable_mappi_irq(unsigned int irq)
{
	unsigned long port, data;

	port = irq2port(irq);
	data = icu_data[irq].icucr|M32R_ICUCR_IEN|M32R_ICUCR_ILEVEL6;
	outl(data, port);
}

static void mask_mappi(struct irq_data *data)
{
	disable_mappi_irq(data->irq);
}

static void unmask_mappi(struct irq_data *data)
{
	enable_mappi_irq(data->irq);
}

static void shutdown_mappi(struct irq_data *data)
{
	unsigned long port;

	port = irq2port(data->irq);
	outl(M32R_ICUCR_ILEVEL7, port);
}

static struct irq_chip mappi_irq_type =
{
	.name		= "MAPPI-IRQ",
	.irq_shutdown	= shutdown_mappi,
	.irq_mask	= mask_mappi,
	.irq_unmask	= unmask_mappi,
};

void __init init_IRQ(void)
{
	static int once = 0;

	if (once)
		return;
	else
		once++;

#ifdef CONFIG_NE2000
	/* INT0 : LAN controller (RTL8019AS) */
	irq_set_chip_and_handler(M32R_IRQ_INT0, &mappi_irq_type,
				 handle_level_irq);
	icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD11;
	disable_mappi_irq(M32R_IRQ_INT0);
#endif /* CONFIG_M32R_NE2000 */

	/* MFT2 : system timer */
	irq_set_chip_and_handler(M32R_IRQ_MFT2, &mappi_irq_type,
				 handle_level_irq);
	icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
	disable_mappi_irq(M32R_IRQ_MFT2);

#ifdef CONFIG_SERIAL_M32R_SIO
	/* SIO0_R : uart receive data */
	irq_set_chip_and_handler(M32R_IRQ_SIO0_R, &mappi_irq_type,
				 handle_level_irq);
	icu_data[M32R_IRQ_SIO0_R].icucr = 0;
	disable_mappi_irq(M32R_IRQ_SIO0_R);

	/* SIO0_S : uart send data */
	irq_set_chip_and_handler(M32R_IRQ_SIO0_S, &mappi_irq_type,
				 handle_level_irq);
	icu_data[M32R_IRQ_SIO0_S].icucr = 0;
	disable_mappi_irq(M32R_IRQ_SIO0_S);

	/* SIO1_R : uart receive data */
	irq_set_chip_and_handler(M32R_IRQ_SIO1_R, &mappi_irq_type,
				 handle_level_irq);
	icu_data[M32R_IRQ_SIO1_R].icucr = 0;
	disable_mappi_irq(M32R_IRQ_SIO1_R);

	/* SIO1_S : uart send data */
	irq_set_chip_and_handler(M32R_IRQ_SIO1_S, &mappi_irq_type,
				 handle_level_irq);
	icu_data[M32R_IRQ_SIO1_S].icucr = 0;
	disable_mappi_irq(M32R_IRQ_SIO1_S);
#endif /* CONFIG_SERIAL_M32R_SIO */

#if defined(CONFIG_M32R_PCC)
	/* INT1 : pccard0 interrupt */
	irq_set_chip_and_handler(M32R_IRQ_INT1, &mappi_irq_type,
				 handle_level_irq);
	icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD00;
	disable_mappi_irq(M32R_IRQ_INT1);

	/* INT2 : pccard1 interrupt */
	irq_set_chip_and_handler(M32R_IRQ_INT2, &mappi_irq_type,
				 handle_level_irq);
	icu_data[M32R_IRQ_INT2].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD00;
	disable_mappi_irq(M32R_IRQ_INT2);
#endif /* CONFIG_M32RPCC */
}

#if defined(CONFIG_FB_S1D13XXX)

#include <video/s1d13xxxfb.h>
#include <asm/s1d13806.h>

static struct s1d13xxxfb_pdata s1d13xxxfb_data = {
	.initregs		= s1d13xxxfb_initregs,
	.initregssize		= ARRAY_SIZE(s1d13xxxfb_initregs),
	.platform_init_video	= NULL,
#ifdef CONFIG_PM
	.platform_suspend_video	= NULL,
	.platform_resume_video	= NULL,
#endif
};

static struct resource s1d13xxxfb_resources[] = {
	[0] = {
		.start  = 0x10200000UL,
		.end    = 0x1033FFFFUL,
		.flags  = IORESOURCE_MEM,
	},
	[1] = {
		.start  = 0x10000000UL,
		.end    = 0x100001FFUL,
		.flags  = IORESOURCE_MEM,
	}
};

static struct platform_device s1d13xxxfb_device = {
	.name		= S1D_DEVICENAME,
	.id		= 0,
	.dev            = {
		.platform_data  = &s1d13xxxfb_data,
	},
	.num_resources  = ARRAY_SIZE(s1d13xxxfb_resources),
	.resource       = s1d13xxxfb_resources,
};

static int __init platform_init(void)
{
	platform_device_register(&s1d13xxxfb_device);
	return 0;
}
arch_initcall(platform_init);
#endif
Commit	Line	Data
b2441318	1	// SPDX-License-Identifier: GPL-2.0
1da177e4	2	/*
3264f976	3	* linux/arch/m32r/platforms/mappi/setup.c
1da177e4 LT	4	*
	5	* Setup routines for Renesas MAPPI Board
	6	*
316240f6 HT	7	* Copyright (c) 2001-2005 Hiroyuki Kondo, Hirokazu Takata,
316240f6 HT	8	* Hitoshi Yamamoto
1da177e4 LT	9	*/
1da177e4 LT	10
1da177e4 LT	11	#include <linux/irq.h>
	12	#include <linux/kernel.h>
	13	#include <linux/init.h>
d052d1be	14	#include <linux/platform_device.h>
1da177e4	15
1da177e4 LT	16	#include <asm/m32r.h>
	17	#include <asm/io.h>
	18
	19	#define irq2port(x) (M32R_ICU_CR1_PORTL + ((x - 1) * sizeof(unsigned long)))
	20
1da177e4 LT	21	icu_data_t icu_data[NR_IRQS];
	22
	23	static void disable_mappi_irq(unsigned int irq)
	24	{
	25	unsigned long port, data;
	26
	27	port = irq2port(irq);
	28	data = icu_data[irq].icucr\|M32R_ICUCR_ILEVEL7;
	29	outl(data, port);
	30	}
	31
	32	static void enable_mappi_irq(unsigned int irq)
	33	{
	34	unsigned long port, data;
	35
	36	port = irq2port(irq);
	37	data = icu_data[irq].icucr\|M32R_ICUCR_IEN\|M32R_ICUCR_ILEVEL6;
	38	outl(data, port);
	39	}
	40
1f12681a	41	static void mask_mappi(struct irq_data *data)
1da177e4	42	{
1f12681a	43	disable_mappi_irq(data->irq);
1da177e4 LT	44	}
1da177e4 LT	45
1f12681a	46	static void unmask_mappi(struct irq_data *data)
1da177e4	47	{
1f12681a	48	enable_mappi_irq(data->irq);
1da177e4 LT	49	}
1da177e4 LT	50
1f12681a	51	static void shutdown_mappi(struct irq_data *data)
1da177e4 LT	52	{
	53	unsigned long port;
	54
1f12681a	55	port = irq2port(data->irq);
1da177e4 LT	56	outl(M32R_ICUCR_ILEVEL7, port);
	57	}
	58
189e91f5	59	static struct irq_chip mappi_irq_type =
1da177e4	60	{
1f12681a TG	61	.name = "MAPPI-IRQ",
	62	.irq_shutdown = shutdown_mappi,
	63	.irq_mask = mask_mappi,
	64	.irq_unmask = unmask_mappi,
1da177e4 LT	65	};
	66
	67	void __init init_IRQ(void)
	68	{
	69	static int once = 0;
	70
	71	if (once)
	72	return;
	73	else
	74	once++;
	75
	76	#ifdef CONFIG_NE2000
	77	/* INT0 : LAN controller (RTL8019AS) */
27e5c5a9	78	irq_set_chip_and_handler(M32R_IRQ_INT0, &mappi_irq_type,
1f12681a	79	handle_level_irq);
4fc09385	80	icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN\|M32R_ICUCR_ISMOD11;
1da177e4 LT	81	disable_mappi_irq(M32R_IRQ_INT0);
	82	#endif /* CONFIG_M32R_NE2000 */
	83
	84	/* MFT2 : system timer */
27e5c5a9	85	irq_set_chip_and_handler(M32R_IRQ_MFT2, &mappi_irq_type,
1f12681a	86	handle_level_irq);
1da177e4 LT	87	icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
	88	disable_mappi_irq(M32R_IRQ_MFT2);
	89
	90	#ifdef CONFIG_SERIAL_M32R_SIO
	91	/* SIO0_R : uart receive data */
27e5c5a9	92	irq_set_chip_and_handler(M32R_IRQ_SIO0_R, &mappi_irq_type,
1f12681a	93	handle_level_irq);
1da177e4 LT	94	icu_data[M32R_IRQ_SIO0_R].icucr = 0;
	95	disable_mappi_irq(M32R_IRQ_SIO0_R);
	96
	97	/* SIO0_S : uart send data */
27e5c5a9	98	irq_set_chip_and_handler(M32R_IRQ_SIO0_S, &mappi_irq_type,
1f12681a	99	handle_level_irq);
1da177e4 LT	100	icu_data[M32R_IRQ_SIO0_S].icucr = 0;
	101	disable_mappi_irq(M32R_IRQ_SIO0_S);
	102
	103	/* SIO1_R : uart receive data */
27e5c5a9	104	irq_set_chip_and_handler(M32R_IRQ_SIO1_R, &mappi_irq_type,
1f12681a	105	handle_level_irq);
1da177e4 LT	106	icu_data[M32R_IRQ_SIO1_R].icucr = 0;
	107	disable_mappi_irq(M32R_IRQ_SIO1_R);
	108
	109	/* SIO1_S : uart send data */
27e5c5a9	110	irq_set_chip_and_handler(M32R_IRQ_SIO1_S, &mappi_irq_type,
1f12681a	111	handle_level_irq);
1da177e4 LT	112	icu_data[M32R_IRQ_SIO1_S].icucr = 0;
	113	disable_mappi_irq(M32R_IRQ_SIO1_S);
	114	#endif /* CONFIG_SERIAL_M32R_SIO */
	115
	116	#if defined(CONFIG_M32R_PCC)
	117	/* INT1 : pccard0 interrupt */
27e5c5a9	118	irq_set_chip_and_handler(M32R_IRQ_INT1, &mappi_irq_type,
1f12681a	119	handle_level_irq);
1da177e4 LT	120	icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_IEN \| M32R_ICUCR_ISMOD00;
	121	disable_mappi_irq(M32R_IRQ_INT1);
	122
	123	/* INT2 : pccard1 interrupt */
27e5c5a9	124	irq_set_chip_and_handler(M32R_IRQ_INT2, &mappi_irq_type,
1f12681a	125	handle_level_irq);
1da177e4 LT	126	icu_data[M32R_IRQ_INT2].icucr = M32R_ICUCR_IEN \| M32R_ICUCR_ISMOD00;
	127	disable_mappi_irq(M32R_IRQ_INT2);
	128	#endif /* CONFIG_M32RPCC */
	129	}
316240f6 HT	130
	131	#if defined(CONFIG_FB_S1D13XXX)
	132
	133	#include <video/s1d13xxxfb.h>
	134	#include <asm/s1d13806.h>
	135
	136	static struct s1d13xxxfb_pdata s1d13xxxfb_data = {
	137	.initregs = s1d13xxxfb_initregs,
	138	.initregssize = ARRAY_SIZE(s1d13xxxfb_initregs),
	139	.platform_init_video = NULL,
	140	#ifdef CONFIG_PM
	141	.platform_suspend_video = NULL,
	142	.platform_resume_video = NULL,
	143	#endif
	144	};
	145
	146	static struct resource s1d13xxxfb_resources[] = {
	147	[0] = {
	148	.start = 0x10200000UL,
	149	.end = 0x1033FFFFUL,
	150	.flags = IORESOURCE_MEM,
	151	},
	152	[1] = {
	153	.start = 0x10000000UL,
	154	.end = 0x100001FFUL,
	155	.flags = IORESOURCE_MEM,
	156	}
	157	};
	158
	159	static struct platform_device s1d13xxxfb_device = {
	160	.name = S1D_DEVICENAME,
	161	.id = 0,
	162	.dev = {
	163	.platform_data = &s1d13xxxfb_data,
	164	},
	165	.num_resources = ARRAY_SIZE(s1d13xxxfb_resources),
	166	.resource = s1d13xxxfb_resources,
	167	};
	168
	169	static int __init platform_init(void)
	170	{
	171	platform_device_register(&s1d13xxxfb_device);
	172	return 0;
	173	}
	174	arch_initcall(platform_init);
	175	#endif