[mirror_ubuntu-disco-kernel.git] / arch / m68k / mac / macints.c

// SPDX-License-Identifier: GPL-2.0
/*
 *	Macintosh interrupts
 *
 * General design:
 * In contrary to the Amiga and Atari platforms, the Mac hardware seems to
 * exclusively use the autovector interrupts (the 'generic level0-level7'
 * interrupts with exception vectors 0x19-0x1f). The following interrupt levels
 * are used:
 *	1	- VIA1
 *		  - slot 0: one second interrupt (CA2)
 *		  - slot 1: VBlank (CA1)
 *		  - slot 2: ADB data ready (SR full)
 *		  - slot 3: ADB data  (CB2)
 *		  - slot 4: ADB clock (CB1)
 *		  - slot 5: timer 2
 *		  - slot 6: timer 1
 *		  - slot 7: status of IRQ; signals 'any enabled int.'
 *
 *	2	- VIA2 or RBV
 *		  - slot 0: SCSI DRQ (CA2)
 *		  - slot 1: NUBUS IRQ (CA1) need to read port A to find which
 *		  - slot 2: /EXP IRQ (only on IIci)
 *		  - slot 3: SCSI IRQ (CB2)
 *		  - slot 4: ASC IRQ (CB1)
 *		  - slot 5: timer 2 (not on IIci)
 *		  - slot 6: timer 1 (not on IIci)
 *		  - slot 7: status of IRQ; signals 'any enabled int.'
 *
 * Levels 3-6 vary by machine type. For VIA or RBV Macintoshes:
 *
 *	3	- unused (?)
 *
 *	4	- SCC
 *
 *	5	- unused (?)
 *		  [serial errors or special conditions seem to raise level 6
 *		  interrupts on some models (LC4xx?)]
 *
 *	6	- off switch (?)
 *
 * Machines with Quadra-like VIA hardware, except PSC and PMU machines, support
 * an alternate interrupt mapping, as used by A/UX. It spreads ethernet and
 * sound out to their own autovector IRQs and gives VIA1 a higher priority:
 *
 *	1	- unused (?)
 *
 *	3	- on-board SONIC
 *
 *	5	- Apple Sound Chip (ASC)
 *
 *	6	- VIA1
 *
 * For OSS Macintoshes (IIfx only), we apply an interrupt mapping similar to
 * the Quadra (A/UX) mapping:
 *
 *	1	- ISM IOP (ADB)
 *
 *	2	- SCSI
 *
 *	3	- NuBus
 *
 *	4	- SCC IOP
 *
 *	6	- VIA1
 *
 * For PSC Macintoshes (660AV, 840AV):
 *
 *	3	- PSC level 3
 *		  - slot 0: MACE
 *
 *	4	- PSC level 4
 *		  - slot 1: SCC channel A interrupt
 *		  - slot 2: SCC channel B interrupt
 *		  - slot 3: MACE DMA
 *
 *	5	- PSC level 5
 *
 *	6	- PSC level 6
 *
 * Finally we have good 'ole level 7, the non-maskable interrupt:
 *
 *	7	- NMI (programmer's switch on the back of some Macs)
 *		  Also RAM parity error on models which support it (IIc, IIfx?)
 *
 * The current interrupt logic looks something like this:
 *
 * - We install dispatchers for the autovector interrupts (1-7). These
 *   dispatchers are responsible for querying the hardware (the
 *   VIA/RBV/OSS/PSC chips) to determine the actual interrupt source. Using
 *   this information a machspec interrupt number is generated by placing the
 *   index of the interrupt hardware into the low three bits and the original
 *   autovector interrupt number in the upper 5 bits. The handlers for the
 *   resulting machspec interrupt are then called.
 *
 * - Nubus is a special case because its interrupts are hidden behind two
 *   layers of hardware. Nubus interrupts come in as index 1 on VIA #2,
 *   which translates to IRQ number 17. In this spot we install _another_
 *   dispatcher. This dispatcher finds the interrupting slot number (9-F) and
 *   then forms a new machspec interrupt number as above with the slot number
 *   minus 9 in the low three bits and the pseudo-level 7 in the upper five
 *   bits.  The handlers for this new machspec interrupt number are then
 *   called. This puts Nubus interrupts into the range 56-62.
 *
 * - The Baboon interrupts (used on some PowerBooks) are an even more special
 *   case. They're hidden behind the Nubus slot $C interrupt thus adding a
 *   third layer of indirection. Why oh why did the Apple engineers do that?
 *
 */

#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/sched/debug.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/delay.h>

#include <asm/irq.h>
#include <asm/macintosh.h>
#include <asm/macints.h>
#include <asm/mac_via.h>
#include <asm/mac_psc.h>
#include <asm/mac_oss.h>
#include <asm/mac_iop.h>
#include <asm/mac_baboon.h>
#include <asm/hwtest.h>
#include <asm/irq_regs.h>

extern void show_registers(struct pt_regs *);

irqreturn_t mac_nmi_handler(int, void *);

static unsigned int mac_irq_startup(struct irq_data *);
static void mac_irq_shutdown(struct irq_data *);

static struct irq_chip mac_irq_chip = {
	.name		= "mac",
	.irq_enable	= mac_irq_enable,
	.irq_disable	= mac_irq_disable,
	.irq_startup	= mac_irq_startup,
	.irq_shutdown	= mac_irq_shutdown,
};

void __init mac_init_IRQ(void)
{
	m68k_setup_irq_controller(&mac_irq_chip, handle_simple_irq, IRQ_USER,
				  NUM_MAC_SOURCES - IRQ_USER);

	/*
	 * Now register the handlers for the master IRQ handlers
	 * at levels 1-7. Most of the work is done elsewhere.
	 */

	if (oss_present)
		oss_register_interrupts();
	else
		via_register_interrupts();
	if (psc)
		psc_register_interrupts();
	if (baboon_present)
		baboon_register_interrupts();
	iop_register_interrupts();
	if (request_irq(IRQ_AUTO_7, mac_nmi_handler, 0, "NMI",
			mac_nmi_handler))
		pr_err("Couldn't register NMI\n");
}

/*
 *  mac_irq_enable - enable an interrupt source
 * mac_irq_disable - disable an interrupt source
 *
 * These routines are just dispatchers to the VIA/OSS/PSC routines.
 */

void mac_irq_enable(struct irq_data *data)
{
	int irq = data->irq;
	int irq_src = IRQ_SRC(irq);

	switch(irq_src) {
	case 1:
	case 2:
	case 7:
		if (oss_present)
			oss_irq_enable(irq);
		else
			via_irq_enable(irq);
		break;
	case 3:
	case 4:
	case 5:
	case 6:
		if (psc)
			psc_irq_enable(irq);
		else if (oss_present)
			oss_irq_enable(irq);
		break;
	case 8:
		if (baboon_present)
			baboon_irq_enable(irq);
		break;
	}
}

void mac_irq_disable(struct irq_data *data)
{
	int irq = data->irq;
	int irq_src = IRQ_SRC(irq);

	switch(irq_src) {
	case 1:
	case 2:
	case 7:
		if (oss_present)
			oss_irq_disable(irq);
		else
			via_irq_disable(irq);
		break;
	case 3:
	case 4:
	case 5:
	case 6:
		if (psc)
			psc_irq_disable(irq);
		else if (oss_present)
			oss_irq_disable(irq);
		break;
	case 8:
		if (baboon_present)
			baboon_irq_disable(irq);
		break;
	}
}

static unsigned int mac_irq_startup(struct irq_data *data)
{
	int irq = data->irq;

	if (IRQ_SRC(irq) == 7 && !oss_present)
		via_nubus_irq_startup(irq);
	else
		mac_irq_enable(data);

	return 0;
}

static void mac_irq_shutdown(struct irq_data *data)
{
	int irq = data->irq;

	if (IRQ_SRC(irq) == 7 && !oss_present)
		via_nubus_irq_shutdown(irq);
	else
		mac_irq_disable(data);
}

static volatile int in_nmi;

irqreturn_t mac_nmi_handler(int irq, void *dev_id)
{
	if (in_nmi)
		return IRQ_HANDLED;
	in_nmi = 1;

	pr_info("Non-Maskable Interrupt\n");
	show_registers(get_irq_regs());

	in_nmi = 0;
	return IRQ_HANDLED;
}
Commit	Line	Data
b2441318	1	// SPDX-License-Identifier: GPL-2.0
1da177e4 LT	2	/*
	3	* Macintosh interrupts
	4	*
	5	* General design:
	6	* In contrary to the Amiga and Atari platforms, the Mac hardware seems to
	7	* exclusively use the autovector interrupts (the 'generic level0-level7'
	8	* interrupts with exception vectors 0x19-0x1f). The following interrupt levels
	9	* are used:
	10	* 1 - VIA1
	11	* - slot 0: one second interrupt (CA2)
	12	* - slot 1: VBlank (CA1)
	13	* - slot 2: ADB data ready (SR full)
	14	* - slot 3: ADB data (CB2)
	15	* - slot 4: ADB clock (CB1)
	16	* - slot 5: timer 2
	17	* - slot 6: timer 1
	18	* - slot 7: status of IRQ; signals 'any enabled int.'
	19	*
	20	* 2 - VIA2 or RBV
	21	* - slot 0: SCSI DRQ (CA2)
	22	* - slot 1: NUBUS IRQ (CA1) need to read port A to find which
	23	* - slot 2: /EXP IRQ (only on IIci)
	24	* - slot 3: SCSI IRQ (CB2)
	25	* - slot 4: ASC IRQ (CB1)
	26	* - slot 5: timer 2 (not on IIci)
	27	* - slot 6: timer 1 (not on IIci)
	28	* - slot 7: status of IRQ; signals 'any enabled int.'
	29	*
1da177e4 LT	30	* Levels 3-6 vary by machine type. For VIA or RBV Macintoshes:
	31	*
	32	* 3 - unused (?)
	33	*
80614e5a	34	* 4 - SCC
1da177e4 LT	35	*
	36	* 5 - unused (?)
	37	* [serial errors or special conditions seem to raise level 6
	38	* interrupts on some models (LC4xx?)]
	39	*
	40	* 6 - off switch (?)
	41	*
8d9f014a FT	42	* Machines with Quadra-like VIA hardware, except PSC and PMU machines, support
	43	* an alternate interrupt mapping, as used by A/UX. It spreads ethernet and
	44	* sound out to their own autovector IRQs and gives VIA1 a higher priority:
	45	*
	46	* 1 - unused (?)
	47	*
	48	* 3 - on-board SONIC
	49	*
	50	* 5 - Apple Sound Chip (ASC)
	51	*
	52	* 6 - VIA1
	53	*
da3fb3c9 FT	54	* For OSS Macintoshes (IIfx only), we apply an interrupt mapping similar to
da3fb3c9 FT	55	* the Quadra (A/UX) mapping:
1da177e4	56	*
da3fb3c9	57	* 1 - ISM IOP (ADB)
1da177e4	58	*
da3fb3c9	59	* 2 - SCSI
1da177e4	60	*
da3fb3c9	61	* 3 - NuBus
1da177e4	62	*
da3fb3c9 FT	63	* 4 - SCC IOP
	64	*
	65	* 6 - VIA1
1da177e4 LT	66	*
	67	* For PSC Macintoshes (660AV, 840AV):
	68	*
	69	* 3 - PSC level 3
	70	* - slot 0: MACE
	71	*
	72	* 4 - PSC level 4
	73	* - slot 1: SCC channel A interrupt
	74	* - slot 2: SCC channel B interrupt
	75	* - slot 3: MACE DMA
	76	*
	77	* 5 - PSC level 5
	78	*
	79	* 6 - PSC level 6
	80	*
	81	* Finally we have good 'ole level 7, the non-maskable interrupt:
	82	*
	83	* 7 - NMI (programmer's switch on the back of some Macs)
	84	* Also RAM parity error on models which support it (IIc, IIfx?)
	85	*
	86	* The current interrupt logic looks something like this:
	87	*
	88	* - We install dispatchers for the autovector interrupts (1-7). These
	89	* dispatchers are responsible for querying the hardware (the
	90	* VIA/RBV/OSS/PSC chips) to determine the actual interrupt source. Using
	91	* this information a machspec interrupt number is generated by placing the
	92	* index of the interrupt hardware into the low three bits and the original
	93	* autovector interrupt number in the upper 5 bits. The handlers for the
	94	* resulting machspec interrupt are then called.
	95	*
	96	* - Nubus is a special case because its interrupts are hidden behind two
	97	* layers of hardware. Nubus interrupts come in as index 1 on VIA #2,
	98	* which translates to IRQ number 17. In this spot we install _another_
	99	* dispatcher. This dispatcher finds the interrupting slot number (9-F) and
	100	* then forms a new machspec interrupt number as above with the slot number
	101	* minus 9 in the low three bits and the pseudo-level 7 in the upper five
	102	* bits. The handlers for this new machspec interrupt number are then
	103	* called. This puts Nubus interrupts into the range 56-62.
	104	*
	105	* - The Baboon interrupts (used on some PowerBooks) are an even more special
	106	* case. They're hidden behind the Nubus slot $C interrupt thus adding a
	107	* third layer of indirection. Why oh why did the Apple engineers do that?
	108	*
1da177e4 LT	109	*/
	110
	111	#include <linux/types.h>
	112	#include <linux/kernel.h>
	113	#include <linux/sched.h>
b17b0153	114	#include <linux/sched/debug.h>
ed04c97d FT	115	#include <linux/interrupt.h>
ed04c97d FT	116	#include <linux/irq.h>
1da177e4	117	#include <linux/delay.h>
1da177e4	118
1da177e4	119	#include <asm/irq.h>
1da177e4	120	#include <asm/macintosh.h>
ed04c97d	121	#include <asm/macints.h>
1da177e4 LT	122	#include <asm/mac_via.h>
1da177e4 LT	123	#include <asm/mac_psc.h>
ed04c97d FT	124	#include <asm/mac_oss.h>
	125	#include <asm/mac_iop.h>
	126	#include <asm/mac_baboon.h>
1da177e4	127	#include <asm/hwtest.h>
2850bc27	128	#include <asm/irq_regs.h>
1da177e4	129
3cd53b14	130	extern void show_registers(struct pt_regs *);
1da177e4	131
2850bc27	132	irqreturn_t mac_nmi_handler(int, void *);
1da177e4	133
c4af5da7 FT	134	static unsigned int mac_irq_startup(struct irq_data *);
	135	static void mac_irq_shutdown(struct irq_data *);
	136
c288bf25	137	static struct irq_chip mac_irq_chip = {
9c5f4afd	138	.name = "mac",
e8abf5e7 GU	139	.irq_enable = mac_irq_enable,
e8abf5e7 GU	140	.irq_disable = mac_irq_disable,
c4af5da7 FT	141	.irq_startup = mac_irq_startup,
c4af5da7 FT	142	.irq_shutdown = mac_irq_shutdown,
9c5f4afd RZ	143	};
9c5f4afd RZ	144
66a3f820	145	void __init mac_init_IRQ(void)
1da177e4	146	{
edb34725	147	m68k_setup_irq_controller(&mac_irq_chip, handle_simple_irq, IRQ_USER,
9c5f4afd	148	NUM_MAC_SOURCES - IRQ_USER);
1da177e4 LT	149
	150	/*
	151	* Now register the handlers for the master IRQ handlers
	152	* at levels 1-7. Most of the work is done elsewhere.
	153	*/
	154
9c5f4afd	155	if (oss_present)
1da177e4	156	oss_register_interrupts();
9c5f4afd	157	else
1da177e4	158	via_register_interrupts();
70bc53b4	159	if (psc)
9c5f4afd RZ	160	psc_register_interrupts();
	161	if (baboon_present)
	162	baboon_register_interrupts();
1da177e4	163	iop_register_interrupts();
92c3dd15 GU	164	if (request_irq(IRQ_AUTO_7, mac_nmi_handler, 0, "NMI",
	165	mac_nmi_handler))
	166	pr_err("Couldn't register NMI\n");
1da177e4 LT	167	}
1da177e4 LT	168
1da177e4	169	/*
2690e214 FT	170	* mac_irq_enable - enable an interrupt source
2690e214 FT	171	* mac_irq_disable - disable an interrupt source
1da177e4 LT	172	*
	173	* These routines are just dispatchers to the VIA/OSS/PSC routines.
	174	*/
	175
2690e214	176	void mac_irq_enable(struct irq_data *data)
1da177e4	177	{
2690e214	178	int irq = data->irq;
9c5f4afd	179	int irq_src = IRQ_SRC(irq);
1da177e4 LT	180
1da177e4 LT	181	switch(irq_src) {
9c5f4afd	182	case 1:
9c5f4afd RZ	183	case 2:
	184	case 7:
	185	if (oss_present)
	186	oss_irq_enable(irq);
	187	else
	188	via_irq_enable(irq);
	189	break;
	190	case 3:
da3fb3c9	191	case 4:
9c5f4afd RZ	192	case 5:
9c5f4afd RZ	193	case 6:
70bc53b4	194	if (psc)
9c5f4afd RZ	195	psc_irq_enable(irq);
	196	else if (oss_present)
	197	oss_irq_enable(irq);
80614e5a	198	break;
9c5f4afd RZ	199	case 8:
	200	if (baboon_present)
	201	baboon_irq_enable(irq);
	202	break;
1da177e4 LT	203	}
	204	}
	205
2690e214	206	void mac_irq_disable(struct irq_data *data)
1da177e4	207	{
2690e214	208	int irq = data->irq;
9c5f4afd	209	int irq_src = IRQ_SRC(irq);
1da177e4 LT	210
1da177e4 LT	211	switch(irq_src) {
9c5f4afd	212	case 1:
9c5f4afd RZ	213	case 2:
	214	case 7:
	215	if (oss_present)
	216	oss_irq_disable(irq);
	217	else
	218	via_irq_disable(irq);
	219	break;
	220	case 3:
da3fb3c9	221	case 4:
9c5f4afd RZ	222	case 5:
9c5f4afd RZ	223	case 6:
70bc53b4	224	if (psc)
9c5f4afd RZ	225	psc_irq_disable(irq);
	226	else if (oss_present)
	227	oss_irq_disable(irq);
80614e5a	228	break;
9c5f4afd RZ	229	case 8:
	230	if (baboon_present)
	231	baboon_irq_disable(irq);
	232	break;
1da177e4 LT	233	}
	234	}
	235
c4af5da7 FT	236	static unsigned int mac_irq_startup(struct irq_data *data)
	237	{
	238	int irq = data->irq;
	239
	240	if (IRQ_SRC(irq) == 7 && !oss_present)
	241	via_nubus_irq_startup(irq);
	242	else
	243	mac_irq_enable(data);
	244
	245	return 0;
	246	}
	247
	248	static void mac_irq_shutdown(struct irq_data *data)
	249	{
	250	int irq = data->irq;
	251
	252	if (IRQ_SRC(irq) == 7 && !oss_present)
	253	via_nubus_irq_shutdown(irq);
	254	else
	255	mac_irq_disable(data);
	256	}
	257
3cd53b14	258	static volatile int in_nmi;
1da177e4	259
2850bc27	260	irqreturn_t mac_nmi_handler(int irq, void *dev_id)
1da177e4	261	{
3cd53b14 FT	262	if (in_nmi)
	263	return IRQ_HANDLED;
	264	in_nmi = 1;
1da177e4	265
3cd53b14 FT	266	pr_info("Non-Maskable Interrupt\n");
3cd53b14 FT	267	show_registers(get_irq_regs());
1da177e4	268
3cd53b14	269	in_nmi = 0;
1da177e4 LT	270	return IRQ_HANDLED;
1da177e4 LT	271	}